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confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
1999, 2000
MOS FIELD EFFECT TRANSISTOR
2SK3295
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
Document No. D14064EJ2V0DS00 (2nd edition)
Date Published
April 2001 NS CP(K)
Printed in Japan
DATA SHEET
The mark
!
!
!
!
shows major revised points.
DESCRIPTION
The 2SK3295 is N-Channel MOS FET device that features a
low on-state resistance and excellent switching characteristics,
designed for low voltage high current applications such as
DC/DC converter with synchronous rectifier.
FEATURES
4.5 V drive available
Low on-state resistance
R
DS(on)1
= 18 m
MAX. (V
GS
= 10 V, I
D
= 18 A)
Low gate charge
Q
G
= 16 nC TYP. (I
D
= 35 A, V
DD
= 16 V, V
GS
= 10 V)
Built-in gate protection diode
Surface mount device available
ABSOLUTE MAXIMUM RATINGS (T
A
= 25C)
Drain to Source Voltage (V
GS
= 0 V)
V
DSS
20
V
Gate to Source Voltage (V
DS
= 0 V)
V
GSS
20
V
Drain Current (DC) (T
C
= 25C)
I
D(DC)
35
A
Drain Current (Pulse)
Note
I
D(pulse)
140
A
Total Power Dissipation (T
A
= 25C)
P
T1
1.5
W
Total Power Dissipation (T
C
= 25C)
P
T2
35
W
Channel Temperature
T
ch
150
C
Storage Temperature
T
stg
-
55 to +150
C
Note PW
10
s, Duty Cycle
1%
ORDERING INFORMATION
PART NUMBER
PACKAGE
2SK3295
TO-220AB
2SK3295-S
TO-262
2SK3295-ZK
TO-263(MP-25ZK)
2SK3295-ZJ
TO-263(MP-25ZJ)
Data Sheet D14064EJ2V0DS
2
2SK3295
ELECTRICAL CHARACTERISTICS(T
A
= 25C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 20 V, V
GS
= 0 V
10
A
Gate Leakage Current
I
GSS
V
GS
=
20 V, V
DS
= 0 V
10
A
Gate Cut-off Voltage
V
GS(off)
V
DS
= 10 V, I
D
= 1 mA
1.0
2.5
V
Forward Transfer Admittance
| y
fs
|
V
DS
= 10 V, I
D
= 18 A
7.5
S
Drain to Source On-state Resistance
R
DS(on)1
V
GS
= 10 V, I
D
= 18 A
13
18
m
R
DS(on)2
V
GS
= 4.5 V, I
D
= 18 A
21
27
m
Input Capacitance
C
iss
V
DS
= 10 V
720
pF
Output Capacitance
C
oss
V
GS
= 0 V
370
pF
Reverse Transfer Capacitance
C
rss
f = 1 MHz
180
pF
Turn-on Delay Time
t
d(on)
V
DD
= 10 V , I
D
= 18 A
85
ns
Rise Time
t
r
V
GS(on)
= 10 V
2000
ns
Turn-off Delay Time
t
d(off)
R
G
= 10
65
ns
Fall Time
t
f
270
ns
Total Gate Charge
Q
G
V
DD
= 16 V
16
nC
Gate to Source Charge
Q
GS
V
GS
= 10 V
3.1
nC
Gate to Drain Charge
Q
GD
I
D
= 35 A
5.2
nC
Body Diode Forward Voltage
V
F(S-D)
I
F
= 35 A, V
GS
= 0 V
1.0
V
Reverse Recovery Time
t
rr
I
F
= 35 A, V
GS
= 0 V
28
ns
Reverse Recovery Charge
Q
rr
di/dt = 100 A/
s
14
nC
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
PG.
R
G
0
V
GS
D.U.T.
R
L
V
DD
= 1 s
Duty Cycle
1%
V
GS
Wave Form
I
D
Wave Form
V
GS
10%
90%
V
GS
(on)
10%
0
I
D
90%
90%
t
d(on)
t
r
t
d(off)
t
f
10%
I
D
0
t
on
t
off
PG.
50
D.U.T.
R
L
V
DD
I
G
= 2 mA
Data Sheet D14064EJ2V0DS
3
2SK3295
TYPICAL CHARACTERISTICS (T
A
= 25C)
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
V
DS
- Drain to Source Voltage - V
I
D
- Drain Current - A
0
0
2
3
80
160
120
1
Pulsed
40
V
GS
=10 V
7.0 V
4.5 V
FORWARD TRANSFER CHARACTERISTICS
V
GS
- Gate to Source Voltage - V
I
D
- Drain Current - A
Pulsed
0
1
2
3
4
6
5
V
DS
= 10 V
100
10
1
0.1
0.01
0.001
1000
T
ch
=
-
50C
-
25C
25C
75C
150C
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
T
ch
- Channel Temperature - C
V
GS(off)
- Gate to Source Cut-off Voltage - V
V
DS
= 10 V
I
D
= 1 mA
0
1
2
3
-
50
0
50
100
150
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
Pulsed
V
DS
= 10 V
| y
fs
| - Forward Transfer Admittance - S
I
D
- Drain Current - A
10
1
0.1
1
0.1
10
100
100
T
ch
= 150C
75C
25C
-
50C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
V
GS
- Gate to Source Voltage - V
R
DS(on)
- Drain to Source On-state Resistance - m
0
10
5
15
20
20
30
40
50
0
10
Pulsed
I
D
= 28 A
18 A
7 A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
I
D
- Drain Current - A
R
DS(on)
- Drain to Source On-state Resistance - m
10
20
30
40
50
10
1
1000
100
Pulsed
0
V
GS
= 4.5 V
7.0 V
10 V
Data Sheet D14064EJ2V0DS
4
2SK3295
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
T
ch
- Channel Temperature - C
R
DS(on)
- Drain to Source On-state Resistance - m
0
-
50
20
10
0
50
100
150
40
30
7.0 V
10 V
I
D
= 18 A
Pulsed
V
GS
= 4.5 V
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
I
SD
- Diode Forward Current - A
0
2.0
1.6
V
SD
- Source to Drain Voltage - V
1.2
0.8
0.4
Pulsed
0.1
0.01
1
10
100
1000
0 V
4.5 V
V
GS
= 10 V
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
V
DS
- Drain to Source Voltage - V
C
iss
, C
oss
, C
rss
- Capacitance - pF
0.1
10
100
1000
10000
1
10
100
V
GS
= 0 V
f = 1 MHz
C
oss
C
rss
C
iss
SWITCHING CHARACTERISTICS
I
D
- Drain Current - A
t
d(on)
, t
r
, t
d(off)
, t
f
- Switching Time - ns
10
1
1
0.1
100
10000
1000
10
100
V
DD
= 10 V
V
GS
= 10 V
R
G
= 10
t
f
t
r
t
d(on)
t
d(off)
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
I
SD
- Diode Forward Current - A
t
rr
- Reverse Recovery Time - ns
di/dt = 100 A/ s
V
GS
= 0 V
1
0.1
10
1
10
100
1000
100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
V
GS
- Gate to Source Voltage - V
Q
G
- Gate Charge - nC
V
DS
- Drain to Source Voltage - V
0
0
10
15
5
20
10
5
15
20
4
2
0
8
6
V
DS
16
14
12
10
V
GS
I
D
= 35 A
V
DD
= 16 V
10 V
4 V
Data Sheet D14064EJ2V0DS
5
2SK3295
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
T
ch
- Channel Temperature - C
dT - Percentage of Rated Power - %
0
40
20
60
100
140
80
120
160
0
20
40
60
80
100
T
C
- Case Temperature - C
P
T
- Total Power Dissipation - W
0
0
80
20
40
60
100
140
120
160
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
10
20
30
50
40
FORWARD BIAS SAFE OPERATING AREA
0.1
1
10
100
I
D
- Drain Current - A
V
DS
- Drain to Source Voltage - V
100
1000
10
1
Po
wer Dissipation Limited
100
s
300
s
1 ms
3 ms
10
ms
PW
= 10
s
I
D(pulse)
I
D(DC)
DC
T
C
= 25C
Single Pulse
R
DS(on)
Limited
(@V
GS
= 10 V)
PW - Pulse Width - sec
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
r
th(t)
- Transient Thermal Resistance -
C
/W
10
0.01
0.1
1
100
1000
1 m
10 m
100 m
1
10
100
1000
Single Pulse
10
100
R
th(ch-C)
= 3.57C/W
R
th(ch-A)
= 83.3C/W
!
Data Sheet D14064EJ2V0DS
6
2SK3295
PACKAGE DRAWINGS (Unit : mm)
1)TO-220AB (MP-25)
4.8 MAX.
1.Gate
2.Drain
3.Source
4.Fin (Drain)
1 2 3
10.6 MAX.
10.0
3.60.2
4
3.00.3
1.30.2
0.750.1
2.54 TYP.
2.54 TYP.
5.9 MIN.
6.0 MAX.
15.5 MAX.
12.7 MIN.
1.30.2
0.50.2
2.80.2
2)TO-262
4.8 MAX.
1.Gate
2.Drain
3.Source
4.Fin (Drain)
1
2
3
(10)
4
1.30.2
0.750.3
2.54 TYP.
2.54 TYP.
8.5
0.2
12.7 MIN.
1.30.2
0.50.2
2.80.2
1.00
.
5
3)TO-263 (MP-25ZK)
10.00.2
8.0 TYP.
2.54
0.70.15
9.150.2
2.450.25
15.250.5
1.350.3
1
2
3
4
2.5
4.450.2
1.30.2
0.50.2
0 to 8
o
1.Gate
2.Drain
3.Source
4.Fin (Drain)
0.4
No plating
8.4 TYP.
0.025 to
0.25
0.25
4)TO-263 (MP-25ZJ)
(10)
1.40.2
1.00.5
2.54 TYP.
2.54 TYP.
8.50.2
1
2
3
5.70.4
4
2.80.2
4.8 MAX.
1.30.2
0.50.2
(0.5R)
(0.8R)
1.Gate
2.Drain
3.Source
4.Fin (Drain)
0.70.2
EQUIVALENT CIRCUIT
Source
Body
Diode
Gate
Protection
Diode
Gate
Drain
Remark
The diode connected between the gate and source of the transistor
serves as a protector against ESD.
When this device actually used, an additional protection circuit is
externally required if a voltage exceeding the rated voltage may be
applied to this device.
Data Sheet D14064EJ2V0DS
7
2SK3295
[MEMO]
2SK3295
M8E 00. 4
The information in this document is current as of April, 2001. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
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