The information in this document is subject to change without notice. Before using this document, please confirm that
this is the latest version.
Not all devices/types available in every country. Please check with local NEC Compound Semiconductor Devices
representative for availability and additional information.
Document No. PU10118EJ01V1DS (1st edition)
(Previous No. P15190EJ1V0DS00)
Date Published April 2002 CP(K)
Printed in Japan
SILICON POWER MOS FET
NE5500179A
4.8 V OPERATION SILICON RF POWER LD-MOS FET
FOR 1.9 GHz 1 W TRANSMISSION AMPLIFIERS
DATA SHEET
NEC Corporation 1999
NEC Compound Semiconductor Devices 2002
The mark
!
!
!
!
shows major revised points.
DESCRIPTION
The NE5500179A is an N-channel silicon power MOS FET specially designed as the transmission driver amplifier
for 4.8 V GSM 1 800 and GSM 1 900 handsets. Dies are manufactured using NEC's NEWMOS technology (NEC's
0.6
m WSi gate lateral-diffusion MOS FET) and housed in a surface mount package. The device can deliver 30.0
dBm output power with 55% power added efficiency at 1.9 GHz under the 4.8 V supply voltage, or can deliver 27
dBm output power with 50% pozwer added efficiency at 3.5 V, respectively.
FEATURES
High output power
: P
out
= 30.0 dBm TYP. (V
DS
= 4.8 V, I
Dset
= 200 mA, f = 1.9 GHz, P
in
= 20 dBm)
High power added efficiency :
add
= 55% TYP. (V
DS
= 4.8 V, I
Dset
= 200 mA, f = 1.9 GHz, P
in
= 20 dBm)
High linear gain
: G
L
= 14.0 dB TYP. (V
DS
= 4.8 V, I
Dset
= 200 mA, f = 1.9 GHz, P
in
= 10 dBm)
Surface mount package
: 5.7
5.7
1.1 mm MAX.
Single supply
: V
DS
= 3.0 to 6.0 V
APPLICATIONS
Digital cellular phones
: 4.8 V driver amplifier for GSM 1 800/ GSM 1 900 class 1 handsets, or 4.8 V final stage
amplifier
Digital cordless phones : 3.5 V final stage amplifier for DECT
Others
: General purpose amplifiers for 1.6 to 2.5 GHz TDMA applications
ORDERING INFORMATION
Part Number
Package
Marking
Supplying Form
NE5500179A-T1
79A
R1
12 mm wide embossed taping
Gate pin face the perforation side of the tape
Qty 1 kpcs/reel
Remark To order evaluation samples, consult your NEC sales representative.
Part number for sample order: NE5500179A
Caution Please handle this device at static-free workstation, because this is an electrostatic
sensitive device.
Data Sheet PU10118EJ01V1DS
2
NE5500179A
ABSOLUTE MAXIMUM RATINGS (T
A
= +25
C)
Parameter
Symbol
Ratings
Unit
Drain to Source Voltage
V
DS
8.5
V
Gate to Source Voltage
V
GSO
5.0
V
Drain Current
I
D
0.25
A
Drain Current (Pulse Test)
I
D
Note
0.5
A
Total Power Dissipation
P
tot
10
W
Channel Temperature
T
ch
125
C
Storage Temperature
T
stg
-
65 to +125
C
Note Duty Cycle
50%, T
on
1 s
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Drain to Source Voltage
V
DS
3.0
4.8
6.0
V
Gate to Source Voltage
V
GSO
0
2.0
3.5
V
Drain Current (Pulse Test)
I
D
Duty Cycle
50%, T
on
1 s
-
340
-
mA
Input Power
P
in
f = 1.9 GHz, V
DS
= 4.8 V
0
20
22
dBm
ELECTRICAL CHARACTERISTICS (T
A
= +25
C)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Gate to Source Leak Current
I
GSO
V
GSS
= 5.0 V
-
-
100
nA
Saturated Drain Current
(Zero Gate Voltage Drain Current)
I
DSS
V
DSS
= 8.5 V
-
-
100
nA
Gate Threshold Voltage
V
th
V
DS
= 4.8 V, I
DS
= 1 mA
1.0
1.45
2.0
V
Transconductance
g
m
V
DS
= 4.8 V, I
DS
= 250 mA
-
420
-
mS
Drain to Source Breakdown Voltage
BV
DS
I
DSS
= 10
A
20
24
-
V
Thermal Resistance
R
th
Channel to Case
-
10
-
C/W
Linear Gain
G
L
f = 1.9 GHz, P
in
= 10 dBm,
V
DS
= 4.8 V, I
Dset
= 200 mA, Note 1, 2
-
14.0
-
dB
Output Power
P
out
f = 1.9 GHz, P
in
= 20 dBm,
28.5
30.0
-
dBm
Operating Current
I
op
V
DS
= 4.8 V, I
Dset
= 200 mA, Note 1, 2
-
340
-
mA
Power Added Efficiency
add
48
55
-
%
Notes 1. Peak measurement at Duty Cycle
50%, T
on
1 s.
2. DC performance is 100% testing. RF performance is testing several samples per wafer.
Wafer rejection criteria for standard devices is 1 reject for several samples.
!
!
!
!
Data Sheet PU10118EJ01V1DS
3
NE5500179A
TYPICAL CHARACTERISTICS (T
A
= +25
C)
V
GS
= 10 V MAX.
Step = 1.0 V
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
Drain Current I
D
(A)
Drain to Source Voltage V
DS
(V)
3.5
1.0
1.5
3.0
2.0
2.5
0.5
0
16
14
12
10
8
6
2
4
V
DS
= 4.8 V
SET DRAIN CURRENT vs.
GATE TO SOURCE VOLTAGE
Set Drain Current I
Dset
(mA)
Gate to Source Voltage V
GS
(V)
1 000
10
100
1
0.1
3.0
2.5
2.0
1.5
1.0
V
DS
= 4.8 V
I
Dset
= 100 mA
f = 1.9 GHz
P
out
I
D
Output Power P
out
(dBm)
Drain Current I
D
(mA)
Input Power P
in
(dBm)
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
35
20
30
25
15
10
500
400
300
200
100
0
30
25
15
10
5
0
20
V
DS
= 4.8 V
I
Dset
= 100 mA
f = 1.9 GHz
d
add
100
50
0
30
25
20
15
10
5
Drain Efficiency
d
(%)
Power Added Efficiency
add
(%)
Input Power P
in
(dBm)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. INPUT POWER
V
DS
= 4.8 V
f = 1.9 GHz
P
in
= 20 dBm
P
out
I
D
Output Power P
out
(dBm)
Drain Current I
D
(mA)
Gate to Source Voltage V
GS
(V)
OUTPUT POWER, DRAIN CURRENT
vs. GATE TO SOURCE VOLTAGE
31
28
30
29
27
26
500
400
300
200
100
0
4.0
2.0
1.0
0.0
3.0
V
DS
= 4.8 V
f = 1.9 GHz
P
in
= 20 dBm
100
50
0
4.0
3.0
2.0
1.0
Drain Efficiency
d
(%)
Power Added Efficiency
add
(%)
Gate to Source Voltage V
GS
(V)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. GATE TO SOURCE VOLTAGE
d
add
Data Sheet PU10118EJ01V1DS
4
NE5500179A
V
DS
= 3.5 V
I
Dset
= 100 mA
f = 1.9 GHz
P
out
I
D
Output Power P
out
(dBm)
Drain Current I
D
(mA)
Input Power P
in
(dBm)
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
30
15
25
20
10
5
500
400
300
200
100
0
30
25
15
10
5
0
20
V
DS
= 3.5 V
I
Dset
= 100 mA
f = 1.9 GHz
d
add
100
50
0
30
25
20
15
10
5
Drain Efficiency
d
(%)
Power Added Efficiency
add
(%)
Input Power P
in
(dBm)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. INPUT POWER
V
DS
= 4.5 V
I
Dset
= 100 mA
f = 460 MHz
P
out
I
D
Output Power P
out
(dBm)
Drain Current I
D
(mA)
Input Power P
in
(dBm)
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
30
15
25
20
10
5
500
400
300
200
100
0
25
20
10
5
0
5
15
V
DS
= 3.5 V
f = 1.9 GHz
P
in
= 18 dBm
P
out
I
D
Output Power P
out
(dBm)
Drain Current I
D
(mA)
Gate to Source Voltage V
GS
(V)
OUTPUT POWER, DRAIN CURRENT
vs. GATE TO SOURCE VOLTAGE
28
25
27
26
24
23
500
400
300
200
100
0
4.0
2.0
1.0
0.0
3.0
V
DS
= 3.5 V
f = 1.9 GHz
P
in
= 18 dBm
100
50
0
4.0
3.0
2.0
1.0
Drain Efficiency
d
(%)
Power Added Efficiency
add
(%)
Gate to Source Voltage V
GS
(V)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. GATE TO SOURCE VOLTAGE
d
add
V
DS
= 4.5 V
I
Dset
= 100 mA
f = 460 MHz
100
50
0
25
20
15
10
5
0
5
Drain Efficiency
d
(%)
Power Added Efficiency
add
(%)
Input Power P
in
(dBm)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. INPUT POWER
add
d
Data Sheet PU10118EJ01V1DS
5
NE5500179A
V
DS
= 3.0 V
I
Dset
= 100 mA
f = 2.45 GHz
P
out
I
D
Output Power P
out
(dBm)
Drain Current I
D
(mA)
Input Power P
in
(dBm)
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
30
15
25
20
10
5
500
400
300
200
100
0
30
25
15
10
5
0
20
V
DS
= 3.5 V
I
Dset
= 100 mA
f = 850 MHz
P
out
I
D
Output Power P
out
(dBm)
Drain Current I
D
(mA)
Input Power P
in
(dBm)
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
30
15
25
20
10
5
500
400
300
200
100
0
25
20
10
5
0
5
15
V
DS
= 3.5 V
I
Dset
= 100 mA
f = 850 MHz
d
add
100
50
0
25
20
15
10
5
0
5
Drain Efficiency
d
(%)
Power Added Efficiency
add
(%)
Input Power P
in
(dBm)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. INPUT POWER
V
DS
= 4.5 V
f = 460 MHz
P
in
= 15 dBm
P
out
I
D
Output Power P
out
(dBm)
Drain Current I
D
(mA)
Gate to Source Voltage V
GS
(V)
OUTPUT POWER, DRAIN CURRENT
vs. GATE TO SOURCE VOLTAGE
30
10
5
25
20
15
0
600
500
400
300
200
100
0
4.0
2.0
1.0
3.0
V
DS
= 4.5 V
f = 460 GHz
P
in
= 15 dBm
100
50
0
4.0
3.0
2.0
1.0
Drain Efficiency
d
(%)
Power Added Efficiency
add
(%)
Gate to Source Voltage V
GS
(V)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. GATE TO SOURCE VOLTAGE
d
add
V
DS
= 3.0 V
I
Dset
= 100 mA
f = 2.45 GHz
100
50
0
30
25
20
15
10
5
Drain Efficiency
d
(%)
Power Added Efficiency
add
(%)
Input Power P
in
(dBm)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. INPUT POWER
d
add
Data Sheet PU10118EJ01V1DS
6
NE5500179A
V
DS
= 3.0 V
f = 2.45 GHz
P
in
= 18 dBm
P
out
I
D
Output Power P
out
(dBm)
Drain Current I
D
(mA)
Gate to Source Voltage V
GS
(V)
OUTPUT POWER, DRAIN CURRENT
vs. GATE TO SOURCE VOLTAGE
30
15
25
20
10
5
500
400
300
200
100
0
4.0
2.0
1.0
0.0
3.0
V
DS
= 3.0 V
f = 2.45 GHz
P
in
= 18 dBm
100
50
0
4.0
3.0
2.0
1.0
Drain Efficiency
d
(%)
Power Added Efficiency
add
(%)
Gate to Source Voltage V
GS
(V)
DRAIN EFFICIENCY, POWER ADDED
EFFICIENCY vs. GATE TO SOURCE VOLTAGE
add
d
Remark The graphs indicate nominal characteristics.
Data Sheet PU10118EJ01V1DS
7
NE5500179A
S-PARAMETERS
Test Conditions: V
DS
= 4.8 V, I
Dset
= 100 mA
Frequency
S
11
S
21
S
12
S
22
MAG
Note
MSG
Note
K
GHz
MAG.
ANG.
dB
MAG.
ANG.
dB
MAG.
ANG.
MAG.
ANG.
dB
dB
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
0.844
0.792
0.757
0.747
0.746
0.751
0.756
0.772
0.777
0.785
0.796
0.804
0.814
0.820
0.827
0.832
0.833
0.846
0.843
0.850
0.851
0.854
0.861
0.857
0.870
0.870
0.867
0.870
0.873
0.882
-
69.6
-
107.8
-
127.4
-
138.7
-
146.2
-
151.8
-
155.6
-
159.5
-
162.3
-
165.0
-
167.7
-
169.9
-
172.4
-
174.6
-
176.8
-
179.6
177.9
175.6
172.9
170.3
167.1
165.1
162.3
159.5
156.6
153.9
151.6
148.9
146.5
143.9
25.2
21.7
18.7
16.4
14.5
12.7
11.3
9.9
8.8
7.6
6.7
5.7
4.8
4.0
3.2
2.5
1.5
1.1
0.2
0.0
-
1.0
-
1.6
-
2.4
-
2.3
-
3.4
-
3.6
-
5.0
-
4.8
-
5.6
-
5.7
18.11
12.12
8.58
6.58
5.28
4.32
3.68
3.12
2.75
2.40
2.17
1.91
1.74
1.58
1.45
1.33
1.19
1.13
1.02
0.99
0.89
0.83
0.75
0.76
0.67
0.65
0.56
0.57
0.52
0.51
135.5
112.3
98.8
89.4
82.1
76.2
70.9
65.9
61.3
58.2
53.7
51.4
46.4
44.3
39.7
38.4
34.6
31.6
28.3
27.1
23.3
21.4
16.9
15.5
13.8
12.0
9.0
3.9
4.7
2.7
-
28.5
-
26.1
-
25.5
-
25.7
-
25.7
-
26.0
-
26.3
-
26.4
-
26.9
-
27.2
-
27.8
-
28.3
-
28.7
-
29.0
-
28.9
-
30.0
-
30.5
-
31.0
-
31.8
-
32.2
-
33.5
-
34.1
-
35.1
-
34.9
-
36.1
-
35.8
-
39.4
-
39.9
-
42.4
-
41.3
0.037
0.049
0.052
0.052
0.052
0.050
0.048
0.048
0.045
0.043
0.040
0.038
0.036
0.035
0.035
0.031
0.030
0.028
0.025
0.024
0.021
0.019
0.017
0.017
0.015
0.016
0.010
0.010
0.007
0.008
48.2
23.2
10.8
3.3
-
4.1
-
8.9
-
12.6
-
17.0
-
22.1
-
21.9
-
26.9
-
29.2
-
30.5
-
31.4
-
36.6
-
38.5
-
38.3
-
38.7
-
38.1
-
40.9
-
42.9
-
48.0
-
43.6
-
40.8
-
49.0
-
36.8
-
33.0
-
43.4
-
18.3
-
15.0
0.517
0.569
0.598
0.618
0.641
0.660
0.681
0.696
0.715
0.732
0.749
0.763
0.776
0.789
0.803
0.808
0.814
0.829
0.834
0.840
0.842
0.847
0.856
0.866
0.862
0.865
0.866
0.879
0.879
0.885
-
85.0
-
120.7
-
136.5
-
144.8
-
149.5
-
153.4
-
156.2
-
158.9
-
161.0
-
162.9
-
164.9
-
166.9
-
169.1
-
171.0
-
172.7
-
175.0
-
176.7
-
179.2
178.7
176.5
174.4
172.1
169.1
167.0
164.7
162.0
159.1
156.7
154.5
152.0
12.4
11.7
10.9
11.5
10.2
10.1
7.8
8.6
7.6
8.2
26.8
23.9
22.1
21.0
20.1
19.3
18.8
18.1
17.9
17.4
17.2
17.0
16.8
16.5
16.1
16.3
16.0
16.1
16.0
16.1
0.00
0.06
0.08
0.11
0.13
0.18
0.22
0.23
0.28
0.33
0.35
0.42
0.45
0.48
0.44
0.62
0.78
0.70
0.98
0.97
1.42
1.62
1.88
1.68
2.20
2.13
4.44
3.96
6.01
4.60
Note When K
1, the MAG (Maximum Available Gain) is used.
MAG =
When K
<
1, the MSG (Maximum Stable Gain) is used.
MSG =
, K =
,
= S
11
S
22
-
S
21
S
12
LARGE SIGNAL IMPEDANCE (V
DS
= 4.8 V, I
Dset
= 100 mA, P
in
= 20 dBm)
f (GHz)
Z
in
(
)
Z
OL
(
)
Note
1.9
TBD
TBD
Note Z
OL
is the conjugate of optimum load impedance at given voltage, idling current, input power and frequency.
S
21
S
12
(K
(K
2
1) )
S
21
S
12
1+
2
-
S
11
2
-
S
22
2
2
S
12
S
21
Data Sheet PU10118EJ01V1DS
8
NE5500179A
PACKAGE DIMENSIONS
79A (UNIT: mm)
0.90.2
0.20.1
(Bottom View)
3.60.2
1.50.2
1.2 MAX.
0.8 MAX.
1.0 MAX.
Source
Gate
Drain
0.40.15
5.7 MAX.
5.7 MAX.
0.60.15
0.80.15
4.4 MAX.
4.2 MAX.
Source
Gate
Drain
R1
92
79A PACKAGE RECOMMENDED P.C.B. LAYOUT (UNIT: mm)
1.7
4.0
0.5
1.0
5.9
1.2
Gate
Source
Drain
0.5
6.1
0.5
Through Hole: 0.2 33
Stop up the hole with a rosin or
something to avoid solder flow.
Data Sheet PU10118EJ01V1DS
9
NE5500179A
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered and mounted under the following recommended conditions. For soldering
methods and conditions other than those recommended below, contact your nearby sales office.
Soldering Method
Soldering Conditions
Condition Symbol
Infrared Reflow
Peak temperature (package surface temperature)
: 260
C or below
Time at peak temperature
: 10 seconds or less
Time at temperature of 220
C or higher
: 60 seconds or less
Preheating time at 120 to 180
C
: 120
30 seconds
Maximum number of reflow processes
: 3 times
Maximum chlorine content of rosin flux (% mass)
: 0.2%(Wt.) or below
IR260
VPS
Peak temperature (package surface temperature)
: 215
C or below
Time at temperature of 200
C or higher
: 25 to 40 seconds
Preheating time at 120 to 150
C
: 30 to 60 seconds
Maximum number of reflow processes
: 3 times
Maximum chlorine content of rosin flux (% mass)
: 0.2%(Wt.) or below
VP215
Wave Soldering
Peak temperature (molten solder temperature)
: 260
C or below
Time at peak temperature
: 10 seconds or less
Preheating temperature (package surface temperature) : 120
C or below
Maximum number of flow processes
: 1 time
Maximum chlorine content of rosin flux (% mass)
: 0.2%(Wt.) or below
WS260
Partial Heating
Peak temperature (pin temperature)
: 350
C or below
Soldering time (per pin of device)
: 3 seconds or less
Maximum chlorine content of rosin flux (% mass)
: 0.2%(Wt.) or below
HS350-P3
Caution Do not use different soldering methods together (except for partial heating).
!
Data Sheet PU10118EJ01V1DS
10
NE5500179A
M8E 00. 4 - 0110
The information in this document is current as of March, 2002. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
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NE5500179A
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