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Электронный компонент: UPA1858GR-9JG

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confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
2002
MOS FIELD EFFECT TRANSISTOR
PA1858
P-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
DATA SHEET
Document No.G16276EJ1V0DS00 (1st edition)
Date Published October 2002 NS CP(K)
Printed in Japan
DESCRIPTION
The
PA1858 is a switching device, which can be
driven directly by a 2.5 V power source.
This device features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as power management of portable
machine and so on.
FEATURES
2.5 V drive available
Low on-state resistance
R
DS(on)1
= 24.5 m
MAX. (V
GS
=
-
4.5 V, I
D
=
-
2.5 A)
R
DS(on)2
= 25.5 m
MAX. (V
GS
=
-
4.0 V, I
D
=
-
2.5 A)
R
DS(on)3
= 38 m
MAX. (V
GS
=
-
2.5 V, I
D
=
-
2.5 A)
Built-in G-S protection diode against ESD
ORDERING INFORMATION
PART NUMBER
PACKAGE
PA1858GR-9JG
Power TSSOP8
ABSOLUTE MAXIMUM RATINGS (T
A
= 25C)
Drain to Source Voltage (V
GS
= 0 V)
V
DSS
-
20
V
Gate to Source Voltage (V
DS
= 0 V)
V
GSS
m
12
V
Drain Current (DC)
I
D(DC)
m
5.0
A
Drain Current (pulse)
Note1
I
D(pulse)
m
20
A
Total Power Dissipation (2 units)
Note2
P
T
2.0
W
Channel Temperature
T
ch
150
C
Storage Temperature
T
stg
-
55 to +150
C
Notes 1. PW
10
s, Duty Cycle
1%
2. Mounted on ceramic substrate of 5000
mm
2
x 1.1
mm
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD. When
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
PACKAGE DRAWING (Unit: mm)
1
4
8
5
6.4 0.2
4.4 0.1
1.0 0.2
0.145

0.055
0.1
1
: Drain1
2, 3
: Source1
4
: Gate1
5
: Gate2
6, 7
: Source2
8
: Drain2
0.8 MAX.
3.15 0.15
3.0 0.1
0.65
0.10 M
0.27
+0.03
0.08
0.25
0.5
3
+5
3
0.6
+0.15
0.1
1.2 MAX.
0.10.05
1.00.05
EQUIVALENT CIRCUITS
Source 1
Body
Diode
Gate
Protection
Diode
Gate 1
Drain 1
Source 2
Body
Diode
Gate
Protection
Diode
Gate 2
Drain 2
Data Sheet G16276EJ1V0DS
2






PA1858
ELECTRICAL CHARACTERISTICS (T
A
= 25C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
I
DSS
V
DS
=
-
20
V, V
GS
= 0
V
-
1.0
A
Gate Leakage Current
I
GSS
V
GS
=
m
12
V, V
DS
= 0
V
m
10
A
Gate Cut-off Voltage
V
GS(off)
V
DS
=
-
10
V, I
D
=
-
1.0 mA
-
0.5
-
1.0
-
1.5
V
Forward Transfer Admittance
| y
fs
|
V
DS
=
-
10
V, I
D
=
-
2.5
A
5.0
14.2
S
Drain to Source On-state Resistance
R
DS(on)1
V
GS
=
-
4.5
V, I
D
=
-
2.5
A
20.3
24.5
m
R
DS(on)2
V
GS
=
-
4.0
V, I
D
=
-
2.5
A
21.1
25.5
m
R
DS(on)3
V
GS
=
-
2.5
V, I
D
=
-
2.5
A
28.5
38
m
Input Capacitance
C
iss
V
DS
=
-
10
V
1300
pF
Output Capacitance
C
oss
V
GS
= 0
V
300
pF
Reverse Transfer Capacitance
C
rss
f = 1.0
MHz
180
pF
Turn-on Delay Time
t
d(on)
V
DD
=
-
10
V, I
D
=
-
2.5
A
16
ns
Rise Time
t
r
V
GS
=
-
4.0
V
65
ns
Turn-off Delay Time
t
d(off)
R
G
= 10
115
ns
Fall Time
t
f
125
ns
Total Gate Charge
Q
G
V
DD
=
-
16
V
12
nC
Gate to Source Charge
Q
GS
V
GS
=
-
4.0 V
1.5
nC
Gate to Drain Charge
Q
GD
I
D
=
-
5.0
A
5.0
nC
Body Diode Forward Voltage
V
F(S-D)
I
F
= 5.0
A, V
GS
= 0
V
0.81
V
Reverse Recovery Time
t
rr
I
F
= 5.0
A, V
GS
= 0
V
90
ns
Reverse Recovery Charge
Q
rr
di/dt = 50
A
/
s
62
nC
TEST CIRCUIT 2 GATE CHARGE
TEST CIRCUIT 1 SWITCHING TIME
PG.
R
G
0
V
GS(
-
)
D.U.T.
R
L
V
DD
= 1 s
Duty Cycle
1%
PG.
50
D.U.T.
R
L
V
DD
I
G
=
-
2 mA
V
GS
Wave Form
V
DS
Wave Form
V
GS(
-
)
V
DS(
-
)
10%
0
0
90%
90%
90%
V
GS
V
DS
t
on
t
off
t
d(on)
t
r
t
d(off)
t
f
10%
10%
Data Sheet G16276EJ1V0DS
3






PA1858
TYPICAL CHARACTERISTICS (T
A
= 25C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
dT - P
e
rc
ent
age of
Rat
ed P
o
w
e
r - %
0
20
40
60
80
100
120
0
25
50
75
100
125
150
175
P
T
- T
o
t
a
l
P
o
w
e
r Di
s
s
i
p
at
i
on - W
0
0.5
1
1.5
2
2.5
0
25
50
75
100
125
150
175
Mounted on ceramic substrate
of 5000 mm
2
x 1.1 mm
Mounted on FR-4 board
of 2500 mm
2
x 1.6 mm
P
D
(FET1):P
D
(FET2)=1:1
T
A
- Ambient Temperature -
C
T
A
- Ambient Temperature -
C
FORWARD BIAS SAFE OPERATING AREA
I
D
- Drai
n Current
- A
- 0.01
- 0.1
- 1
- 10
- 100
- 0.1
- 1
- 10
- 100
100 m s
10 m s
I
D (pulse)
I
D (D C)
PW = 1 m s
R
DS(on)
lim ited
(V
G S
=
-
4.5 V)
DC
Single pulse
Mounted on ceram ic substrate
of 5000 m m
2
x 1.1 m m
P
D
(FET1):P
D
(FET2) = 1:1
V
DS
- Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
r
th
(
c
h
-
A
)
- Trans
i
ent
Therm
a
l
Res
i
s
t
anc
e -
C/
W
0.1
1
10
100
1000
Single pulse
P
D
(FET1):P
D
(FET2) = 1:1
Mounted on FR-4 board of
2500 mm
2
x 1.6 mm
125
C/W
Mounted on ceramic substrate of
5000 mm
2
x 1.1 mm
62.5
C/W
PW - Pulse Width - s
1 m
10 m
100 m
1
10
100
1000
Data Sheet G16276EJ1V0DS
4






PA1858
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
I
D
- Drai
n Current
- A
0
- 5
- 10
- 15
- 20
0
- 0.2
- 0.4
- 0.6
- 0.8
- 1
Pulsed
-
2.5 V
V
GS
=
-
4.5 V
-
4.0 V
V
DS
- Drain to Source Voltage - V
I
D
- Drai
n Current
- A
- 0.0001
- 0.001
- 0.01
- 0.1
- 1
- 10
- 100
0
- 0.5
- 1
- 1.5
- 2
- 2.5
T
A
= 125
C
75
C
25
C
-
25
C
V
D S
=
-
10 V
P uls ed
V
GS
- Gate to Source Voltage - V
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
V
G
S
(
o
ff)
- Gat
e
Cut
-
of
f
V
o
l
t
age - V
- 0.6
- 0.8
- 1
- 1.2
- 1.4
-50
0
50
100
150
V
DS
=
-
10 V
I
D
=
-
1.0 m A
| y
fs
| - Forw
ard Trans
f
e
r A
d
m
i
t
t
anc
e - S
0.1
1
10
100
- 0.01
- 0.1
- 1
- 10
- 100
T
A
= 125
C
75
C
25
C
-
25
C
V
DS
=
-
10 V
Pulsed
T
ch
- Channel Temperature -
C
I
D
- Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
0
10
20
30
40
50
60
-50
0
50
100
150
I
D
=
-
2.5 A
Pulsed
V
GS
=
-
2.5 V
-
4.5 V
-
4.0 V
0
10
20
30
40
50
60
0
- 2
- 4
- 6
- 8
- 10
- 12
I
D
=
-
2.5 A
Pulsed
R
DS
(
on)
- Drai
n t
o
S
ourc
e
On-s
t
a
t
e
Res
i
s
t
anc
e - m
T
ch
- Channel Temperature -
C
R
DS
(
on)
- Drai
n t
o
S
ourc
e
On-s
t
a
t
e
Res
i
s
t
anc
e - m
V
GS
- Gate to Source Voltage - V
Data Sheet G16276EJ1V0DS
5






PA1858
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
0
10
20
30
40
50
60
- 0.01
- 0.1
- 1
- 10
- 100
V
GS
=
-
4.5 V
Pulsed
T
A
= 125
C
75
C
25
C
-
25
C
0
10
20
30
40
50
60
- 0.01
- 0.1
- 1
- 10
- 100
T
A
= 125
C
75
C
25
C
-
25
C
V
GS
=
-
4.0 V
Pulsed
R
DS
(
on)
- Drai
n t
o
S
ourc
e
On-s
t
a
t
e
Res
i
s
t
anc
e - m
I
D
- Drain Current - A
R
DS
(
on)
- Drai
n t
o
S
ourc
e
On-s
t
a
t
e
Res
i
s
t
anc
e - m
I
D
- Drain Current - A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
CAPACITANCE vs.
DRAIN TO SOURCE VOLTAGE
R
DS
(
on)
- Drai
n t
o
S
ourc
e
On-s
t
a
t
e
Res
i
s
t
anc
e - m
0
10
20
30
40
50
60
- 0.01
- 0.1
- 1
- 10
- 100
T
A
= 125C
25
C
75C
-
25
C
V
GS
=
-
2.5 V
Pulsed
I
D
- Drain Current - A
C
is
s
, C
os
s
, C
rs
s
- Capac
i
t
anc
e - pF
100
1000
10000
- 0.1
- 1
- 10
- 100
V
GS
= 0 V
f = 1.0 M H z
C
iss
C
oss
C
rss
V
DS
- Drain to Source Voltage - V
SWITCHING CHARACTERISTICS
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
t
d(
on)
, t
r
, t
d(
of
f
)
, t
f
- S
w
i
t
c
h
i
ng Ti
m
e
- ns
10
100
1000
- 0.1
- 1
- 10
V
DD
=
-
10 V
V
GS
=
-
4.0 V
R
G
= 10
t
d(off)
t
d(on)
t
f
t
r
I
F
- Di
ode Forw
ard Current
- A
0.01
0.1
1
10
100
0.4
0.6
0.8
1
1.2
V
GS
= 0 V
Pulsed
I
D
- Drain Current - A
V
F(S-D)
- Source to Drain Voltage - V
Data Sheet G16276EJ1V0DS
6






PA1858
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
V
GS
- Gat
e
t
o
S
ourc
e
V
o
l
t
age - V
0
- 1
- 2
- 3
- 4
- 5
0
4
8
12
16
I
D
=
-
5.0 A
V
DD
=
-
4.0 V
-
10 V
-
16 V
Q
G
- Gate Charge - nC
Data Sheet G16276EJ1V0DS
7






PA1858
[MEMO]






PA1858
M8E 00. 4
The information in this document is current as of October, 2002. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or
data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all
products and/or types are available in every country. Please check with an NEC sales representative
for availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of
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agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
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