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Электронный компонент: UPA2700GR

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Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
2002
MOS FIELD EFFECT TRANSISTOR









PA2700GR
SWITCHING
N-CHANNEL POWER MOS FET
DATA SHEET
Document No. G15672EJ2V0DS00 (2nd edition)
Date Published May 2002 NS CP(K)
Printed in Japan
The mark
5
shows major revised points.
DESCRIPTION
The
PA2700GR is N-Channel MOS Field Effect Transistor
designed for DC/DC converters and power management
applications of notebook computers.
FEATURES
Low on-state resistance
R
DS(on)1
= 5.3 m
MAX. (V
GS
= 10 V, I
D
= 9.0 A)
R
DS(on)2
= 7.3 m
MAX. (V
GS
= 4.5 V, I
D
= 9.0 A)
Low C
iss
: C
iss
= 2600 pF TYP. (V
DS
= 10 V, V
GS
= 0 V)
Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
PACKAGE
PA2700GR
Power SOP8
ABSOLUTE MAXIMUM RATINGS (T
A
= 25C, All terminals are connected.)
Drain to Source Voltage (V
GS
= 0 V)
V
DSS
30
V
Gate to Source Voltage (V
DS
= 0 V)
V
GSS
20
V
Drain Current (DC)
I
D(DC)
17
A
Drain Current (pulse)
Note1
I
D(pulse)
68
A
Total Power Dissipation (T
A
= 25C)
Note2
P
T
2.0
W
Channel Temperature
T
ch
150
C
Storage Temperature
T
stg
55 to + 150
C
Single Avalanche Current
Note3
I
AS
17
A
Single Avalanche Energy
Note3
E
AS
28.9
mJ
Notes 1. PW
10
s, Duty Cycle
1%
2. Mounted on ceramic substrate of 1200 mm
2
x 2.2 mm
3. Starting T
ch
= 25C, V
DD
= 15 V, R
G
= 25
, L = 100
H, V
GS
= 20
0 V
Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately
degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible,
and quickly dissipate it once, when it has occurred.
PACKAGE DRAWING (Unit: mm)
1.27
0.12 M
6.0 0.3
4.4
0.40
+0.10
0.05
0.78 MAX.
0.05 MIN.
1.8 MAX.
1.44
0.8
0.5 0.2
0.15
+0.10
0.05
5.37 MAX.
0.10
1
4
8
5
1, 2, 3
; Source
4
; Gate
5, 6, 7, 8 ; Drain
EQUIVALENT CIRCUIT
Source
Body
Diode
Gate
Drain
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Data Sheet G15672EJ2V0DS
2



PA2700GR
ELECTRICAL CHARACTERISTICS (T
A
= 25C, All terminals are connected.)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 30 V, V
GS
= 0 V
10
A
Gate Leakage Current
I
GSS
V
GS
=
20 V, V
DS
= 0 V
100
nA
Gate Cut-off Voltage
V
GS(off)
V
DS
= 10 V, I
D
= 1 mA
1.5
2.0
2.5
V
Forward Transfer Admittance
| y
fs
|
V
DS
= 10 V, I
D
= 9.0 A
11
21.5
S
Drain to Source On-state Resistance
R
DS(on)1
V
GS
= 10 V, I
D
= 9.0 A
4.2
5.3
m
R
DS(on)2
V
GS
= 4.5 V, I
D
= 9.0 A
5.5
7.3
m
R
DS(on)3
V
GS
= 4.0 V, I
D
= 9.0 A
6.3
8.4
m
Input Capacitance
C
iss
V
DS
= 10 V
2600
pF
Output Capacitance
C
oss
V
GS
= 0 V
1000
pF
Reverse Transfer Capacitance
C
rss
f = 1 MHz
340
pF
Turn-on Delay Time
t
d(on)
V
DD
= 15 V, I
D
= 9.0 A
20
ns
Rise Time
t
r
V
GS
= 10 V
24
ns
Turn-off Delay Time
t
d(off)
R
G
= 10
75
ns
Fall Time
t
f
22
ns
Total Gate Charge
Q
G
V
DD
=
15
V
26
nC
Gate to Source Charge
Q
GS
V
GS
=
5
V
7
nC
Gate to Drain Charge
Q
GD
I
D
= 17 A
11
nC
Body Diode Forward Voltage
V
F(S-D)
I
F
= 17 A, V
GS
= 0 V
0.8
1.2
V
Reverse Recovery Time
t
rr
I
F
= 17 A, V
GS
= 0 V
50
ns
Reverse Recovery Charge
Q
rr
di/dt = 100 A/
s
51
nC
TEST CIRCUIT 3 GATE CHARGE
V
GS
= 20
0 V
PG.
R
G
= 25
50
D.U.T.
L
V
DD
TEST CIRCUIT 1 AVALANCHE CAPABILITY
PG.
D.U.T.
R
L
V
DD
TEST CIRCUIT 2 SWITCHING TIME
R
G
PG.
I
G
= 2 mA
50
D.U.T.
R
L
V
DD
I
D
V
DD
I
AS
V
DS
BV
DSS
Starting T
ch
V
GS
0
= 1 s
Duty Cycle
1%
V
GS
Wave Form
V
DS
Wave Form
V
GS
V
DS
10%
0
0
90%
90%
90%
V
GS
V
DS
t
on
t
off
t
d(on)
t
r
t
d(off)
t
f
10%
10%
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Data Sheet G15672EJ2V0DS
3



PA2700GR
TYPICAL CHARACTERISTICS (T
A
= 25C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
T
A
- Ambient Temperature - C
dT - Percentage of Rated Power - %
0
40
20
60
100
140
80
120
160
120
100
80
60
40
20
T
A
- Ambient Temperature - C
P
T
- Total Power Dissipation - W
0
80
20
40
60
100
140
120
160
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
Mounted on ceramic
substrate of
1200 mm
2.2 mm
2
2.8
2.4
2.0
1.6
0.8
1.2
0.4
0
FORWARD BIAS SAFE OPERATING AREA
V
DS
- Drain to Source Voltage - V
I
D
- Drain Current - A
1
0.1
0.01
100
10
0.01
0.1
1
10
T
A
= 25C
Single Pulse
100
I
D(pulse) =
68 A
I
D(DC) =
17 A
R
DS(on)
Limited
(V
GS
= 10 V)
PW = 1 ms
PW = 10 ms
PW = 100 ms
Po
wer Dissipation
Limited
Remark Mounted on ceramic substrate of
1200 mm
2
x 2.2 mm
PW - Pulse Width - s
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
r
th(t)
- Transient Thermal Resistance -
C
/ W
100
0.1
1
10
0.1 1
10
100
1000
0.001
0.01
R
th(ch-A)
= 62.5C/W
Mounted on ceramic substrate of
1200 mm
2.2 mm
Single Pulse
Channel to Ambient
2
5
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Data Sheet G15672EJ2V0DS
4



PA2700GR
FORWARD TRANSFER CHARACTERISTICS
V
GS
- Gate to Source Voltage - V
I
D
- Drain Current - A
Pulsed
1
0
2
3
4
5
1
0.1
0.01
10
100
V
DS
= 10 V
T
A
= 150C
-
25C
75C
25C
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
V
DS
- Drain to Source Voltage - V
I
D
- Drain Current - A
0.2
0.4
0.0
0
20
60
40
80
10
50
30
70
0.6
V
GS
= 10 V
4.5 V
4.0 V
Pulsed
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
I
D
- Drain Current - A
| y
fs
| - Forward Transfer Admittance - S
0.1
1
10
100
10
100
0.1
1
Pulsed
V
DS
= 10 V
T
A
=
-
25C
25C
75C
150C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
V
GS
- Gate to Source Voltage - V
R
DS(on)
- Drain to Source On-state Resistance - m
0
10
15
5
20
Pulsed
20
15
10
5
0
I
D
= 9.0 A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
I
D
- Drain Current - A
R
DS(on)
- Drain to Source On-state Resistance - m
1
0.1
14
12
10
8
6
4
2
0
10
100
Pulsed
V
GS
= 4.0 V
4.5 V
10 V
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
T
ch
- Channel Temperature - C
V
GS(off)
- Gate to Source Cut-off Voltage - V
V
DS
= 10 V
I
D
= 1 mA
1
2
3
-
50
0
50
100
150
-
25
25
75
125
0
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Data Sheet G15672EJ2V0DS
5



PA2700GR
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
T
ch
- Channel Temperature - C
R
DS(on)
- Drain to Source On-state Resistance - m
-
50
-
25
0
0
5
10
15
20
50
100
150
25
75
125
Pulsed
4.5 V
10 V
V
GS
= 4 V
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
1.0
I
SD
- Diode Forward Current - A
0
1.2
1.4
V
SD
- Source to Drain Voltage - V
0.2
0.4
0.6
0.8
Pulsed
0.01
0.1
1
10
100
V
GS
= 0 V
V
DS
- Drain to Source Voltage - V
C
iss
, C
oss
, C
rss
- Capacitance - pF
10
100
1000
10000
0.1
1
10
100
V
GS
= 0 V
f = 1 MHz
CAPACITANCE vs.
DRAIN TO SOURCE VOLTAGE
C
rss
C
oss
C
iss
SWITCHING CHARACTERISTICS
I
D
- Drain Current - A
t
d(on)
, t
r
, t
d(off)
, t
f
- Switching Time - ns
10
1
1
0.1
100
1000
10
100
t
f
t
r
t
d(on)
t
d(off)
V
DD
= 15 V
V
GS
= 10 V
R
G
= 10
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
I
D
- Drain Current - A
t
rr
- Reverse Recovery Time - ns
di/dt = 100 A/ s
V
GS
= 0 V
1
0.1
10
1
10
100
1000
100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
V
GS
- Gate to Source Voltage - V
Q
G
- Gate Charge - nC
V
DS
- Drain to Source Voltage - V
16
0
0
0
2
4
6
8
1
3
5
7
10
20
30
40
5
15
25
35
32
8
24
40
12
28
4
20
36
I
D
= 17 A
V
DD
= 24 V
15 V
6 V
V
DS
V
GS
background image
Data Sheet G15672EJ2V0DS
6



PA2700GR
[MEMO]
background image
Data Sheet G15672EJ2V0DS
7



PA2700GR
[MEMO]
background image



PA2700GR
M8E 00. 4
The information in this document is current as of May, 2002. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of
third parties by or arising from the use of NEC semiconductor products listed in this document or any other
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agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
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