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Электронный компонент: UPD17149GT

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MOS INTEGRATED CIRCUIT
Document No. U13233EJ1V1DS00 (1st edition)
(Previous No. IC-3580)
Date Published January 1998 N CP(K)
Printed in Japan
SMALL, GENERAL-PURPOSE
4-BIT SINGLE-CHIP MICROCONTROLLERS
PD17145(A1), 17147(A1), 17149(A1)
The
PD17145(A1), 17147(A1), and 17149(A1) are 4-bit single-chip microcontrollers integrating an 8-bit
A/D converter (4 channels), a timer function (3 channels), and a serial interface.
These microcontrollers employ a CPU of the general-purpose register type that can execute direct memory
operations and direct memory-to-memory data transfer for efficient programming. All the instructions consist
of 16 bits per word.
In addition, a one-time PROM version, the
PD17P149, is also available for program evaluation.
The functions of these microcontrollers are described in detail in the following User's Manual. Be sure
to read the following manual when designing your system:
PD17145 Subseries User's Manual: IEU-1383
FEATURES
17K architecture
: General-purpose register type
: Instruction length fixed to 16 bits
Program memory (ROM)
:
PD17145(A1) : 2 KB (1024
16 bits)
:
PD17147(A1) : 4 KB (2048
16 bits)
:
PD17149(A1) : 8 KB (4096
16 bits)
Data memory (RAM)
: 110
4 bits
External interrupt
: 1 (INT pin, with sense input)
Instruction execution time
: 2
s (at 8 MHz: ceramic oscillation)
8-bit A/D converter
: 4 channels, absolute accuracy:
1.5 LSB MAX. (V
DD
= 4.0 to 5.5 V)
Timer
: 3 channels
Serial interface
: 1 channel (clocked 3-wire)
POC circuit (mask option)
Operating voltage
: V
DD
= 2.7 to 5.5 V (at 400 kHz to 2 MHz)
: V
DD
= 4.5 to 5.5 V (at 400 kHz to 8 MHz)
Operating temperature
: T
a
= 40 to +110 C
APPLICATIONS
Automotive electronics, etc.
Unless contextually excluded, references in this data sheet to the
PD17149 (A1) mean the
PD17145
(A1) and
PD17147 (A1).
1995
DATA SHEET
2
PD17145(A1), 17147(A1), 17149(A1)
ORDERING INFORMATION
Remark
indicates ROM code suffix.
Part Number
Package
Quality Grade
PD17145CT(A1)-
28-pin plastic shrink DIP (400 mil)
Special
PD17145GT(A1)-
28-pin plastic SOP (375 mil)
Special
PD17147CT(A1)-
28-pin plastic shrink DIP (400 mil)
Special
PD17147GT(A1)-
28-pin plastic SOP (375 mil)
Special
PD17149CT(A1)-
28-pin plastic shrink DIP (400 mil)
Special
PD17149GT(A1)-
28-pin plastic SOP (375 mil)
Special
Please refer to "Quality Grades on NEC Semiconductor Devices" (Document No. C11531E) published by
NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
3
PD17145(A1), 17147(A1), 17149(A1)
POC circuit
Operating voltage
Package
One-time PROM version
PD17P149
Timer
3 channels
Internal interrupt: 4
FUNCTION LIST
Part Number
PD17145 (A1)
PD17147 (A1)
PD17149 (A1)
Item
ROM capacity
2 KB (1024
16 bits)
4 KB (2048
16 bits)
8 KB (4096
16 bits)
RAM capacity
110
4 bits
Stack
Address stack
5, interrupt stack
3
I/O
: 20
I/O ports
23
Input
: 2
Sense input (INT pin
Note
)
: 1
A/D converter input
4 channels (shared with port pins), absolute accuracy:
1.5 LSB MAX.
8-bit timer/counter:
2 channels (can be used as 1 channel of 16-bit timer)
7-bit basic interval timer:
1 channel (can be used as watchdog timer)
Serial interface
1 channel (3-wire)
Multiple interrupt by hardware (3 levels MAX.)
External interrupt (INT): 1
Rising edge, falling edge, or both rising and falling
edges selectable for detection.
Interrupt
Timer 0 (TM0)
Timer 1 (TM1)
Basic interval timer (BTM)
Serial interface (SIO)
Instruction execution time
2
s (at 8 MHz, ceramic oscillation)
Standby function
HALT, STOP
Mask option
(Can be used in application circuit that operates on V
DD
= 5 V
10 %, 400 kHz to 4 MHz)
2.7 to 5.5 V (at 400 kHz to 2 MHz)
4.5 to 5.5 V (at 400 kHz to 8 MHz)
28-pin plastic shrink DIP (400 mil)
28-pin plastic SOP (375 mil)
Quality grade is "standard" and not (A1).
Operating temperature range: T
a
= 40 to +85 C
Note
The INT pin is used as an input pin (sense input) when the external interrupt function is not used.
The status of this pin is read by using the INT flag of a control register, not by a port register.
Caution
The PROM version is functionally compatible with the mask ROM versions but its internal
circuit and part of the electrical characteristics are different from those of the mask ROM
versions. To replace the PROM version with a mask ROM version, thoroughly conduct
application evaluation by using a sample of the mask ROM version.
4
PD17145(A1), 17147(A1), 17149(A1)
PIN CONFIGURATION (Top View)
28-pin plastic shrink DIP (400 mil)
28-pin plastic SOP (375 mil)
ADC
0
-ADC
3
: analog input
GND
: ground
INT
: external interrupt input
P0A
0
to P0A
3
: port 0A
P0B
0
to P0B
3
: port 0B
P0C
0
to P0C
3
: port 0C
P0D
0
to P0D
3
: port 0D
P0E
0
to P0E
3
: port 0E
P0F
0
and P0F
1
: port 0F
RESET
: reset input
RLS
: standby release signal input
SCK
: serial clock I/O
SI
: serial data input
SO
: serial data output
TM1OUT
: timer 1 output
V
DD
: power
V
REF
: A/D converter reference voltage
X
IN
, X
OUT
: for system clock oscillation
V
DD
P0F
1
/V
REF
P0C
3
/ADC
3
P0C
2
/ADC
2
P0C
1
/ADC
1
P0C
0
/ADC
0
P0B
3
P0B
2
P0B
1
P0B
0
P0A
3
P0A
2
P0A
1
P0A
0
GND
X
IN
X
OUT
RESET
INT
P0F
0
/RLS
P0D
0
/SCK
P0D
2
/SI
P0D
3
/TM1OUT
P0E
1
P0E
2
P0E
3
P0D
1
/SO
P0E
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PD17145CT(A1) -
PD17145GT(A1) -
PD17147CT(A1) -
PD17147GT(A1) -
PD17149CT(A1) -
PD17149GT(A1) -
5
PD17145(A1), 17147(A1), 17149(A1)
BLOCK DIAGRAM
Notes 1.
The ROM capacity of each product is as follows:
1024
16 bits:
PD17145(A1)
2048
16 bits:
PD17147(A1)
4096
16 bits:
PD17149(A1)
2.
The stack capacity of each product is as follows:
5
10 bits:
PD17145(A1)
5
11 bits:
PD17147(A1)
5
12 bits:
PD17149(A1)
Remark
CMOS or N-ch in ( ) indicate the output format of the port.
CMOS : CMOS push-pull output
N-ch
: N-ch open-drain output
V
DD
P0A
3
P0A
2
P0A
1
P0A
0
P0B
3
P0B
2
P0B
1
P0B
0
P0C
3
/ADC
3
P0C
2
/ADC
2
P0C
1
/ADC
1
P0C
0
/ADC
0
P0F
1
/V
REF
P0F
0
/RLS
P0D
3
/TM1OUT
P0D
2
/SI
P0D
1
/SO
P0D
0
/SCK
TM1
Serial
Interface
P0D
(N-ch)
P0F
A/D
Converter
P0C
(CMOS)
P0B
(CMOS)
P0A
(CMOS)
RF
RAM
110
4 bits
SYSTEM REG.
ALU
ROM
Note 1
Program Counter
Stack
Note 2
IRQSIO
Instruction
Decoder
P0E
(N-ch)
Timer 0
Timer 1
Basic Interval Timer
Interrupt
Controller
Clock
Divider
System Clock
Generator
fx/2
N
CPU CLOCK CLK STOP
X
IN
X
OUT
INT
IRQTM0
IRQTM1
IRQBTM
IRQSIO
IRQBTM
fx/2
N
fx/2
N
fx/2
N
IRQTM1
IRQTM0
P0E
3
P0E
2
P0E
1
P0E
0
RESET
GND