Document Outline
- COVER
- DESCRIPTION
- FEATURES
- APPLICATION
- ORDERING INFORMATION
- DIFFERENCE BETWEEN uPD17236 SUBSERIES AND uPD17225 SUBSERIES
- PIN CONFIGURATION (TOP VIEW)
- BLOCK DIAGRAM
- 1. PIN FUNCTIONS
- 1.1 Pin Function List
- 1.2 Input/Output Circuits
- 1.3 Processing of Unused Pins
- 2. MEMORY SPACE
- 2.1 Program Counter (PC)
- 2.2 Program Memory (ROM)
- 2.3 Stack
- 2.4 Data Memory (RAM)
- 2.5 Register File (RF)
- 3. PORTS
- 3.1 Port 0A (P0A0 through P0A3 )
- 3.2 Port 0B (P0B0 through P0B3 )
- 3.3 Port 0C (P0C0 through P0C3 )
- 3.4 Port 0D (P0D0 through P0D3 )
- 3.5 Port 0E (P0E0 through P0E3 )
- 3.6 Port 1A (P1A0 )
- 3.7 INT Pin
- 3.8 Switching Bit I/O
- 3.9 Selecting I/O Mode of Group I/O
- 3.10 Specifying Pull-up Resistor Connection
- 4. CLOCK GENERATOR CIRCUIT
- 4.1 Instruction Execution Time (CPU Clock) Selection
- 5. 8-BIT TIMER AND REMOTE CONTROLLER CARRIER GENERATOR CIRCUIT
- 5.1 Configuration of 8-bit Timer (with modulo function)
- 5.2 Function of 8-bit Timer (with modulo function)
- 5.3 Carrier Generator Circuit for Remote Controller
- 6. BASIC INTERVAL TIMER/WATCHDOG TIMER
- 6.1 Source Clock for Basic Interval Timer
- 6.2 Controlling Basic Interval Timer
- 6.3 Operation Timing for Watchdog Timer
- 7. INTERRUPT FUNCTIONS
- 7.1 Interrupt Sources
- 7.2 Hardware of Interrupt Control Circuit
- 7.3 Interrupt Sequence
- 8. STANDBY FUNCTIONS
- 8.1 HALT Mode
- 8.2 HALT Instruction Execution Conditions
- 8.3 STOP Mode
- 8.4 STOP Instruction Execution Conditions
- 8.5 Releasing Standby Mode
- 9. RESET
- 9.1 Reset by Reset Signal Input
- 9.2 Reset by Watchdog Timer (With RESET# pin internally pulled down)
- 9.3 Reset by Stack Pointer (With RESET# pin internally pulled down)
- 10. LOW-VOLTAGE DETECTOR CIRCUIT (WITH RESET# PIN INTERNALLY PULLED DOWN)
- 11. ASSEMBLER RESERVED WORDS
- 11.1 Mask Option Directives
- 11.2 Reserved Symbols
- 12. INSTRUCTION SET
- 12.1 Instruction Set Outline
- 12.2 Legend
- 12.3 List of Instruction Sets
- 12.4 Assembler (RA17K) Built-In Macro Instruction
- 13. ELECTRICAL SPECIFICATIONS
- 14. APPLICATION CIRCUIT EXAMPLE
- 15. PACKAGE DRAWINGS
- 16. RECOMMENDED SOLDERING CONDITIONS
- APPENDIX A. DIFFERENCES BETWEEN uPD17236 AND uPD17P236
- APPENDIX B. FUNCTIONAL COMPARISON OF uPD17236 SUBSERIES RELATED PRODUCTS
- APPENDIX C. DEVELOPMENT TOOLS
1999
DATA SHEET
MOS INTEGRATED CIRCUIT
PD17230,17231,17232,17233,17234,17235,17236
DESCRIPTION
PD17230, 17231, 17232, 17233, 17234, 17235, 17236 (hereafter called
PD17236 subseries) are 4-bit single-
chip microcontrollers for small general-purpose infrared remote control transmitters.
It employs a 17K architecture of general-purpose register type devices for the CPU, and can directly execute
operations between memories instead of the conventional method of executing operations through the accumulator.
Moreover, all the instructions are 16-bit 1-word instructions which can be programmed efficiently.
In addition, a one-time PROM model,
PD17P236
Note
, to which data can be written only once, is also available.
It is convenient either for evaluating the
PD17236 subseries programs or small-scale production of application
systems.
Note
Under development
Detailed functions are described in the following manual. Be sure to read this manual when designing your
system.
PD172
Subseries User's Manual: U12795E
FEATURES
Infrared remote controller carrier generator circuit (REM output)
17K architecture: General-purpose register system
Program memory (ROM), Data memory (RAM)
PD17230
PD17231
PD17232
PD17233
PD17234
PD17235
PD17236
Program
4 K bytes
8 K bytes
12 K bytes
16 K bytes
20 K bytes
24 K bytes
32 K bytes
memory (ROM) (2048
16)
(4096
16)
(6144
16)
(8192
16)
(10240
16) (12288
16) (16384
16)
Data memory
223
4 bits
(RAM)
8-bit timer
: 1 channel
Basic internal timer/Watchdog timer : 1 channel
Instruction execution time (can be changed in two steps)
at f
X
= 4 MHz
: 4
s (high-speed mode)/8
s (ordinary mode)
at f
X
= 8 MHz
: 2
s (high-speed mode)/4
s (ordinary mode)
External interrupt pin (INT)
: 1
I/O pins
: 21
Supply voltage
: V
DD
= 2.2 to 3.6 V (at f
X
= 8 MHz (high-speed mode))
V
DD
= 2.0 to 3.6 V (at f
X
= 4 MHz (high-speed mode))
Low-voltage detector circuit (mask option)
Unless otherwise specified, the
PD17236 is treated as the representative model throughout this document.
Document No. U14360EJ1V0DS00 (1st edition)
Date Published July 1999 N CP (K)
Printed in Japan
4-BIT SINGLE-CHIP MICROCONTROLLER
FOR SMALL GENERAL-PURPOSE INFRARED
REMOTE CONTROL TRANSMITTER
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Data Sheet U14360EJ1V0DS00
PD17230, 17231, 17232, 17233, 17234, 17235, 17236
2
APPLICATION
Preset remote controllers, toys, portable systems, etc.
ORDERING INFORMATION
Part Number
Package
PD17230MC-
-5A4
30-pin plastic shrink SOP (300 mil)
PD17231MC-
-5A4
30-pin plastic shrink SOP (300 mil)
PD17232MC-
-5A4
30-pin plastic shrink SOP (300 mil)
PD17233MC-
-5A4
30-pin plastic shrink SOP (300 mil)
PD17234MC-
-5A4
30-pin plastic shrink SOP (300 mil)
PD17235GT-
28-pin plastic SOP (375 mil)
PD17235MC-
-5A4
30-pin plastic shrink SOP (300 mil)
PD17236GT-
28-pin plastic SOP (375 mil)
PD17236MC-
-5A4
30-pin plastic shrink SOP (300 mil)
Remark
indicates ROM code suffix.
DIFFERENCE BETWEEN
PD17236 SUBSERIES AND
PD17225 SUBSERIES
Item
PD17236 Subseries
PD17225 Subseries
ROM capacity
PD17230: 2048
16 bits
PD17225: 2048
16 bits
PD17231: 4096
16 bits
PD17226: 4096
16 bits
PD17232: 6144
16 bits
PD17227: 6144
16 bits
PD17233: 8192
16 bits
PD17228: 8192
16 bits
PD17234: 10240
16 bits
PD17235: 12288
16 bits
PD17236: 16384
16 bits
Port
P0B
0
-P0B
3
: I/O (bit I/O)
P0B
0
-P0B
3
: Input
P0C
0
-P0C
3
: I/O (group I/O)
P0C
0
-P0C
3
: Output
P0D
0
-P0D
3
: I/O (group I/O)
P0D
0
-P0D
3
: Output
P1A
0
: Input or output selectable by mask option
Reset
RESET pin is internally pulled down by
Low level is output from WDOUT pin by
Reset by watchdog timer
occurrence of the internal reset signals on the
occurrence of the internal reset signals on the
Reset by stack pointer
left, and reset takes place (usually, RESET pin
left, and reset takes place if the WDOUT pin
Low-voltage detection
is pulled up).
is externally connected to the RESET pin.
circuit (mask option)
STOP mode release
<1> When any of pins P0A
0
-P0A
3
goes low
When any of P0A
0
-P0A
3
or P0B
0
-P0B
3
goes
condition
<2> When P0B
0
-P0B
3
, P0C
0
-P0C
3
, and
low
P0D
0
-P0D
3
are used as input pins and
any of them goes low
<3> When the interrupt request (IRQ) of an
interrupt for which IP flag is set is
generated at rising or falling edge of INT pin
Carrier frequency
Selected by mask option
7.8 kHz to 1 MHz
(f
X
= 4 MHz)
<1> If carrier generation clock (Rf
X
) is f
X
/2:
7.8 kHz to 1 MHz
<2> If carrier generation clock (Rf
X
) is f
X
:
15.6 kHz to 2 MHz
Pin 14
P1A
0
pin
WDOUT pin
Data Sheet U14360EJ1V0DS00
PD17230, 17231, 17232, 17233, 17234, 17235, 17236
3
PIN CONFIGURATION (TOP VIEW)
28-pin plastic SOP (375 mil)
PD17235GT-
, 17236GT-
P0D
2
P0D
3
INT
P0E
0
P0E
1
P0E
2
P0E
3
REM
V
DD
X
OUT
X
IN
GND
RESET
P1A
0
P0D
1
P0D
0
P0C
3
P0C
2
P0C
1
P0C
0
P0B
3
P0B
2
P0B
1
P0B
0
P0A
3
P0A
2
P0A
1
P0A
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Data Sheet U14360EJ1V0DS00
PD17230, 17231, 17232, 17233, 17234, 17235, 17236
4
GND
:
Ground
IC1, IC2
:
Internally connected
INT
:
External interrupt request signal input
P0A
0
-P0A
3
:
Input port (CMOS input)
P0B
0
-P0B
3
:
Input/output port (CMOS input/N-ch open-drain output)
P0C
0
-P0C
3
:
Input/output port (CMOS input/N-ch open-drain output)
P0D
0
-P0D
3
:
Input/output port (CMOS input/N-ch open-drain output)
P0E
0
-P0E
3
:
Input/output port (CMOS push-pull output)
P1A
0
:
Input port (CMOS input/N-ch open-drain output)
Note
REM
:
Remote controller output (CMOS push-pull output)
RESET
:
Reset input
V
DD
:
Power supply
X
IN
, X
OUT
:
Resonator connection
Note
Input or output is selected by mask option.
30-pin plastic shrink SOP (300 mil)
PD17230MC-
-5A4,
PD17231MC-
-5A4,
PD17232MC-
-5A4,
PD17233MC-
-5A4,
PD17234MC-
-5A4,
PD17235MC-
-5A4,
PD17236MC-
-5A4
P0D
2
P0D
3
INT
P0E
0
P0E
1
P0E
2
P0E
3
REM
V
DD
X
OUT
X
IN
GND
RESET
P1A
0
IC1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
IC2
P0D
1
P0D
0
P0C
3
P0C
2
P0C
1
P0C
0
P0B
3
P0B
2
P0B
1
P0B
0
P0A
3
P0A
2
P0A
1
P0A
0
Data Sheet U14360EJ1V0DS00
PD17230, 17231, 17232, 17233, 17234, 17235, 17236
5
BLOCK DIAGRAM
Note
Input or output selectable by mask option.
P0A
0
P0A
1
P0A
2
P0A
3
P0B
0
P0C
0
P0D
0
P0E
0
P0B
1
P0C
1
P0D
1
P0E
1
P0B
2
P0C
2
P0D
2
P0E
2
P0B
3
P0C
3
P0D
3
P0E
3
P0A
P0B
P0C
P0D
P0E
RF
SYSTEM REG.
ALU
Remote
Control
Divider
REM
INT
8-bit Timer
Interrupt
Controller
V
DD
GND
X
IN
X
OUT
Instruction
Decoder
Program Counter
Stack (5 levels)
Basic Interval/
Watchdog Timer
Power
Supply
Circuit
CPU Clock
OSC
223
4 bits
RAM
PD17230 : 2048
16 bits
PD17231 : 4096
16 bits
PD17232 : 6144
16 bits
PD17233 : 8192
16 bits
PD17234 : 10240
16 bits
PD17235 : 12288
16 bits
PD17236 : 16384
16 bits
ROM
RESET
Reset
Controller
P1A
0
Note
P1A
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