MOS INTEGRATED CIRCUIT

µ
µ
µ
µ

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

8-BIT SINGLE-CHIP MICROCONTROLLERS

Document No. U12804EJ2V1DS00 (2nd edition)
Date Published February 2000 N CP(K)
Printed in Japan

DATA SHEET

1998, 1999

The mark shows major revised points.

The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.

The

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), and

780988(A) are members of the

PD780988 Subseries of the 78K/0 Series. These microcontrollers are suitable for

general-purpose inverter control.

The

PD780988 Subseries provides expanded internal ROM and RAM capacities as well as inverter control,

timers, and serial interfaces.

The

PD780982(A), 780983(A), 780984(A), 780986(A), and 780988(A) are applied a stricter quality assurance

program than the

PD780982, 780983, 780984, 780986, and 780988 (standard grade) (NEC classifies these

products as special grade in its quality grade classification).

A flash memory version, the

PD78F0988, which can operate within the same power supply voltage range as the

mask ROM version, and various development tools are also available.

Detailed function descriptions are provided in the following user's manuals. Be sure to read them before

designing.

µ
µ
µ
µ

PD780988 Subseries User's Manual:

U13029E

78K/0 Series User's Manual Instructions: U12326E

FEATURES

On-chip ROM and RAM

Data Memory

Item

Part Number

Program

Memory

(ROM)

Internal High-

Speed RAM

Internal

Expansion RAM

Package

PD780982, 780982(A)

16 Kbytes

PD780983, 780983(A)

24 Kbytes

PD780984, 780984(A)

32 Kbytes

None

PD780986, 780986(A)

48 Kbytes

PD780988, 780988(A)

60 Kbytes

1024 bytes

64-pin plastic SDIP (19.05 mm (750))

Note

64-pin plastic QFP (14

14 mm)

Note Only for standard-grade products

External memory expansion space:

256 bytes (except

PD780988 and 780988(A))

Minimum instruction execution time:

0.24

s (@ f

= 8.38 MHz operation)

I/O ports: 47

Timer outputs for 10-bit inverter control: 6

8-bit real-time output ports: 8

10-bit resolution A/D converter: 8 channels

Serial interface: 3 channels

Timer: 7 channels

Power supply voltage: V

= 4.0 to 5.5 V

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

APPLICATIONS

Motor control for inverter-type air conditioners, washing machines, refrigerators, etc.

ORDERING INFORMATION

Part Number

Package

Quality Grade

PD780982CW-

×××

64-pin plastic SDIP (19.05 mm (750)) Standard (for general electronic equipment)

PD780983CW-

×××

64-pin plastic SDIP (19.05 mm (750)) Standard (for general electronic equipment)

PD780984CW-

×××

64-pin plastic SDIP (19.05 mm (750)) Standard (for general electronic equipment)

PD780986CW-

×××

64-pin plastic SDIP (19.05 mm (750)) Standard (for general electronic equipment)

PD780988CW-

×××

64-pin plastic SDIP (19.05 mm (750)) Standard (for general electronic equipment)

PD780982GC-

×××

-AB8

64-pin plastic QFP (14

14 mm)

Standard (for general electronic equipment)

PD780983GC-

×××

-AB8

64-pin plastic QFP (14

14 mm)

Standard (for general electronic equipment)

PD780984GC-

×××

-AB8

64-pin plastic QFP (14

14 mm)

Standard (for general electronic equipment)

PD780986GC-

×××

-AB8

64-pin plastic QFP (14

14 mm)

Standard (for general electronic equipment)

PD780988GC-

×××

-AB8

64-pin plastic QFP (14

14 mm)

Standard (for general electronic equipment)

PD780982GC(A)-

×××

-AB8 64-pin plastic QFP (14

14 mm) Special (for high-reliability electrical machinery

and apparatus)

PD780983GC(A)-

×××

-AB8 64-pin plastic QFP (14

14 mm) Special (for high-reliability electrical machinery

and apparatus)

PD780984GC(A)-

×××

-AB8 64-pin plastic QFP (14

14 mm) Special (for high-reliability electrical machinery

and apparatus)

PD780986GC(A)-

×××

-AB8 64-pin plastic QFP (14

14 mm) Special (for high-reliability electrical machinery

and apparatus)

PD780988GC(A)-

×××

-AB8 64-pin plastic QFP (14

14 mm)

Special (for high-reliability electrical machinery

and apparatus)

Remark

×××

indicates ROM code suffix.

Please refer to "Quality Grades on NEC Semiconductor Devices" (Document No. C11531E) published by NEC

Corporation to know the specification of quality grade in the device and its recommended applications.

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A),780984(A), 780986(A), 780988(A)

78K/0 SERIES LINEUP

The products in the 78K/0 Series are listed below. The names enclosed in boxes are subseries names.

PD780824

PD78083

PD78044F

80-pin

Basic subseries for FIP drive, Total display outputs: 34

PD78044H

80-pin

PD78044F with N-ch open-drain I/O, Total display outputs: 34

PD780232

80-pin

For panel control and on-chip FIP C/D, Total display outputs: 53

PD780034A

PD780024A

PD780024AY

PD78014H

PD78018F

64-pin

PD780024A with enhanced A/D converter

PD78018F with enhanced serial I/O

PD78018F with reduced EMI noise

Basic subseries for control

PD78018FY

PD780034AY

PD780078

64-pin

PD780034A with timer and enhanced serial I/O

PD780078Y

PD780208

PD780228

PD780308

PD78064B

PD78064

PD780308Y

PD78064Y

42/44-pin

100-pin

For LCD drive

For FIP

drive

78K/0
Series

On-chip UART and capable of low-voltage (1.8 V) operation

PD78044F with enhanced I/O and FIP C/D, Total display outputs: 53

PD78044H with enhanced I/O and FIP C/D, Total display outputs: 48

PD780988

64-pin

For inverter control

PD780841

80-pin

Call ID supported

On-chip inverter control circuit and UART, EMI noise reduced product

On-chip Call ID function and simple DTMF, EMI noise reduced product

PD78064 with enhanced SIO and expanded ROM and RAM

PD78064 with reduced EMI noise

Basic subseries for LCD drive and on-chip UART

80-pin

On-chip J1850 (CLASS2) controller

Specialized in DCAN controller

PD78098B

PD780955

PD780973A

80-pin

For meter control

Bus interface supported

PD78054 with IEBus

controller, EMI noise reduced product

On-chip DCAN/IEBus controller

On-chip controller/driver for automobile meter driving

80-pin

For automobile meter driving and on-chip DCAN controller

In mass-production

Under development

Y subseries products support I

C bus.

PD780065

80-pin

PD780024A with expanded RAM

PD780058

PD78058F

PD78054

80-pin

PD78054 with enhanced serial I/O

PD78054 with reduced EMI noise

PD78018F with UART and D/A converter, and enhanced I/O

100-pin

PD78078

PD78070A

PD78075B

100-pin

For control

PD78054 with timer and enhanced external interface function

PD78078 with reduced EMI noise

ROM-less version of the PD78078

PD78078Y with enhanced serial I/O and restricted function

PD78054Y

PD78058FY

PD780058Y

PD780018AY

PD78070AY

PD78078Y

PD780948

100-pin

On-chip DCAN controller

PD780958

100-pin

For industrial meter control

PD780814

64-pin

PD780833Y

PD780701Y

µ
µ

Ultra low power consumption and on-chip UART

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

The major functional differences among the subseries are listed below.

Timer

Function

Subseries Name

ROM

Capacity

8-bit 16-bit Watch WDT

8-Bit

A/D

10-Bit

A/D

8-Bit

D/A

Serial

Interface

I/O

MIN.

Value

External

Expansion

PD78075B

32 K to 40 K

PD78078

48 K to 60 K

1.8 V

PD78070A

4 ch

3 ch (UART: 1 ch)

2.7 V

PD780058

24 K to 60 K

3 ch (time-division

UART: 1 ch)

1.8 V

PD78058F

48 K to 60 K

2.7 V

PD78054

16 K to 60 K

2 ch

3 ch (UART: 1 ch)

2.0 V

PD780065

40 K to 48 K

1 ch

8 ch

4 ch (UART: 1 ch)

2.7 V

PD780078

48 K to 60 K

2 ch

3 ch (UART: 2 ch)

PD780034A

8 ch

PD780024A

3 ch (UART: 1 ch)

PD78014H

8 K to 32 K

PD78018F

8 K to 60 K

1 ch

2 ch

For

control

PD78083

8 K to 16 K

2 ch

1 ch

8 ch

1 ch (UART: 1 ch)

1.8 V

For

inverter

control

PD780988

16 K to 60 K

3 ch Note

1 ch

8 ch

3 ch (UART: 2 ch)

4.0 V

PD780208

32 K to 60 K

2 ch 1 ch 1 ch

2 ch

2.7 V

PD780228

48 K to 60 K

8 ch

1 ch

PD780232

16 K to 24 K

3 ch

4 ch

2 ch

4.5 V

PD78044H

32 K to 48 K

1 ch

For

FIP

drive

PD78044F

16 K to 40 K

2 ch 1 ch 1 ch

1 ch

8 ch

2 ch

2.7 V

PD780308

48 K to 60 K

3 ch (time-division

UART: 1 ch)

PD78064B

32 K

For

LCD

drive

PD78064

16 K to 32 K

2 ch 1 ch 1 ch 1 ch

8 ch

2 ch (UART: 1 ch)

2.0 V

Call ID

supported

PD780841

24 K to 32 K

2 ch

1 ch 1 ch

2 ch

2 ch (UART: 1 ch)

2.7 V

PD780948

60 K

2 ch

4.0 V

PD78098B

40 K to 60 K

1 ch

8 ch

2 ch

3 ch (UART: 1 ch)

2.7 V

Bus

interface

supported

PD780814

32 K to 60 K

2 ch

1 ch 1 ch

12 ch

2 ch (UART: 1 ch)

4.0 V

PD780958

48 K to 60 K

4 ch 2 ch

2 ch (UART: 1 ch)

PD780955

40 K

6 ch

1 ch

2 ch (UART: 2 ch)

2.2 V

PD780973A

24 K to 32 K

4.5 V

For

meter

control

PD780824

32 K to 60 K

3 ch

1 ch

5 ch

2 ch (UART: 1 ch)

4.0 V

Note 16-bit timer: 2 channels

10-bit timer: 1 channel

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A),780984(A), 780986(A), 780988(A)

OVERVIEW OF FUNCTIONS

Part Number

Item

PD780982

PD780982(A)

PD780983

PD780983(A)

PD780984

PD780984(A)

PD780986

PD780986(A)

PD780988

PD780988(A)

ROM

16 Kbytes

24 Kbytes

32 Kbytes

48 Kbytes

60 Kbytes

High-speed RAM

1024 bytes

Internal memory

Expansion RAM

None

1024 bytes

Memory space

64 Kbytes

General-purpose registers

8 bits

32 registers (8 bits

8 registers

4 banks)

Minimum instruction execution time

On-chip minimum instruction execution time variable function

0.24

s/0.48

s/0.96

s/1.9

s/3.8

s (@ 8.38 MHz operation with system clock)

Instruction set

16-bit operation

Multiply/divide (8 bits

8 bits, 16 bits

8 bits)

Bit manipulation (set, reset, test, Boolean operation)

BCD adjust, etc.

I/O ports

Total:

CMOS inputs:

CMOS I/O:

Real-time output ports

8 bits

1 or 4 bits

6 bits

1 or 4 bits

A/D converter

10-bit resolution

8 channels

Power supply voltage: AV

= 4.0 to 5.5 V

Serial interfaces

UART mode: 2 channels

3-wire serial I/O mode: 1 channel

Timers

16-bit timer/event counter:

2 channels

8-bit timer/event counter:

3 channels

10-bit inverter control timer: 1 channel

Watchdog timer:

1 channel

Timer output

11 (General-purpose output: 5, inverter control output: 6)

Maskable

Internal: 16, external: 8

Non-maskable

Internal: 1

Vectored interrupt
sources

Software

Power supply voltage

= 4.0 to 5.5 V

Operating ambient temperature

40 to +85

Package

64-pin plastic SDIP (19.05 mm (750))

Note

64-pin plastic QFP (14

14 mm)

Note Only for standard-grade products

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

CONTENTS

PIN CONFIGURATION (Top View)...................................................................................................... 7

BLOCK DIAGRAM ............................................................................................................................. 10

PIN FUNCTIONS................................................................................................................................. 11

3.1

Port Pins .................................................................................................................................................... 11

3.2

Non-Port Pins ............................................................................................................................................ 12

3.3

Pin I/O Circuits and Recommended Connection of Unused Pins ........................................................ 14

MEMORY SPACE ............................................................................................................................... 16

PERIPHERAL HARDWARE FUNCTION FEATURES....................................................................... 21

5.1

Ports........................................................................................................................................................... 21

5.2

Clock Generator ........................................................................................................................................ 22

5.3

Timer/Event Counters............................................................................................................................... 23

5.4

Real-Time Output Ports ............................................................................................................................ 27

5.5

A/D Converter............................................................................................................................................ 30

5.6

Serial Interfaces ........................................................................................................................................ 31

INTERRUPT FUNCTIONS.................................................................................................................. 33

EXTERNAL DEVICE EXPANSION FUNCTION ................................................................................. 37

STANDBY FUNCTIONS ..................................................................................................................... 37

RESET FUNCTIONS........................................................................................................................... 37

10. INSTRUCTION SET ............................................................................................................................ 38

11. ELECTRICAL SPECIFICATIONS ...................................................................................................... 41

12. PACKAGE DRAWINGS ..................................................................................................................... 55

13. RECOMMENDED SOLDERING CONDITIONS ................................................................................. 57

APPENDIX A. DEVELOPMENT TOOLS .................................................................................................. 58

APPENDIX B. RELATED DOCUMENTS .................................................................................................. 61

Data Sheet U12804E2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

PIN CONFIGURATION (Top View)

·
·
·
·

64-Pin Plastic SDIP (19.05 mm (750))

PD780982CW-

×××

, 780983CW-

×××

, 780984CW-

×××

, 780986CW-

×××

, 780988CW-

×××

Caution

Connect the TEST pin directly to V

SS0

Remark

When the

PD780982, 780983, 780984, 780986, and 780988 are used in applications where the noise

generated inside the microcontroller needs to be reduced, the implementation of noise reduction

measures, such as supplying voltage to V

DD0

and V

DD1

individually and connecting V

SS0

and V

SS1

different ground lines, is recommended.

P40/AD0

P41/AD1

P42/AD2

P43/AD3

P44/AD4

P45/AD5

P46/AD6

P47/AD7

P50

P51/SCK

P52/SI

P53/SO

P54/TI000/TO00/INTP4

P55/TI010/INTP5

P56/TI001/TO01/INTP6

P57/TI011/INTP7

SS0

DD0

TO70

TO71

TO72

TO73

TO74

TO75

P20/RxD00

P21/TxD00

P22/RxD01

P23/TxD01

P24/TI50/TO50

P25/TI51/TO51

P26/TI52/TO52

DD1

P67/ASTB

P66/WAIT

P65/WR

P64/RD

P37/RTP7

P36/RTP6

P35/RTP5

P34/RTP4

P33/RTP3

P32/RTP2

P31/RTP1

P30/RTP0

P01/INTP1

P00/INTP0/TOFF7

SS1

TEST

P03/INTP3/ADTRG

P02/INTP2

RESET

REF

P10/ANI0

P11/ANI1

P12/ANI2

P13/ANI3

P14/ANI4

P15/ANI5

P16/ANI6

P17/ANI7

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986,780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

·
·
·
·

64-Pin Plastic QFP (14

×
×
×
×

14 mm)

PD780982GC-

×××

-AB8, 780983GC-

×××

-AB8, 780984GC-

×××

-AB8, 780986GC-

×××

-AB8, 780988GC-

×××

-AB8

PD780982GC(A)-

×××

-AB8, 780983GC(A)-

×××

-AB8, 780984GC(A)-

×××

-AB8, 780986GC(A)-

×××

-AB8,

PD780988GC(A)-

×××

-AB8

Caution

Connect the TEST pin directly to V

SS0

Remark

When the

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A),

780986(A), and 780988(A) are used in applications where the noise generated inside the

microcontroller needs to be reduced, the implementation of noise reduction measures, such as

supplying voltage to V

DD0

and V

DD1

individually and connecting V

SS0

and V

SS1

to different ground lines, is

recommended.

P50

P51/SCK

P52/SI

P53/SO

P54/TI000/TO00/INTP4

P55/TI010/INTP5

P56/TI001/TO01/INTP6

P57/TI011/INTP7

SS0

DD0

TO70

TO71

TO72

TO73

TO74

TO75

P33/RTP3

P32/RTP2

P31/RTP1

P30/RTP0

P01/INTP1

P00/INTP0/TOFF7

SS1

TEST

P03/INTP3/ADTRG

P02/INTP2

RESET

REF

P10/ANI0

P20/RxD00

P21/TxD00

P22/RxD01

P23/TxD01

P24/TI50/TO50

P25/TI51/TO51

P26/TI52/TO52

DD1

P17/ANI7

P16/ANI6

P15/ANI5

P14/ANI4

P13/ANI3

P12/ANI2

P11/ANI1

P47/AD7

P46/AD6

P45/AD5

P44/AD4

P43/AD3

P42/AD2

P41/AD1

P40/AD0

P67/ASTB

P66/WAIT

P65/WR

P64/RD

P37/RTP7

P36/RTP6

P35/RTP5

P34/RTP4

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Data Sheet U12804E2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

AD0 to AD7:

Address/Data Bus

RxD00, RxD01:

Receive Data

ADTRG:

AD Trigger Input

SCK:

Serial Clock

ANI0 to ANI7:

Analog Input

SI:

Serial Input

ASTB:

Address Strobe

SO:

Serial Output

Analog Power Supply

TEST:

Test

REF

Analog Reference Voltage

TI000, TI001,

Analog Ground

TI010, TI011,

INTP0 to INTP7:

External Interrupt Input

TI50 to TI52:

Timer Input

P00 to P03:

Port 0

TO00, TO01,

P10 to P17:

Port 1

TO50 to TO52,

P20 to P26:

Port 2

TO70 to TO75:

Timer Output

P30 to P37:

Port 3

TOFF7:

Timer Output Off

P40 to P47:

Port 4

D00, T

D01:

Transmit Data

P50 to P57:

Port 5

DD0

, V

DD1

Power Supply

P64 to P67:

Port 6

SS0

, V

SS1

Ground

RD:

Read Strobe

WAIT:

Wait

RESET:

Reset

WR:

Write Strobe

RTP0 to RTP7:

Real-time Port

X1, X2:

Crystal

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986,780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

BLOCK DIAGRAM

Remark

Internal ROM and RAM capacities vary depending on the product.

8-bit timer/
event counter 50

8-bit timer/
event counter 51

8-bit timer/
event counter 52

Watchdog timer

A/D converter

Interrupt

control

Real-time

output port

TO50/TI50/P24

ANI0/P10 to

ANI7/P17

REF

INTP1/P01,

INTP2/P02

78K/0
CPU core

ROM

RAM

DD0

DD1

SS0

SS1

TEST

Port 0

Port 1

Port 2

Port 3

Port 4

Port 5

Port 6

External

access

System

control

P00 to P03

P10 to P17

P20 to P26

P30 to P37

P40 to P47

P50 to P57

P64 to P67

AD0/P40 to
AD7/P47

RD/P64

WR/P65

WAIT/P66

ASTB/P67

RESET

16-bit timer/
event
counter 00

TI000/TO00/INTP4/P54

TI010/INTP5/P55

16-bit timer/
event
counter 01

TI001/TO01/INTP6/P56

TI011/INTP7/P57

TO51/TI51/P25

TO52/TI52/P26

UART00

UART01

RTP0/P30 to
RTP7/P37

TxD00/P21

RxD00/P20

TxD01/P23

RxD01/P22

SIO3

SCK/P51

SI/P52

SO/P53

INTP0/TOFF7/P00

INTP3/ADTRG/P03

INTP4/TI000/TO00/P54

INTP5/TI010/P55

INTP6/TI001/TO01/P56

INTP7/TI011/P57

Real-time
pulse unit

TO70 to TO75

Data Sheet U12804E2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

PIN FUNCTIONS

3.1

Port Pins

Pin Name

I/O

Function

After Reset

Alternate

Function

P00

INTP0/TOFF7

P01

INTP1

P02

INTP2

P03

I/O

Port 0.

4-bit I/O port.

Input/output can be specified in 1-bit units.

An on-chip pull-up resistor can be specified by means of software.

Input

INTP3/ADTRG

P10 to P17

Input

Port 1.

8-bit input-only port.

Input

ANI0 to ANI7

P20

RxD00

P21

TxD00

P22

RxD01

P23

TxD01

P24

TI50/TO50

P25

TI51/TO51

P26

I/O

Port 2.

7-bit I/O port.

Input/output can be specified in 1-bit units.

An on-chip pull-up resistor can be specified by means of software.

Input

TI52/TO52

P30 to P37

I/O

Port 3.

8-bit I/O port.

Input/output can be specified in 1-bit units.

An on-chip pull-up resistor can be specified by means of software.

Input

RTP0 to RTP7

P40 to P47

I/O

Port 4.

8-bit I/O port.

Input/output can be specified in 1-bit units.

An on-chip pull-up resistor can be specified by means of software.

Input

AD0 to AD7

P50

P51

SCK

P52

P53

P54

INTP4/TI000/TO00

P55

INTP5/TI010

P56

INTP6/TI001/TO01

P57

I/O

Port 5.

8-bit I/O port.

Input/output can be specified in 1-bit units.

LEDs can be driven directly.

An on-chip pull-up resistor can be specified by means of software.

Input

INTP7/TI011

P64

P65

P66

WAIT

P67

I/O

Port 6.

4-bit I/O port.

Input/output can be specified in 1-bit units.

An on-chip pull-up resistor can be specified by means of software.

Input

ASTB

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986,780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

3.2

Non-Port Pins (1/2)

Pin Name

I/O

Function

After Reset

Alternate

Function

INTP0

Input

P00/TOFF7

INTP1

Input

P01

INTP2

Input

P02

INTP3

Input

P03/ADTRG

INTP4

Input

P54/TI000/TO00

INTP5

Input

P55/TI010

INTP6

Input

P56/TI001/TO01

INTP7

Input

External interrupt request input for which the valid edge (rising

edge, falling edge, or both rising and falling edges) can be

specified.

Input

P57/TI011

TI50

External count clock input to 8-bit timer/event counter 50

Input

P24/TO50

TI51

External count clock input to 8-bit timer/event counter 51

Input

P25/TO51

TI52

External count clock input to 8-bit timer/event counter 52

Input

P26/TO52

TI000

External count clock input to 16-bit timer/event counter 00

Capture trigger input to capture register (CR000, CR010) of 16-bit

timer/event counter 00

Input

P54/INTP4/TO00

TI010

Capture trigger input to capture register (CR000) of 16-bit timer/event

counter 00

Input

P55/INTP5

TI001

External count clock input to 16-bit timer/event counter 01

Capture trigger input to capture register (CR001, CR011) of 16-bit

timer/event counter 01

Input

P56/INTP6/TO01

TI011

Input

Capture trigger input to capture register (CR001) of 16-bit timer/event

counter 01

Input

P57/INTP7

TO50

8-bit timer/event counter 50 output

Input

P24/TI50

TO51

8-bit timer/event counter 51 output

Input

P25/TI51

TO52

8-bit timer/event counter 52 output

Input

P26/TI52

TO00

16-bit timer/event counter 00 output

Input

P54/INTP4/TI000

TO01

Output

16-bit timer/event counter 01 output

Input

P56/INTP6/TI001

RTP0 to RTP7

Output

Real-time output port that outputs pulses in synchronization with

trigger signals from the real-time pulse unit

Input

P30 to P37

TxD00

Input

P21

TxD01

Output

Asynchronous serial interface serial data output

Input

P23

RxD00

Input

P20

RxD01

Input

Asynchronous serial interface serial data input

Input

P22

SCK

I/O

Serial interface serial clock input/output

Input

P51

Input

Serial interface serial data input

Input

P52

Output

Serial interface serial data output

Input

P53

ANI0 to ANI7

Input

A/D converter analog input

Input

P10 to P17

ADTRG

Input

External trigger signal input to the A/D converter

Input

P03/INTP3

TO70 to TO75

Output

Timer output for the 3-phase PWM inverter control

Hi-Z

TOFF7

Input

Timer output (TO70 to TO75) stop external input

Input

P00/INTP0

AD0 to AD7

I/O

Address/data bus for expanding memory externally

Input

P40 to P47

Strobe signal output for reading from external memory

Input

P64

Output

Strobe signal output for writing to external memory

Input

P65

Data Sheet U12804E2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

3.2

Non-Port Pins (2/2)

Pin Name

I/O

Function

After Reset

Alternate

Function

WAIT

Input

Wait insertion at external memory access

Input

P66

ASTB

Output

Strobe output that externally latches address information output to

ports 4 and 5 to access external memory

Input

P67

REF

Input

A/D converter reference voltage input

A/D converter analog power supply

A/D converter ground potential

RESET

Input

System reset input

Input

Connecting crystal resonator for system clock oscillation

DD0

Positive power supply for ports

SS0

Ground potential for ports

DD1

Positive power supply (except ports)

SS1

Ground potential (except ports)

TEST

Test mode set pin. Connect directly to V

SS0

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986,780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

3.3

Pin I/O Circuits and Recommended Connection of Unused Pins

The input/output circuit type of each pin and recommended connection of unused pins are shown in Table 3-1.

For the input/output circuit configuration of each type, refer to Figure 3-1.

Table 3-1. Types of Pin Input/Output Circuits

Pin Name

Input/Output

Circuit Type

I/O

Recommended Connection of Unused Pins

P00/INTP0/TOFF7

P01/INTP1

P02/INTP2

P03/INTP3/ADTRG

8-C

I/O

Input: Independently connect to V

SS0

via a resistor.

Output: Leave open.

P10/ANI0 to P17/ANI7

Input

Independently connect to V

DD0

or V

SS0

via a resistor.

P20/RxD00

8-C

P21/TxD00

5-H

P22/RxD01

8-C

P23/TxD01

5-H

P24/TI50/TO50

P25/TI51/TO51

P26/TI52/TO52

8-C

P30/RTP0 to P37/RTP7

P40/AD0 to P47/AD7

P50

5-H

P51/SCK

8-C

P52/SI

P53/SO

P54/INTP4/TI000/TO00

P55/INTP5/TI010

P56/INTP6/TI001/TO01

P57/INTP7/TI011

P64/RD

P65/WR

P66/WAIT

P67/ASTB

5-H

I/O

Input: Independently connect to V

DD0

or V

SS0

via a

resistor.

Output: Leave open.

TO70 to TO75

Output

Leave open.

RESET

Input

Connect to V

DD0

REF

Connect to V

SS0

TEST

Connect directly to V

SS0

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986,780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

MEMORY SPACE

The memory map of the

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A),

780986(A), and 780988(A) is shown in Figures 4-1 through 4-5.

Figure 4-1. Memory Map (

µ
µ
µ
µ

PD780982, 780982(A))

Data memory

space

Program

memory space

Special function

registers (SFRs)

256

8 bits

General-purpose

registers

8 bits

Reserved

External memory

256

8 bits

Internal high-speed RAM

1024

8 bits

Internal ROM

16384

8 bits

Program area

CALLF entry area

Program area

CALLT table area

Vector table area

F F F F H

F F 0 0 H
F E F F H

F E E 0 H
F E D F H

F B 0 0 H
F A F F H

4 1 0 0 H
4 0 F F H

4 0 0 0 H
3 F F F H

0 0 0 0 H

3 F F F H

1 0 0 0 H
0 F F F H

0 8 0 0 H
0 7 F F H

0 0 8 0 H
0 0 7 F H

0 0 4 0 H
0 0 3 F H

0 0 0 0 H

Data Sheet U12804E2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

Figure 4-4. Memory Map (

µ
µ
µ
µ

PD780986, 780986(A))

F F F F H

F F 0 0 H
F E F F H

F E E 0 H
F E D F H

F B 0 0 H
F A F F H

F 8 0 0 H
F 7 F F H

F 4 0 0 H
F 3 F F H

C 1 0 0 H
C 0 F F H

C 0 0 0 H
B F F F H

0 0 0 0 H

B F F F H

1 0 0 0 H
0 F F F H

0 8 0 0 H
0 7 F F H

0 0 8 0 H
0 0 7 F H

0 0 4 0 H
0 0 3 F H

0 0 0 0 H

Data
memory
space

Program
memory
space

Special function

registers (SFRs)

256

8 bits

Internal high-speed RAM

1024

8 bits

Reserved

Internal expansion RAM

1024

8 bits

General-purpose

registers

8 bits

External memory

256

8 bits

Internal ROM
49152

8 bits

Program area

CALLF entry area

CALLT table area

Vector table area

Data Sheet U12804E2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

PERIPHERAL HARDWARE FUNCTION FEATURES

5.1

Ports

The following two types of I/O ports are available.

CMOS input (Port 1):

CMOS I/O (Port 0, ports 2 to 6):

Total: 47

Table 5-1. Port Functions

Port Name

Pin Name

Function

Port 0

P00 to P03

I/O port. Input/output can be specified in 1-bit units.

An on-chip pull-up resistor can be specified by means of software.

Port 1

P10 to P17

Input-only port.

Port 2

P20 to P26

I/O port. Input/output can be specified in 1-bit units.

An on-chip pull-up resistor can be specified by means of software.

Port 3

P30 to P37

I/O port. Input/output can be specified in 1-bit units.

An on-chip pull-up resistor can be specified by means of software.

Port 4

P40 to P47

I/O port. Input/output can be specified in 1-bit units.

An on-chip pull-up resistor can be specified by means of software.

Port 5

P50 to P57

I/O port. Input/output can be specified in 1-bit units.

An on-chip pull-up resistor can be specified by means of software.

LEDs can be driven directly.

Port 6

P64 to P67

I/O port. Input/output can be specified in 1-bit units.

An on-chip pull-up resistor can be specified by means of software.

Data Sheet U12804E2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

5.3

Timer/Event Counters

Seven timer/event counter channels are incorporated.

16-bit timer/event counter:

2 channels

8-bit timer/event counter:

3 channels

10-bit inverter control timer:

1 channel

Watchdog timer:

1 channel

Table 5-2. Operations of Timer/Event Counters

16-Bit Timer/Event

Counter

8-Bit Timer/Event

Counter

10-Bit Inverter

Control Timer

Watchdog Timer

Interval Timer

2 channels

3 channels

1 channel

Operation Mode

External event

counter

2 channels

3 channels

Timer output

2 outputs

3 outputs

6 outputs

PWM output

3 outputs

PPG output

2 outputs

Pulse width

measurement

4 inputs

Square wave output

2 outputs

3 outputs

One-shot pulse output

2 outputs

Function

Interrupt requests

Data Sheet U12804E2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

Figure 5-3. Block Diagram of 8-Bit Timer/Event Counter

Note Count clock differs depending on the timer.

TM50: f

/2, f

, f

TM51: f

, f

/2, f

, f

TM52: f

, f

Remark

n = 0 to 2

Internal bus

TI5n

Selector

8-bit compare

Match

8-bit timer

counter 5n (TM5n)

Selector

Mask circuit

Clear

OVF

TCL5n2 TCL5n1 TCL5n0

Timer clock selection
register 5n (TCL5n)

8-bit timer mode control
register 5n (TMC5n)

TCE5n TMC5n6 TMC5n4 LVS5n LVR5n TMC5n1 TOE5n

INV

Selector

INTTM5n

Selector

TO5n

Count clock

Note

Level
inversion

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986,780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

Figure 5-4. Block Diagram of 10-Bit Inverter Control Timer

TM7

INTTM7

CM3

BFCM3

CM0

BFCM0

CM1

BFCM1

CM2

BFCM2

DTIME

DTM0

DTM1

DTM2

Pulse

generator

Output off function by
external input or INTWDT

TO70

(U phase)

TO71

(U phase)

TO72

(V phase)

TO73

(V phase)

TO74

(W phase)

TO75

(W phase)

RTM0

Figure 5-5. Watchdog Timer Block Diagram

Internal bus

Clock input
control
circuit

RUN

Divider

Oscillation stabilization
time selection
register (OSTS)

Watchdog timer
clock selection
register (WDCS)

Watchdog timer
mode register
(WDTM)

INTWDT

RESET

WDT mode signal

OSTS2 OSTS1 OSTS0

WDCS2 WDCS1 WDCS0

RUN

WDTM4 WDTM3

Division clock
selection
circuit

Output control
circuit

Division mode
selection circuit

Data Sheet U12804E2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

5.6

Serial Interfaces

Three serial interface channels are incorporated.

Serial interface (UART0n) (n = 0, 1): 2 channels

Serial interface (SIO3):

1 channel

(1) Serial interface UART00, UART01

UART0n (n = 0, 1) provides the following modes:

Asynchronous serial interface (UART) mode

This mode is used to transmit and receive 1-byte data following the start bit. Full-duplex operation is

available. A UART dedicated baud rate generator is incorporated. Any baud rate in a wide range can be

used for communication. By setting the mode register, the baud rate can be selected in the range of 600

bps to 115.2 kbps (@ f

= 8.38 MHz operation) for UART00 and 300 bps to 38.4 kbps (@ f

= 8.38 MHz

operation) for UART01.

Infrared data transfer mode (UART00 only)

115.2 kbps baud rate communication (@ f

= 7.3728 MHz operation) is available.

Figure 5-8. Block Diagram of Serial Interface UART0n

Notes 1. Fixed to 0 for UART01.

2. A reception error interrupt request is not generated for UART01.

Remark

n = 0, 1

Internal bus

Receive

buffer

RXB0n

RX0n

RxD0n

TxD0n

Receive
shift
register n

Transmit
shift
register n

PE0n FE0n OVE0n

TXS0n

INTSER0

Note 2

Baud rate
generator

/2 to f

(For UART00)

TXE0n RXE0n PS0n1 PS0n0 CL0n SL0n

Note 1

ISRM00

Note 1

IRDAM00

Asynchronous serial
interface mode
register n ASIM0n

to f

(For UART01)

Receive
control circuit
(parity check)

Transmit
control circuit
(with parity)

INTSTn

Asynchronous serial
interface status register n

ASIM0n

INTSRn

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986,780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

(2) Serial interface SIO3

SIO3 provides the 3-wire serial I/O mode.

·
·
·
·

3-wire serial I/O mode (fixed MSB first)

This mode performs 8-bit data transfer using three lines: serial clock (SCK), serial output (SO), and serial

input (SI).

The 3-wire serial I/O mode enables simultaneous transmission and reception, thereby speeding up data

transfer processing.

The first bit of 8-bit data for the serial transfer is fixed as MSB.

The 3-wire serial I/O mode is valid when connecting a peripheral I/O or display controller in which a clock

synchronous serial interface is included.

Figure 5-9. Block Diagram of Serial Interface SIO3

to f

INTCSI3

SCK

Selector

Internal bus

Serial I/O shift

Serial clock

counter

Interrupt

request signal

generator

Serial clock

control circuit

Data Sheet U12804E2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

INTERRUPT FUNCTIONS

A total of 26 interrupt sources are provided, divided into the following three types.

Non-maskable interrupts: 1

Maskable interrupts:

Software interrupts:

Table 6-1. Interrupt Sources (1/2)

Interrupt Source

Interrupt Type

Default

Priority

Note 1

Name

Trigger

Internal/

External

Vector Table

Address

Basic

Configuration

Type

Note 2

Non-maskable

INTWDT

Watchdog timer overflow

(with non-maskable interrupt selected)

(A)

INTWDT

Watchdog timer overflow

(with interval timer selected)

Internal

0004H

(B)

INTP0

0006H

INTP1

0008H

INTP2

000AH

INTP3

000CH

INTP4

000EH

INTP5

0010H

INTP6

0012H

INTP7

Pin input edge detection

External

0014H

(C)

INTTM7

TM7 underflow

0016H

INTTM000

TM00 and CR000 match signal generation

(when compare register specified)

TI010 valid edge detection (when capture

0018H

INTTM010

TM00 and CR010 match signal generation

(when compare register specified)

TI000 valid edge detection (when capture

001AH

Maskable

INTTM001

TM01 and CR001 match signal generation

(when compare register specified)

TI011 valid edge detection (when capture

Internal

001CH

(B)

Notes 1. Default priority is the priority order when several maskable interrupt requests are generated at the

same time. 0 is the highest and 23 is the lowest.

2. Basic configuration types (A) to (D) correspond to (A) to (D) in Figure 6-1.

Remark Two types of interrupt sources are available for the watchdog timer (INTWDT): non-maskable interrupt

and maskable interrupt (internal). However, only one of these can be selected.

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986,780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

Table 6-1. Interrupt Sources (2/2)

Interrupt Source

Interrupt Type

Default

Priority

Note 1

Name

Trigger

Internal/

External

Vector Table

Address

Basic

Configuration

Type

Note 2

INTTM011

TM01 and CR011 match signal generation

(when compare register specified)

TI001 valid edge detection (when capture

001EH

INTSER0

Occurrence of UART00 reception error

0020H

INTSR0

End of UART00 reception

0022H

INTST0

End of UART00 transmission

0024H

INTSR1

End of UART01 reception

0026H

INTST1

End of UART01 transmission

0028H

INTTM50

Generation of TM50 and CR50 match

signal

002AH

INTTM51

Generation of TM51 and CR51 match

signal

002CH

INTTM52

Generation of TM52 and CR52 match

signal

002EH

INTCSI3

End of SIO3 transfer

0030H

Maskable

INTAD0

End of A/D conversion

Internal

0032H

(B)

Software

BRK

Execution of BRK instruction

003EH

(D)

Notes 1. Default priority is the priority order when several maskable interrupt requests are generated at the

same time. 0 is the highest and 23 is the lowest.

2. Basic configuration types (A) to (D) correspond to (A) to (D) in Figure 6-1.

Data Sheet U12804E2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

EXTERNAL DEVICE EXPANSION FUNCTION

The external device expansion function connects external devices to areas other than the internal ROM, RAM and

SFRs.

Ports 4 and 6 are used for external device connection.

256 bytes of external memory expansion is possible for the

PD780982, 780983, 780984, 780986, 780982(A),

780983(A), 780984(A), and 780986(A).

16 bytes of external memory expansion is possible for the

PD780988 and 780988(A) using the external access

area of SFR space.

STANDBY FUNCTIONS

The following two standby functions are available for further reduction of system current consumption.

HALT mode:

In this mode, the CPU operation clock is stopped. The average current consumption can be

reduced by intermittent operation by combining this mode with the normal operation mode.

STOP mode:

In this mode, oscillation of the system clock is stopped. All the operations performed on the

system clock are suspended, resulting in extremely small power consumption.

Figure 8-1. Standby Functions

System clock operation

STOP instruction

Interrupt

request

STOP mode

(System clock oscillation

stopped)

HALT instruction

Interrupt

request

HALT mode

(Clock supply to CPU halted,

oscillation maintained)

RESET FUNCTIONS

The following two reset methods are available.

External reset by RESET signal input

Internal reset by watchdog timer runaway time detection

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986,780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

10. INSTRUCTION SET

(1) 8-bit instructions

MOV, XCH, ADD, ADDC, SUB, SUBC, AND, OR, XOR, CMP, MULU, DIVUW, INC, DEC, ROR, ROL, RORC,

ROLC, ROR4, ROL4, PUSH, POP, DBNZ

2nd Operand

1st Operand

#byte

Note

sfr

saddr

!addr16

PSW

[DE]

[HL]

[HL+byte]

[HL+B]

[HL+C]

$addr16

None

ADD
ADDC
SUB
SUBC
AND
OR
XOR
CMP

MOV
XCH
ADD
ADDC
SUB
SUBC
AND
OR
XOR
CMP

MOV
XCH

MOV
XCH
ADD
ADDC
SUB
SUBC
AND
OR
XOR
CMP

MOV

MOV
XCH

MOV
XCH
ADD
ADDC
SUB
SUBC
AND
OR
XOR
CMP

ROR
ROL
RORC
ROLC

MOV

MOV
ADD
ADDC
SUB
SUBC
AND
OR
XOR
CMP

INC
DEC

B, C

DBNZ

sfr

MOV

saddr

MOV
ADD
ADDC
SUB
SUBC
AND
OR
XOR
CMP

MOV

DBNZ

INC
DEC

!addr16

MOV

PSW

MOV

PUSH
POP

[DE]

MOV

[HL]

MOV

ROR4

ROL4

[HL+byte]

[HL+B]

[HL+C]

MOV

MULU

DIVUW

Note Except r = A

Data Sheet U12804E2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

(2) 16-bit instructions

MOVW, XCHW, ADDW, SUBW, CMPW, PUSH, POP, INCW, DECW

2nd Operand

1st Operand

#word

Note

sfrp

saddrp

!addr16

None

ADDW

SUBW

CMPW

MOVW

XCHW

MOVW

Note

INCW, DECW

PUSH, POP

sfrp

MOVW

saddrp

MOVW

!addr16

MOVW

Note Only when rp = BC, DE, HL.

(3) Bit manipulation instructions

MOV1, AND1, OR1, XOR1, SET1, CLR1, NOT1, BT, BF, BTCLR

2nd Operand

1st Operand

A.bit

sfr.bit

saddr.bit

PSW.bit

[HL].bit

$addr16

None

A.bit

MOV1

BTCLR

SET1

CLR1

sfr.bit

MOV1

BTCLR

SET1

CLR1

saddr.bit

MOV1

BTCLR

SET1

CLR1

PSW.bit

MOV1

BTCLR

SET1

CLR1

[HL].bit

MOV1

BTCLR

SET1

CLR1

MOV1

AND1

OR1

XOR1

MOV1

AND1

OR1

XOR1

MOV1

AND1

OR1

XOR1

MOV1

AND1

OR1

XOR1

MOV1

AND1

OR1

XOR1

SET1

CLR1

NOT1

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

11. ELECTRICAL SPECIFICATIONS

Absolute Maximum Ratings (T

= 25°C)

Parameter

Symbol

Conditions

Ratings

Unit

0.3 to +6.5

0.3 to V

+ 0.3

REF

0.3 to V

+ 0.3

Supply voltage

0.3 to +0.3

Input voltage

P00 to P03, P10 to P17, P20 to P26, P30 to P37, P50 to

P57, P64 to P67, TO70 to TO75, X1, X2, RESET

0.3 to V

+ 0.3

Output voltage

0.3 to V

+ 0.3

Analog input

voltage

P10 to P17

Analog input pin

0.3 to AV

REF

+ 0.3

and 0.3 to V

+ 0.3

Per pin

P00, P01, P30 to P37, P40 to P47, P50 to P57, P64 to P67 total

Output current,

high

P02, P03, P20 to P26, TO70 to TO75 total

Peak value

P00 to P03, P10 to P17, P20 to P26, P30 to

P37, P40 to P47, P64 to P67 per pin

rms value

Peak value

P50 to P57, TO70 to TO75 per pin

rms value

Peak value

P00, P01, P30 to P37, P40 to P47, P64 to

P67 total

rms value

Peak value

P02, P03, P20 to P26 total

rms value

Peak value

100

TO70 to TO75 total

rms value

Peak value

100

Output current,

low

Note

P50 to P57 total

rms value

Operating ambient

temperature

40 to +85

°C

Storage

temperature

stg

65 to +150

°C

Note The rms value should be calculated as follows: [rms value] = [Peak value]

Duty

Caution

Product quality may suffer if the absolute maximum rating is exceeded even momentarily for

any parameter. That is, the absolute maximum ratings are rated values at which the product is

on the verge of suffering physical damage, and therefore the product must be used under

conditions that ensure that the absolute maximum ratings are not exceeded.

Capacitance (T

= 25°C, V

= V

= 0 V)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Input

capacitance

f = 1 MHz

Unmeasured pins returned to 0 V

I/O capacitance

f = 1 MHz

Unmeasured pins returned

to 0 V

P00 to P03, P20 to P26,

P30 to P37, P40 to P47,

P50 to P57, P64 to P67,

TO70 to TO75

Remark

Unless otherwise specified, the characteristics of alternate-function pins are the same as those of port

pins.

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

System Clock Oscillator Characteristics (T

= 40 to +85°C, V

= 4.0 to 5.5 V)

Resonator

Recommended Circuit

Parameter

Conditions

MIN.

TYP.

MAX.

Unit

Oscillation

frequency (f

)

Note 1

1.0

8.38

MHz

Ceramic

resonator

Oscillation

stabilization time

Note 2

After V

reaches

oscillation voltage range

MIN.

Oscillation

frequency (f

)

Note 1

1.0

8.38

MHz

Crystal

resonator

Oscillation

stabilization time

Note 2

After V

reaches

oscillation voltage range

MIN.

X1 input frequency

)

Note 1

1.0

8.38

MHz

External

clock

X1 input high-/low-

level width (t

, t

)

500

Notes 1. Indicates only oscillator characteristics. Refer to AC Characteristics for instruction execution time.

2. Time required to stabilize oscillation after reset or STOP mode release.

Caution

When using the system clock oscillator, wire as follows in the area enclosed by the broken

lines in the above figures to avoid an adverse effect from wiring capacitance.

·
·
·
·

Keep the wiring length as short as possible.

·
·
·
·

Do not cross the wiring with the other signal lines.

·
·
·
·

Do not route the wiring near a signal line through which a high fluctuating current flows.

·
·
·
·

Always make the ground point of the oscillator capacitor the same potential as V

SS1

·
·
·
·

Do not ground the capacitor to a ground pattern through which a high current flows.

·
·
·
·

Do not fetch signals from the oscillator.

TEST

PD74HCU04

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

Recommended Oscillator Constant

System clock: Ceramic resonator (T

= 40 to +85°C)

Recommended Circuit Constant

Oscillation Voltage Range

Manufacturer

Part Number

Frequency

(MHz)

C1 (pF)

C2 (pF)

MIN. (V)

MAX. (V)

CSA2.00MG040

2.00

100

4.0

5.5

CST2.00MG040

2.00

On-chip

4.0

5.5

CSA3.58MG

3.58

4.0

5.5

CST3.58MGW

3.58

On-chip

4.0

5.5

CSA4.00MG

4.00

4.0

5.5

CST4.00MGW

4.00

On-chip

4.0

5.5

CSA4.19MG

4.19

4.0

5.5

CST4.19MGW

4.19

On-chip

4.0

5.5

CSA4.91MG

4.91

4.0

5.5

CST4.91MGW

4.91

On-chip

4.0

5.5

CSA5.00MG

5.00

4.0

5.5

CST5.00MGW

5.00

On-chip

4.0

5.5

CSA7.37MTZ

7.37

4.0

5.5

CST7.37MTW

7.37

On-chip

4.0

5.5

CSA8.00MTZ

8.00

4.0

5.5

CST8.00MTW

8.00

On-chip

4.0

5.5

CSA8.38MTZ

8.38

4.0

5.5

Murata Mfg.

Co., Ltd.

CST8.38MTW

8.38

On-chip

4.0

5.5

Caution

The oscillator constant and oscillation voltage range indicate conditions of stable oscillation.

Oscillation frequency precision is not guaranteed. For applications requiring oscillation

frequency precision, the oscillation frequency must be adjusted on the implementation circuit.

For details, please contact directly the manufacturer of the resonator you will use.

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

DC Characteristics (T

= 40 to +85°C, V

= 4.0 to 5.5 V)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

IH1

P10 to P17, P21, P23, P30 to P37, P40 to P47, P50, P53,

P64 to P67

0.7V

IH2

RESET, P00 to P03, P20, P22, P24 to P26, P51, P52, P54

to P57

0.8V

Input voltage,

high

IH3

X1, X2

0.5

IL1

P10 to P17, P21, P23, P30 to P37, P40 to P47, P50, P53,

P64 to P67

0.3V

IL2

RESET, P00 to P03, P20, P22, P24 to P26, P51, P52, P54

to P57

0.2V

Input voltage,

low

IL3

X1, X2

0.4

4.5 V

5.5 V, I

= 1 mA

1.0

Output voltage,

high

OH1

= 100

0.5

P50 to P57, TO70 to

TO75

5.0 V

5.5 V,

= 15 mA

0.4

2.0

OL1

P00 to P03, P20 to P26,

P30 to P37, P40 to P47,

P64 to P67

5.0 V

5.5 V,

= 1.6 mA

0.4

Output voltage,

low

OL2

= 400

0.5

LIH1

P00 to P03, P10 to P17, P20 to

P26, P30 to P37, P40 to P47,

P50 to P57, P64 to P67, TO70

to TO75, RESET

Input leakage

current, high

LIH2

= V

X1, X2

LIL1

P00 to P03, P10 to P17, P20 to

P26, P30 to P37, P40 to P47,

P50 to P57, P64 to P67, TO70

to TO75, RESET

Input leakage

current, low

LIL2

= 0 V

X1, X2

Output leakage

current, high

LOH

OUT

= V

Output leakage

current, low

LOL

OUT

= 0 V

Software

pull-up resistor

= 0 V

P00 to P03, P20 to P26, P30 to P37, P40 to P47, P50 to

P57, P64 to P67

When A/D

converter stopped

6.5

19.5

DD1

8.38 MHz

crystal

oscillation

operating mode

= 5.0 V ±10%

Note 2

When A/D

converter operating

7.5

21.5

When peripheral

functions stopped

1.0

3.0

DD2

8.38 MHz

crystal

oscillation

HALT mode

= 5.0 V ±10%

Note 2

When peripheral

functions operating

7.6

Power supply

current

Note 1

DD3

STOP mode

= 5.0 V ±10%

0.1

Notes 1. Refers to the total current flowing to the internal power supply (V

DD0

and V

DD1

). The peripheral operating

current is included (however, the current flowing to the pull-up resistor of ports and AV

REF

pin is not included).

2. High-speed operation mode (when the processor clock control register (PCC) is set to 00H).

Remark

Unless otherwise specified, the characteristics of alternate-function pins are the same as those of port pins.

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

AC Characteristics

(1) Basic operation (T

= 40 to +85°C, V

= 4.0 to 5.5 V)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Cycle time

(Min. instruction execution time)

Operating with system clock

0.24

TI000, TI001, TI010, TI011 input

frequency

TI0

/64

MHz

TI000, TI001, TI010, TI011 input

high-/low-level width

TIH0

TIL0

2/f

sam

+ 0.1

Note

TI50, TI51, TI52 input frequency

TI5

8-/16-bit precision

MHz

TI50, TI51, TI52 input high-/low-level

width

TIH5

TIL5

8-/16-bit precision

100

Interrupt request input high-/low-level

width

INTH

INTL

INTP0 to INTP7

TOFF input high-/low-level width

TOFFH

TOFFL

RESET input low-level width

RSL

Note Selection of f

sam

= f

, f

/4, f

/32 is possible with bits 0 and 1 (PRM000, PRM001) of prescaler mode register

00 (PRM00) or with bits 0 and 1 (PRM010, PRM011) of prescaler mode register 01 (PRM01). Note that

when selecting TI000 (TM00) or TI001 (TM01) valid edge as the count clock, f

sam

= f

/16.

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

(2) Read/write operation (T

= 40 to +85°C, V

= 4.0 to 5.5 V)

Parameter

Symbol

Conditions

MIN.

MAX.

Unit

ASTB high-level width

ASTH

0.3t

Address setup time

ADS

Address hold time

ADH

ADD1

(2 + 2n)t

Time from address to data input

ADD2

(3 + 2n)t

Time from RD

to address output

RDAD

100

RDD1

(2 + 2n)t

Time from RD

to data input

RDD2

(3 + 2n)t

Read data hold time

RDH

RDL1

(1.5 + 2n)t

RD low-level width

RDL2

(2.5 + 2n)t

RDWT1

Time from RD

to WAIT

input

RDWT2

Time from WR

to WAIT

input

WRWT

0.5t

WAIT low-level width

WTL

(0.5 + 2n)t

+ 10

(2 + 2n)t

Write data setup time

WDS

Write data hold time

WDH

WR low-level width

WRL

(1.5 + 2n)t

Delay time from ASTB

to RD

ASTRD

Delay time from ASTB

to WR

ASTWR

Delay time from RD

to ASTB

at external

fetch

RDAST

0.8t

1.2t

Time from RD

to write data output

RDWD

Time from WR

to write data output

WRWD

Delay time from WAIT

to RD

WTRD

0.8t

2.5t

+ 25

Delay time from WAIT

to WR

WTWR

0.8t

2.5t

+ 25

Remarks 1. t

= T

2. n indicates the number of waits.

3. C

= 100 pF (C

is the load capacitance of AD0 to AD7, RD, WR, WAIT, and ASTB pins.)

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

(3) Serial interface (T

= 40 to +85°C, V

= 4.0 to 5.5 V)

(a) 3-wire serial I/O mode (SCK... Internal clock output)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

SCK cycle time

KCY1

954

SCK high-/low-level width

KH1

KL1

KCY1

/2 50

SI setup time (to SCK

)

SIK1

100

SI hold time (from SCK

)

KSI1

400

Delay time from SCK

to SO output

KSO1

C = 100 pF

Note

300

Note C is the load capacitance of the SCK and SO output lines.

(b) 3-wire serial I/O mode (SCK... External clock input)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

SCK cycle time

KCY2

800

SCK high-/low-level width

KH2

KL2

400

SI setup time (to SCK

)

SIK2

100

SI hold time (from SCK

)

KSI2

400

Delay time from SCK

to SO output

KSO2

C = 100 pF

Note

300

Note C is the load capacitance of the SCK and SO output lines.

(c) UART mode (UART00) (Dedicated baud rate generator output)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Transfer rate

125000

bps

(d) UART mode (UART00) (Infrared data transfer mode)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Transfer rate

115200

bps

Bit rate allowable error

±0.87

Output pulse width

1.2

0.24/fbr

Note

Input pulse width

4/f

Note fbr: Set baud rate

(e) UART mode (UART01) (Dedicated baud rate generator output)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Transfer rate

38400

bps

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

A/D Converter Characteristics (T

= 40 to +85°C, V

= AV

= 4.0 to 5.5 V, AV

= V

= 0 V)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Resolution

bit

4.0 V

REF

5.5 V

±0.2

±0.4

%FSR

Overall error

Note

2.7 V

REF

< 4.0 V

±0.3

±0.6

%FSR

4.0 V

REF

5.5 V

Conversion time

CONV

2.7 V

REF

< 4.0 V

4.0 V

REF

5.5 V

±0.4

%FSR

Zero-scale offset

Note

2.7 V

REF

< 4.0 V

±0.6

%FSR

4.0 V

REF

5.5 V

±0.4

%FSR

Full-scale offset

Note

2.7 V

REF

< 4.0 V

±0.6

%FSR

4.0 V

REF

5.5 V

±2.5

LSB

Integral linearity error

2.7 V

REF

< 4.0 V

±4.5

LSB

4.0 V

REF

5.5 V

±1.5

LSB

Differential linearity error

2.7 V

REF

< 4.0 V

±2.0

LSB

Analog input voltage

IAN

REF

Reference voltage

REF

2.7

Resistance between AV

REF

and AV

REF

When A/D converter is not operating

Note Excludes quantization error (±1/2 LSB). This value is indicated as a ratio to the full-scale value (%FSR).

Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics (T

= 40 to +85°C)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Data retention power supply voltage

DDDR

2.0

5.5

Data retention power supply current

DDDR

= 2.0 V

0.1

Release signal set time

SREL

Release by RESET

Oscillation stabilization wait time

WAIT

Release by interrupt request

Note

Note Selection of 2

and 2

to 2

is possible with bits 0 to 2 (OSTS0 to OSTS2) of the oscillation

stabilization time selection register (OSTS).

Data Retention Timing (STOP Mode Release by RESET)

STOP instruction execution

RESET

STOP mode

Data retention mode

DDDR

Internal reset operation

HALT mode

Operation
mode

WAIT

SREL

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

13. RECOMMENDED SOLDERING CONDITIONS

The

PD780982, 780983, 780984, 780986, and 780988 should be soldered and mounted under the following

recommended conditions.

For the details of the recommended soldering conditions, refer to the document Semiconductor Device

Mounting Technology Manual (C10535E).

For soldering methods and conditions other than those recommended below, contact your NEC sales

representative.

Table 13-1. Surface Mounting Type Soldering Conditions

µ
µ
µ
µ

PD780982GC-

×××

-AB8:

64-pin plastic QFP (14

×
×
×
×

14 mm)

µ
µ
µ
µ

PD780983GC-

×××

-AB8:

64-pin plastic QFP (14

×
×
×
×

14 mm)

µ
µ
µ
µ

PD780984GC-

×××

-AB8:

64-pin plastic QFP (14

×
×
×
×

14 mm)

µ
µ
µ
µ

PD780986GC-

×××

-AB8:

64-pin plastic QFP (14

×
×
×
×

14 mm)

µ
µ
µ
µ

PD780988GC-

×××

-AB8:

64-pin plastic QFP (14

×
×
×
×

14 mm)

µ
µ
µ
µ

PD780982GC(A)-

×××

-AB8: 64-pin plastic QFP (14

×
×
×
×

14 mm)

µ
µ
µ
µ

PD780983GC(A)-

×××

-AB8: 64-pin plastic QFP (14

×
×
×
×

14 mm)

µ
µ
µ
µ

PD780984GC(A)-

×××

-AB8: 64-pin plastic QFP (14

×
×
×
×

14 mm)

µ
µ
µ
µ

PD780986GC(A)-

×××

-AB8: 64-pin plastic QFP (14

×
×
×
×

14 mm)

µ
µ
µ
µ

PD780988GC(A)-

×××

-AB8: 64-pin plastic QFP (14

×
×
×
×

14 mm)

Soldering Method

Soldering Conditions

Recommended

Condition Symbol

Infrared reflow

Package peak temperature: 235°C, Time: 30 seconds max. (at 210°C or

higher), Count: Three times or less

IR35-00-3

VPS

Package peak temperature: 215°C, Time: 40 seconds max. (at 200°C or

higher), Count: Three times or less

VP15-00-3

Wave soldering

Solder bath temperature: 260°C max., Time: 10 seconds max., Count: Once,

Preheating temperature: 120°C max. (package surface temperature)

WS60-00-1

Partial heating

Pin temperature: 300°C max., Time: 3 seconds max. (per pin row)

Caution

Do not use different soldering methods together (except for partial heating).

Table 13-2. Insertion Type Soldering Conditions

µ
µ
µ
µ

PD780982CW-

×××

: 64-pin plastic SDIP (19.05 mm (750))

µ
µ
µ
µ

PD780983CW-

×××

: 64-pin plastic SDIP (19.05 mm (750))

µ
µ
µ
µ

PD780984CW-

×××

: 64-pin plastic SDIP (19.05 mm (750))

µ
µ
µ
µ

PD780986CW-

×××

: 64-pin plastic SDIP (19.05 mm (750))

µ
µ
µ
µ

PD780988CW-

×××

: 64-pin plastic SDIP (19.05 mm (750))

Soldering Method

Soldering Conditions

Wave soldering (pin only)

Solder bath temperature: 260°C max., Time: 10 seconds max.

Partial heating

Pin temperature: 300°C max., Time: 3 seconds max. (per pin)

Caution

Apply wave soldering only to the pins and be careful not to bring solder into direct contact with

the package.

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

APPENDIX A. DEVELOPMENT TOOLS

The following development tools are available for system development using the

PD780988 Subseries.

Also refer to (5) Cautions on Using Development Tools.

(1) Language Processing Software

RA78K0

Assembler package common to 78K/0 Series

CC78K0

C compiler package common to 78K/0 Series

DF780988

Device file for

PD780988 Subseries

CC78K0-L

C compiler library source file common to 78K/0 Series

(2) Flash Memory Writing Tools

Flashpro II (part No. FL-PR2),

Flashpro III

(part No. FL-PR3, PG-FP3)

Flash programmer dedicated to microcontrollers incorporating flash memory

FA-64CW

FA-64GC

Adapter for flash memory writing

(3) Debugging Tools

· When IE-78K0-NS in-circuit emulator is used

IE-78K0-NS

In-circuit emulator common to 78K/0 Series

IE-70000-MC-PS-B

Power supply unit for IE-78K0-NS

IE-78K0-NS-PA

Performance board for enhancement and expansion of IE-78K0-NS function

IE-70000-98-IF-C

Adapter required when using PC-9800 Series PC (except notebook type) as host machine

(C bus supported)

IE-70000-CD-IF-A

PC card and interface cable required when using notebook PC as host machine (PCMCIA

socket supported)

IE-70000-PC-IF-C

Adapter required when using IBM PC/ATTM or compatible as host machine (ISA bus

supported)

IE-70000-PCI-IF

Interface adapter necessary when using PCI bus incorporated PC as host machine

IE-780988-NS-EM4

Emulation board to emulate

PD780988 Subseries

IE-78K0-NS-P01

I/O board necessary to emulate

PD780988 Subseries

NP-64CW

Emulation probe for 64-pin plastic shrink DIP (CW type)

NP-64GC

NP-64GC-TQ

Emulation probe for 64-pin plastic QFP (GC-AB8 type)

EV-9200GC-64

Conversion socket to connect the NP-64GC and a target system board on which the 64-

pin plastic QFP (GC-AB8 type) can be mounted

TGC-064SAP

Conversion adapter to connect the NP-64GC-TQ and a target system board on which the

64-pin plastic QFP (GC-AB8 type) can be mounted

ID78K0-NS

Integrated debugger for IE-78K0-NS

SM78K0

System simulator common to 78K/0 Series

DF780988

Device file for

PD780988 Subseries

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

· When IE-78001-R-A in-circuit emulator is used

IE-78001-R-A

In-circuit emulator common to 78K/0 Series

IE-70000-98-IF-C

Interface adapter when PC-9800 Series PC (except notebook type) is used as host

machine (C bus supported)

IE-70000-PC-IF-C

Interface adapter when using IBM PC/AT or compatible as host machine (ISA bus

supported)

IE-70000-PCI-IF

Adapter necessary when using PCI bus incorporated PC as host machine

IE-78000-R-SV3

Interface adapter and cable when using EWS as host machine

IE-780988-NS-EM4

Emulation board to emulate

PD780988 Subseries

IE-78K0-NS-P01

I/O board necessary to emulate

PD780988 Subseries

IE-78K0-R-EX1

Emulation probe conversion board necessary when using IE-780988-NS-EM4 and IE-

78K0-NS-P01 on IE-78001-R-A

EP-78240CW-R

Emulation probe for 64-pin plastic shrink DIP (CW type)

EP-78240GC-R

Emulation probe for 64-pin plastic QFP (GC-AB8 type)

EV-9200GC-64

Socket to be mounted on a target system board made for mounting 64-pin plastic QFP

(GC-AB8 type)

ID78K0

Integrated debugger for IE-78001-R-A

SM78K0

System simulator common to 78K/0 Series

DF780988

Device file for

PD780988 Subseries

(4) Real-time OS

RX78K/0

Real-time OS for 78K/0 Series

MX78K0

OS for 78K/0 Series

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

(5) Cautions on Using Development Tools

· The ID78K0-NS, ID78K0, and SM78K0 are used in combination with the DF780988.

· The CC78K0 and RX78K/0 are used in combination with the RA78K0 or DF780988.

· The FL-PR2, FL-PR3, FA-64CW, FA-64GC, NP-64CW, NP-64GC, and NP-64GC-TQ are products of Naito

Densei Machida Mfg. Co., Ltd. (TEL +81-44-822-3813). Contact an NEC distributor regarding the purchase of

these products.

· The TGC-064SAP is a product of Tokyo Eletech Corporation.

For further information, contact: Daimaru Kogyo, Ltd.

Tokyo Electronics Department (TEL +81-3-3820-7112)

Osaka Electronics Department (TEL +81-6-6244-6672)

· For third-party development tools, see the 78K/0 Series Selection Guide (U11126E).

· The host machine and OS suitable for each software are as follows.

EWS

Host Machine

[OS]

Software

PC-9800 Series [WindowsTM]

IBM PC/AT and compatibles

[Japanese/English Windows]

HP9000 series 700TM [HP-UXTM]

SPARCstationTM [SunOSTM, SolarisTM]

NEWSTM (RISC) [NEWS-OSTM]

RA78K0

Note

CC78K0

Note

ID78K0-NS

ID78K0

SM78K0

RX78K/0

Note

MX78K0

Note

Note DOS-based software

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

APPENDIX B. RELATED DOCUMENTS

Documents Related to Devices

Document No.

Document Name

English

Japanese

PD780988 Subseries User's Manual

U13029E

U13029J

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A),

780984(A), 780986(A), 780988(A) Data Sheet

This manual

U12804J

PD78F0988 Data Sheet

U12805E

U12805J

PD780988 Subseries Inverter Control Application Note

U13119E

U13119J

PD780988 Subseries Special Function Register Table

U12806J

78K/0 Series Instructions User's Manual

U12326E

U12326J

78K/0 Series Instruction Table

U10903J

78K/0 Series Instruction Set

U10904J

78K/0, 78K/0S Series Application Note Flash Memory Write

U14458E

U14458J

Documents Related to Development Tools (User's Manuals)

Document No.

Document Name

English

Japanese

Operation

U11802E

U11802J

Assembly Language

U11801E

U11801J

RA78K0 Assembler Package

Structured Assembly

Language

U11789E

U11789J

RA78K Series Structured Assembler Preprocessor

EEU-1402

U12323J

Operation

U11517E

U11517J

CC78K0 C Compiler

Language

U11518E

U11518J

IE-78K0-NS

U13731J

IE-78001-R-A

To be prepared

IE-780988-NS-EM4

To be prepared

EP-78240

U10332E

EEU-986

SM78K0 System Simulator Windows Based

Reference

U10181E

U10181J

SM78K Series System Simulator

External Part User Open

Interface Specifications

U10092E

U10092J

ID78K0-NS Integrated Debugger

Windows Based

Reference

U12900E

U12900J

ID78K0 Integrated Debugger EWS Based

Reference

U11151J

ID78K0 Integrated Debugger PC Based

Reference

U11539E

U11539J

ID78K0 Integrated Debugger Windows Based

Guide

U11649E

U11649J

Caution

The related documents listed above are subject to change without notice. Be sure to use the

latest version of each document for designing.

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

Documents Related to Embedded Software (User's Manuals)

Document No.

Document Name

English

Japanese

Fundamental

U11537E

U11537J

78K/0 Series Real-Time OS

Installation

U11536E

U11536J

78K/0 Series OS MX78K0

Fundamental

U12257E

U12257J

Other Related Documents

Document No.

Document Name

English

Japanese

SEMICONDUCTORS SELECTION GUIDE Products & Packages (CD-ROM)

X13769X

Semiconductor Device Mounting Technology Manual

C10535E

C10535J

Quality Grades on NEC Semiconductor Devices

C11531E

C11531J

NEC Semiconductor Device Reliability/Quality Control System

C10983E

C10983J

Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge

(ESD)

C11892E

C11892J

Guide to Microcomputer-Related Products by Third Party

U11416J

Caution

The related documents listed above are subject to change without notice. Be sure to use the

latest version of each document for designing.

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

NOTES FOR CMOS DEVICES

PRECAUTION AGAINST ESD FOR SEMICONDUCTORS

Note:

Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and

ultimately degrade the device operation. Steps must be taken to stop generation of static electricity

as much as possible, and quickly dissipate it once, when it has occurred. Environmental control

must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using

insulators that easily build static electricity. Semiconductor devices must be stored and transported

in an anti-static container, static shielding bag or conductive material. All test and measurement

tools including work bench and floor should be grounded. The operator should be grounded using

wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need

to be taken for PW boards with semiconductor devices on it.

HANDLING OF UNUSED INPUT PINS FOR CMOS

Note:

No connection for CMOS device inputs can be cause of malfunction. If no connection is provided

to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence

causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels

of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused

pin should be connected to V

or GND with a resistor, if it is considered to have a possibility of

being an output pin. All handling related to the unused pins must be judged device by device and

related specifications governing the devices.

STATUS BEFORE INITIALIZATION OF MOS DEVICES

Note:

Power-on does not necessarily define initial status of MOS device. Production process of MOS

does not define the initial operation status of the device. Immediately after the power source is

turned ON, the devices with reset function have not yet been initialized. Hence, power-on does

not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the

reset signal is received. Reset operation must be executed immediately after power-on for devices

having reset function.

Data Sheet U12804EJ2V1DS00

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

Regional Information

Some information contained in this document may vary from country to country. Before using any NEC
product in your application, pIease contact the NEC office in your country to obtain a list of authorized
representatives and distributors. They will verify:

Device availability

Ordering information

Product release schedule

Availability of related technical literature

Development environment specifications (for example, specifications for third-party tools and

components, host computers, power plugs, AC supply voltages, and so forth)

Network requirements

In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary
from country to country.

NEC Electronics Inc. (U.S.)

Santa Clara, California
Tel: 408-588-6000
800-366-9782
Fax: 408-588-6130
800-729-9288

NEC Electronics (Germany) GmbH

Duesseldorf, Germany
Tel: 0211-65 03 02
Fax: 0211-65 03 490

NEC Electronics (UK) Ltd.

Milton Keynes, UK
Tel: 01908-691-133
Fax: 01908-670-290

NEC Electronics Italiana s.r.l.

Milano, Italy
Tel: 02-66 75 41
Fax: 02-66 75 42 99

NEC Electronics (Germany) GmbH

Benelux Office
Eindhoven, The Netherlands
Tel: 040-2445845
Fax: 040-2444580

NEC Electronics (France) S.A.

Velizy-Villacoublay, France
Tel: 01-30-67 58 00
Fax: 01-30-67 58 99

NEC Electronics (France) S.A.

Spain Office
Madrid, Spain
Tel: 91-504-2787
Fax: 91-504-2860

NEC Electronics (Germany) GmbH

Scandinavia Office
Taeby, Sweden
Tel: 08-63 80 820
Fax: 08-63 80 388

NEC Electronics Hong Kong Ltd.

Hong Kong
Tel: 2886-9318
Fax: 2886-9022/9044

NEC Electronics Hong Kong Ltd.

Seoul Branch
Seoul, Korea
Tel: 02-528-0303
Fax: 02-528-4411

NEC Electronics Singapore Pte. Ltd.

United Square, Singapore 1130
Tel: 65-253-8311
Fax: 65-250-3583

NEC Electronics Taiwan Ltd.

Taipei, Taiwan
Tel: 02-2719-2377
Fax: 02-2719-5951

NEC do Brasil S.A.

Electron Devices Division
Rodovia Presidente Dutra, Km 214
07210-902-Guarulhos-SP Brasil
Tel: 55-11-6465-6810
Fax: 55-11-6465-6829

J99.1

PD780982, 780983, 780984, 780986, 780988, 780982(A), 780983(A), 780984(A), 780986(A), 780988(A)

FIP and IEBus are trademarks of NEC Corporation.

Windows is either a registered trademark or a trademark of Microsoft Corporation in the United States and/or

other countries.

PC/AT is a trademark of International Business Machines Corporation.

HP9000 series 700 and HP-UX are trademarks of Hewlett-Packard Company.

SPARCstation is a trademark of SPARC International, Inc.

Solaris and SunOS are trademarks of Sun Microsystems, Inc.

NEWS and NEWS-OS are trademarks of Sony Corporation.

The related documents indicated in this publication may include preliminary versions. However, preliminary versions

are not marked as such.

The export of this product from Japan is regulated by the Japanese government. To export this product may be prohibited
without governmental license, the need for which must be judged by the customer. The export or re-export of this product
from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales
representative.

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

No part of this document may be copied or reproduced in any form or by any means without the prior written

consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.

NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property

rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.

Descriptions of circuits, software, and other related information in this document are provided for illustrative

purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.

While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,

the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.

NEC devices are classified into the following three quality grades:

"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.

M7 98. 8

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