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Электронный компонент: UPD98402AGM-KED

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MOS INTEGRATED CIRCUIT
PD98402A
The
PD98402A is one of the ATM-LAN LSIs and incorporates the TC sublayer function in the SONET/SDH-
based physical layer of the ATM protocol. The main functions of the
PD98402A include a transmit function for
mapping ATM cells received from the ATM layer onto the payload block of the SONET STS-3c/SDH STM-1 frame
and sending them to PMD (Physical Media Dependent) in the physical layer, and a receive function for separating
the overhead block and ATM cells from the data string received from the PMD sublayer and sending the ATM cells
to the ATM layer.
Futhermore, the
PD98402A is compliant with the ATM Forum UNI Recommendations.
FEATURES
Provision of TC sublayer function of ATM protocol physical layer
Support of SONET STS-3c frame/SDH STM-1 frame format
Provision of stop mode for cell scramble/descramble and frame scramble/descramble
Disposal/transitory selection of unassigned cells is possible.
Compliant with UTOPIA interface
Incorporation of internal loopback function at PMD and ATM layer turns
PMD interface
155.52 Mbps serial interface
19.44 MHz parallel interface
Provided with registers for writing/reading overhead information
SOH (section overhead): C1 (1st to 3rd) bytes, F1 byte
LOH (line overhead): K2 byte
POH (pass overhead): F2 byte, C2 byte
CMOS process
+5 V single power supply
LOCAL ATM SONET FRAMER
Document No. S10835EJ1V0DS00 (1st edition)
Date Published December 1995 P
Printed in Japan
The information in this document is subject to change without notice.
1995
DATA SHEET
PD98402A
2
Incorporation of OAM (Operation And Maintenance) function
Transmitting side
Transmission of various alarms
Transmission by generation of sources
Line RDI (FERF), Path RDI (FERF)
Line FEBE, Path FEBE
Transmission by command instruction
Line AIS, Path AIS
Line FEBE, Path FEBE
Receiving side
Detection of alarms and error signals
LOS (Loss Of Signal)
OOF (Out Of Frame)
LOF (Loss Of Frame)
LOP (Loss Of Pointer)
LOC (Loss Of Cell delineation)
Line RDI (FERF), Path RDI (FERF)
Line AIS, Path AIS
Detection and display of quality deterioration sources
B1 error, B2 error, B3 error, Line FEBE,
Path FEBE
Incorporation of counter for counting number of performance
monitoring errors
B1 byte error counter
B2 byte error counter
B3 byte error counter
Line FEBE error counter
Path FEBE error counter
PD98402A
3
ORDERING INFORMATION
Part Number
Package
PD98402AGM-KED160-pin plastic QFP (FINE PITCH) (24
24 mm)
APPLICATION EXAMPLES
The followings are examples of the terminal equipment and the ATM Hub application using the
PD98402A.
NIC APPLICATION
CONTROL
MEMORY
PD98401A
SAR CHIP
m
PD98402A
PHY CHIP
m
CLOCK
RECOVERY
CHIP
Rx PMD
Tx PMD
HOST BUS I/F
HOST BUS
SYNTHESIZER
CNT I/F
155.52MHz
DATA I/F (UTOPIA)
TO HUB
HUB APPLICATION (NIC SIDE)
SWITCH
SYSTEM
DATA I/F
CNT I/F
PD98402A
PHY CHIP
m
CLOCK
RECOVERY
CHIP
Rx PMD
Tx PMD
155.52MHz
SYNTHESIZER
CONTROLLER BUS
CONTROLLER
TO NIC
(UTOPIA)
PD98402A
4
BLOCK DIAGRAM
+
+
TDOC, TDOT
TCOC, TCOT
TFKC, TFKT
RDIC, RDIT
RCIC, RCIT
TPD0-TPD7
TPC
RPD0-RPD7
RPC
TFC
TDO
TJI
TCK
TMS
TRST
RESET
V
DD
GND
PSEL
OOF
RxFP
PMD Interface
Loop Back
Serial
fi
Parallel
SONET
Framing
A1, A2
Parallel
fi
Serial
BIP
Generator
(Tx)
BIP
Generator
(Rx)
Test
Block
Tx Overhead
Controller
Tx Timing Generator
Mode
Register
Descrambler
Rx Timing
Generator
Cell Delineation
HEC Verification
HEC Correction
Cell
Descrambler
Scrambler
Cell
Scrambler
HEC
Generator
Loop Back
Rx FIFO
4 Cell
Idle Cell
Drop
Tx FIFO
4 Cell
Idle Cell
Insert
ATM Layer Interface
RDO0--RDO7
RENBL
EMPTY
RSOC
RCLK
TDI0--TDI7
TENBL
FULL
TSOC
TCLK
Management Interface
D0--D7
A0--A5
R/W
ACK
CE
OE
PHINT
Performance
Registers
INT Cause
Registers
OAM Sequencer
C1(#1~#3)
Rx Overhead Registers
F1
K2
C2
F2
C1(#1~#3)
F1
K2
C2
F2
Tx Overhead Registers
Rx Overhead
Controller
TxFP
TCL
TFSS
LOS
TAL
RAL
RCL
PD98402A
5
FUNCTIONAL PIN GROUPS
Note This function can be supported at the customer's request.
RDIC
RDIT
RCIC
RCIT
TDOC
TDOT
TCOC
TCOT
TFKC
TFKT
TPD0-TPD7
TPC
TFC
RPD0-RPD7
RPC
PSEL
RDO0-RDO7
RCLK
RSOC
RENBL
EMPTY
TDI0-TDI7
TCLK
TSOC
TENBL
FULL
D0-D7
A0-A5
R/W
CE
ACK
PHINT
OE
TJI
TDO
TCK
TMS
TRST
RCL
TCL
TxFP
RxFP
TFSS
RESET
V
DD
GND
8
8
8
6
JTAG boundary scan
Note
pin
OAM
Interface
PMD
Interface
Management
Interface
ATM Layer
Interface
RAL
TAL
LOS
OOF
Control
8
8