NJU6350

SERIAL I/O REAL TIME CLOCK

GENERAL DESCRIPTION

The NJU6350 is a serial I/O Real Time Clock suitable for

4 bits micro-processor.

It contains quartz crystal oscillator, counter, shift register,

voltage regulator, voltage detector, and interface controller.

The NJU6350 required only 3-port of microprocessor for

data transfer, and the microprocessor can receive the data

at any time when the microprocessor requires.

The operating voltage is as wide as 2.0V to 5.5V,

consequently, the NJU6350 can count accurate time data

even if the back up period.

Furthermore, the long time back up is available as the

current consumption during the back up period is less than

FEATURES

Operating Voltage : 3.0V

20%

2.0V to 5.5V ( The clock operation )

Low operating current : 0.8

A ( Typ. ) at 2.0V

2.0

A ( Max. ) at 2.0V

BCD Counts of Seconds, Minutes, Hours, Days of Week,

Date, Month and Year

Required only 3-port ( DATA, CLK and CE )

Low Battery Detector ( Low voltage alarm signal output )

Automatic Leap Year Compensation : Up to AD 2099

Package Outline : VSP 8 / Chip

C-MOS

Technology

PACKAGE OUTLINE

PIN CONFIGURATION

NJU6350R

NJU6350C

OUT

DATA

CLK

NJU6350

BLOCK DIAGRAM

TERMINAL DESCRIPTION

No.

SYMBOL

I/O

FUNCTION

Fout

Oscillator output terminal.
ON :It outputs oscillator signal , frequency 32.768kHz.
OFF :It is in high impedance status.

2
3

XT
XT

Quartz crystal connect terminal ( f = 32.768kHz ).

Power

GND

Chip enable terminal ( With pull-down resistor ).
" H " : Data input/output available
" L " : Data terminal is in high impedance status.
When the data input/output is executed consequently, the CE terminal should be
set to " L " level at the data transmission interval.

CLK

Clock terminal.
The Data Input/Output is synchronized by this clock. When the CE terminal is "L",
the data input is not available.
When the CE signal which is raising edge or falling edge, the CLK signal should
be fixed to " L ".

DATA

I/O

Serial timer data input/output terminal.
This terminal is switched to input or output by system control data. (Defult : input)
When the CE terminal is set to " L ", the data terminal is high impedance.

Power

Power supply
The rising time of V

should be less than 10mS.

Fout

XT
XT

Oscillator
Divider

Low Voltage
Detector

Timer Counter

sec.

min.

day

date

hour

month

year

Controller

DATA

CLK

NJU6350

FUNCTIONAL DESCRIPTION

1. Timer and System control data format

The NJU6350 adopts BCD code consisting of 4 bits per digit.
The calendar function including the last date of each month and the leap year calculation is executed

automatically. The system control data operates Data I/O mode set, Oscillator output set and Test mode set.

The unused bit for the Timer and System control data is always set to " 0 ".

< System control data format >

MSB

LSB

System control data block

C o n t e n t s

Writing the data of oscillator output / test mode set
F = " 0 " : Oscilator output off (high impedance status)
F = " 1 " : Oscilator output on
T0 to 6:Test mode set ( Normaly all " 0 " )
MSB LSB

Writing the data of " Year "

Writing the data of " Month "

Writing the data of " Date "

Writing the data of " Days of Week "

Writing the data of " Hour "

Writing the data of " Minute "

Writing the data of " Second "

Reading the data of " Year "

Reading the data of " Month "

Reading the data of " Date "

Reading the data of " Days of Week "

Reading the data of " our "

Reading the data of " Minute "

Reading the data of " Second "

nvalidity

< Timer data format >

MSB

LSB

Range

Second

Minute

Hour

Days of Week

Date

Month

Year

Note1) The bit of " DC " in the " Days of Week " is a flag as the result of Low Voltage Detection. If the supply
voltage is reduced to the detection voltage level, then the flag of " DC " is set to "1" at the read operation,
and else the flag is always " 0 ".
(Note2) Only the data of Sec.., ..,Year as data of Timer and Calendar must be written to the NJU6350 why any
other data will be causes in malfunction of the timer counter.

NJU6350

2. Data writing operation

Data writing performs to set the system control data block ( 4 bits ) and the mode set data ( Oscillator output

control and Test mode set ) or the timer data block ( 8 bits, but only data of " Days of Week " is 4 bits ) to
NJU6350.

The CE terminal is set to " H ", and the data is written into the shift register in the NJU6350 from the DATA

terminal synchronizing with the rising edge of the clock signal input from the CLK terminal.

At first, System control data is written into NJU6350. The first 4 bits of them are effective. When the bit of

" RW " in System control data is " 1 ", the mode goes to writing. In the writing mode, the update of the timer is
stopped and the oscillator divider is cleared excepting for the Oscillation output set and Test mode set.

At second, Timer data is written into NJU6350. The last 8 bits of them are effective. ( In case of Days of week,

the last 4 bits are effective. )

The data order to write is LSB first.
The oscillator divider starts the operation when the CE signal is changed from " H " or " L ".

< Writing timer data >

In case of November

Input data

(Note3) In case of over than 12 bits data, valid data is the first 4 bits as System control data and the last 8 bits
as Timer data. ( In case of Days of week, it is the last 4 bits is effective. )

3. Data reading operation

Data reading performs to send the Timer data ( 8 bits, but only data of " Days of Week " is 4 bits )

corresponding the system control data from NJU6350 after the system control data ( 4 bits ) is set to NJU6350.

The CE terminal is set to " H ", and the System control data are written into the shift register in the NJU6350

from the DATA terminal synchronized with the rising edge of the clock signal input from the CLK terminal.

At first, System control data is written into NJU6350. The first 4 bits of them are effective. When the bit of

" RW " in System control data ( Except the " 0,0,0,0 " data. ) is " 0 " the mode goes to reading. When the falling
edge of the clock signal is input from the CLK terminal just after the recognition of reading mode, the DATA
terminal is changed from Input to Output. The first 8 bits of Read data is effective. ( In case of Days of week,
the first 4 bits is effective. ) After the falling edge of the CE terminal, the DATA terminal is changed from Output
to Input. The data order to read is LSB first.

(Note4) In case of counting the timer up during the data reading.

The difference between the read out data of timer and the actual timer data is sometimes occurred. ( The

difference range depend on condition. )

In case of " 99.12.31.Sat.23:59:59 " at the current time, the update is operated immediately after year but

" 99 " is read out, the data is the result of reading operation is " 99.1.1.Sun.0:0:0 " instead of the true data
" 00.1.1.Sun.0:0:0 ".

CLK

DATA

NJU6350

< Reading timer data >

In case of

( Note5 ) The first 8 bits of timer data are effective. (In case of Days of week, the first 4 bits are effective.)

4. Voltage Detect Function

The NJU6350 incorporates the low battery detector. If the supply voltage reduce to the detection level,

Detector check flag is " 1 " as warning code for the CPU. When power on reset or data writing operation, the

Detector check flag is set " 0 ". The low battery detector operates one time per 1 second.

5. Data Access

The NJU6350 can operate from 2.0V to 5.5V. However, the data access must operate in the range of

20%.

6. Crystal Oscillator Circuit

The crystal oscillator circuit in the NJU6350 incorporates the capacitors. Therefore, it can operate with only

external crystal for 32.768kHz.

However, the external capacitors are required to get the matching between the incorporated oscillator and a

external crystal in accordance with the characteristics of crystal.

CLK

DATA

System control writing data

Timer reading data

The DATA terminal is changed over from Output to Input

Input data

The DATA terminal is changed over from Input to Output at the arrow.

Rf = 20M

(TYP)

32.768kHz

Cg = 31pF (TYP)

Ro = 320k

(TYP)

Cd = 18pF (TYP)

NJU6350

ABSOLUTE MAXIMUM RATINGS

P A R A M E T E R

SYMBOL

R A T I N G

UNIT

Supply Voltage

-0.3 to +6.0

Input Voltage

-0.3 to V

+0.3

Operating Temperature

Topr

-30 to +80

Storage Temperature

Tstg

-40 to +125

Power Dissipation

VSP

320

Note1) Decoupling capacitor should be connected between V

and V

due to the stabilized operation of

the circuit.

ELECTRICAL CHARACTERISTICS

DC Characteristics ( Unless Otherwise Specified V

=3V

20%, V

=0V, Ta=25

C )

P A R M E T E R

SYMBOL

C O N D I T O I N S

MIN.

TYP.

MAX.

UNIT

Operating Voltage

2.0

3.6

Detecting Voltage

DET

1.3

1.6

1.9

DD1

Oscillation Output off, XT=32.768kHz
V

=2.0V, CE=CLK=0V

0.8

2.0

Operating Current

DD2

Oscillation Output off, XT=32.768kHz
V

=3.6V, CE=CLK=0V

0.8

2.0

3-state Leakage Current

TSL

DATA Terminal ( CE=0V )

-2.0

2.0

Input Leakage Current

CLK Terminal

-1.0

1.0

Input Current

CE Terminal ( V

=CE=3.6V )

12.0

CLK, CE, DATA Terminals

X0.8

Input Voltage

CLK, CE, DATA Terminals

x0.2

OH1

DATA Terminal ( V

=2.4V, V

=1.8V )

0.4

OH2

OUT

Terminal ( V

=2.4V, V

=1.8V )

1.0

Output Current

DATA,F

OUT

Terminals ( V

=2.4V, V

=0.4V )

1.0

AC Characteristics ( Unless Otherwise Specified V

=3V

20%, V

=0V, Ta=25

C )

P A R A M E T E R

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNIT

CLK Pulse " H " Period

CWH

0.47

5000

CLK Pulse " L " Period

CWL

0.47

5000

CE Set-up Time Before CLK Rising

470

CE Hold Time After CLK Falling

DATA Set-up Time Before CLK Rising

WDS

100

DATA Hold Time After CLK Rising

WDH

DATA Delay Time CLK Falling

RDD

=2.4V

CL=50pF

200

Rise / Fall Time

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