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Электронный компонент: NJU6539FG1

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- 1 -
NJU6539
Ver.2004-03-01
1/8, 1/9, 1/10 Duty
BITMAP LCD DRIVER with KEY SCAN
GENERAL DESCRIPTION
The NJU6539 is a 10-common x 65-segment bitmap LCD driver
to display graphics or characters.
It contains 650 bits display data RAM, microprocessor interface
circuit, common and segment drivers, key scan circuit, and general
output ports.
An image data from MPU through the serial interface is stored
into the 650 bits internal displayed on the LCD panel through the
commons and segments drivers.
The NJU6539 displays 10 x 65 dots graphics or 11-character
1-line by 5 x 7 dots character + 3 x 65 dots icons.
It contains key scan circuit transmitting the 25-keys maximum (5 x 5
= 25) to MPU.
Also it provides 4 general purpose output ports with PWM output
function maximum to drive LEDs or others directly.
Furthermore, the NJU6539 can select a LCD driving voltage out
of 16 steps voltage by the instruction adjust the display contrast of
LCD panel.

FEATURES
Direct Correspondence between Display Data RAM and LCD Pixel
Display Data RAM
: 650-bits
LCD Drivers
: 65-seg, 10-com
Serial interface (SIO, SCL, CS)
Programmable Duty Ratio
1/8 Duty, 1/9 Duty, 1/10Duty
Bias Ratio
1/4 bias
25-key scan Function (5 x 5 matrix)
Needless for anti-reverse current diodes in key scan
General Output Ports with 128-steps PWM output (possible LED driving) maximum 4-ports
Useful Instruction Set
Display ON/OFF, Page Address Set, Column Address Set, ADC Select, Inverse Display ON/OFF, whole display
ON/OFF, Reset, EVR Register Set, Duty Select, Power Save mode set, General Output Port set, General Output Port
PWM data set, PWM slope set, PWM program Execute, General Output Port / Key scan output select, Display
Data write,
Bleeder Resistance On-chip
Software Contrast Control (16 steps)
Operating Voltage
Logic Operating Voltage
2.7 to 5.5V
LCD Driving Voltage
5.0
to
10.0V
Package Outline
QFP100-G1
QFP100-C2
C-MOS Technology
(Substrate: P)
PRELIMINARY
PACKAGE OUTLINE
NJU6539FC2
NJU6539FG1
- 2 -
NJU6539
Ver.2004-03-01
PIN CONFIGRATION































SEG
48
SEG
47
SEG
46
SEG
45
SEG
44
SEG
43
SEG
42
SEG
41
SEG
40
SEG
39
SEG
38
SEG
37
SEG
36
SEG
35
SEG
34
SEG
33
SEG
32
SEG
31
SEG
30
SEG
29
SCL SIO SEG
1
SEG
2
SEG
3
SEG
4
SEG
5
SEG
6
SEG
7
SEG
8
SEG
9
SEG
10
SEG
11
SEG
12
SEG
13
SEG
14
SEG
15
SEG
16
SEG
17
SEG
18
SEG
19
SEG
20
SEG
21
SEG
22
SEG
23
SEG
24
SEG
25
SEG
26
SEG
27
SEG
28
S
1
/Po
4
S
2
S
3
S
4
S
5
K
1
K
2
K
3
K
4
K
5
V
DD
VLCD
1
VLCD
2
V
0
V
1
V
2
V
SS
OSC
RESb
CE
Po
3
Po
2
Po
1
COM
10
COM
9
COM
8
COM
7
COM
6
COM
5
COM
4
COM
3
COM
2
COM
1
SEG
65
SEG
64
SEG
63
SEG
62
SEG
61
SEG
60
SEG
59
SEG
58
SEG
57
SEG
56
SEG
55
SEG
54
SEG
53
SEG
52
SEG
51
SEG
50
SEG
49
NJU6539FC2
SEG
50
SEG
49
SEG
48
SEG
47
SEG
46
SEG
45
SEG
44
SEG
43
SEG
42
SEG
41
SEG
40
SEG
39
SEG
38
SEG
37
SEG
36
SEG
35
SEG
34
SEG
33
SEG
32
SEG
31
SEG
30
SEG
29
SEG
28
SEG
27
SEG
26
SEG
1
SEG
2
SEG
3
SEG
4
SEG
5
SEG
6
SEG
7
SEG
8
SEG
9
SEG
10
SEG
11
SEG
12
SEG
13
SEG
14
SEG
15
SEG
16
SEG
17
SEG
18
SEG
19
SEG
20
SEG
21
SEG
22
SEG
23
SEG
24
SEG
25
COM
10
COM
9
COM
8
COM
7
COM
6
COM
5
COM
4
COM
3
COM
2
COM
1
SEG
65
SEG
64
SEG
63
SEG
62
SEG
61
SEG
60
SEG
59
SEG
58
SEG
57
SEG
56
SEG
55
SEG
54
SEG
53
SEG
52
SEG
51
NJU6539FG1
Po
1
Po
2
Po
3
S
1
/Po
4
S
2
S
3
S
4
S
5
K
1
K
2
K
3
K
4
K
5
V
DD
VLCD
1
VLCD
2
V
0
V
1
V
2
V
SS
OSC
RESb
CE
SCL
SIO
- 3 -
NJU6539
Ver.2004-03-01
BLOCK DIAGRAM






































E.V.R.
VLCD2
V0
V1
VSS
Common Driver
Segment Driver
COM
1
COM
2
COM
3
COM
4
COM
5
COM
6
COM
7
COM
8
COM
9
COM
10
SEG
6
3
SEG
6
4
SEG
6
5
Display Data RAM
Instruction Data Buffer
Instruction Decoder
Key Data Buffer
Key Scan
Control
Serial I/F
K1
K2
K3
K4
K5
CE
SC
L
SIO
Oscillator
RESET
OSC
SEG
1
SEG
2
SEG
3
VLCD1
V2
S5
S4
S3
S2
P
o4/
S
1
Po
3
Po
2
Po
1
General Output
Driver
Power ON
Reset
RESb
Res
e
t
Timing
Generator
Column Address Decoder
P
age A
ddress
Dec
oder
Input
Buffer
- 4 -
NJU6539
Ver.2004-03-01
TERMINAL DESCRIPTION
No.
FG1 FC2
Symbol I/O
Description
1 to 65
3 to 67
SEG
1
to SEG
65
O
Segment output terminal.
66 to 72 68 to 74
COM
1
to COM
7
O
Common output terminal.
73 to 75 75 to 77 COM
8
to COM
10
O
Icon common output terminal.
76 to 78 78 to 80
Po1 to Po3
O
General output port
128-step PWM waveform output by MPU control.
79 81 Po4/S
1
O
General output port / Key scanning input terminal
Select General output port or Key scanning input terminal by the
instruction.
A function must be selected either Po3 or S
0

General output port
128-step PWM waveform output by MPU control.

Key scanning input terminals
(No need for anti-reverse current diode in key scan)
80 to 83 82 to 85
S
2
to S
5
O
Key scanning input terminals.
(No need for anti-reverse current diode in key scan)
84 to 88 86 to 90
K
1
to K
5
I
Key scanning input terminals.
(with internal pull-down resistor)
89 91
V
DD
-
Power supply terminal.(
2.7V to 5.5V)
90
92
VLCD1
I
LCD driving voltage input terminal.
91
92
93
94
93
94
94
96
VLCD2
V
0
V
1
V
2
I
LCD driving voltage stabilization capacitor terminals.
Connect the capacitor between each terminal and Vss.
95 97
V
SS
-
Ground terminal.
96 98
OSC
I/O
Osclator terminal.
Conect the external resistor.
97 99
RESb
I
Reset terminal. (with internal pull-up resistor)
In case of only Power-on Reset should be open.
98
100
CE
I
Chip enable terminal
99
1
SCL
I
Serial clock input terminal
100
2
SIO
I/O
Serial Data input or output terminal
- 5 -
NJU6539
Ver.2004-03-01
APPLICATION CIRCUIT





































*1 The rising time of Power source voltage at Power on and the falling time at Power off must keep over than 1ms because of
Voltage detection type Reset circuit operation.
*2 SO terminal requires external pull-up resistor connecting to Power source of external MPU because of Open-drain type output.
*3 This capacitor for bias voltage stabilization should be connected in accordance with display quality in application.
*4 P
O3
/ S
0
terminal is general output ports and Key scan signal output duplicated-function terminals. A function must be selected
either Segment output or other.
*3
COM
1
Po
4
/S
1
S
2
S
3
S
4
S
5
K
1
K
2
K
3
K
4
K
5

MPU
RESb
CE
SC
SIO


V
LCD1
V
LCD2
V
0
V
1
V
2




V
SS
Po
1
Po
2
Po
3
Po
4
/S
1
*2
General output ports
*3
*3
*3
*3
NJU6539
5 x5 key matrix *4
V
LCD







V
SS
----
COM
10
SEG
1
----
SEG
65
10com 65seg
matrix LCD panel
OSC
V
DD
V
SS
*1
V
DD

V
SS
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.