NJW1146
1
PRELIMINARY
Audio Processor with BBE
s
s
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GENERAL DESCRIPTION
NJW1146 is an audio processor with BBE, which also includes Master
volume, Balance, Tone Control, eala(original surround), Mute, and Output
filter amplifier. All of internal status and variables are controlled by I
2
C
BUS.
s
s
s
s
FEATURES
q
Operating Voltage
8 to 10 V
q
I
2
C Bus interface
q
BBE
0
to
+15dB(0.5dB/step)
q
eala & simulated stereo
q
Master Volume
0 to -80dB, MUTE(0.33dB/step)
q
Balance
0 to -30dB, MUTE(1dB/step)
q
Tone Control
-15 to +15dB(0.5dB/step)
q
Bi-CMOS
q
Package Outline
SDMP30
s
s
s
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BLOCK DIAGRAM
CVB
CSR
CTL
CVA
CTH
CBH
I
2
C
Bu
s
In
te
r
f
a
c
e
eal
a
T
O
NE
-Lb
OUT
a
OUTb
TO
N
E
-
H
b
eal
a Fi
l
Vr
e
f
V+
GND
BB
E-
H
b
B
B
E
-
Lb
LFOUT
a
LFI
N
a
LFOUTb
LFI
N
b
AG
C
AG
C
Vol1
Vol1
BBE
BBE
Tone
Vol2
Vol2
Tone
Buffer
Buffer
Bias
CBL
SC
L
SD
A
T
O
NE
-La
TO
N
E
-
H
a
BB
E-
H
a
B
B
E
-
La
Inb
Ina
s
s
s
s
PACKAGE OUTLINE
NJW1146M
NJW1146
2
PRELIMINARY
s
s
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s
PIN FUNCTION
No. SYMBOL
FUNCTION
No. SYMBOL
FUNCTION
1 INa
A ch Input
16 V+
Power Supply
2 ealaFil
eala Filter Capacitor
17 VREF
Reference Voltage stabilizing Capacitor
3 BBE1a
Ach BBE High-Pass Filter Capacitor
18 CTL
Tone Control Bass switching noise rejection Capacitor
4 BBE2a
Ach BBE Low-Pass Filter Capacitor
19 CTH
Tone Control Treble switching noise rejection Capacitor
5 TONE-Ha
Ach TONE Treble Filter Capacitor
20 CBL
BBE Low switching noise rejection Capacitor
6 TONE-La
Ach TONE Bass Filter Capacitor
21 CBH
BBE High switching noise rejection Capacitor
7 OUTa
Ach Output
22 LFOUTb
Buffer Output for Bch Low Pass Filter
8 LFINa
Buffer Input for Ach Low Pass Filter
23 LFINb
Buffer Input for Bch Low Pass Filter
9 LFOUTa
Buffer Output for Ach Low Pass Filter
24 OUTb
Bch Output
10 AGC
AGC Smoothing Filter Capacitor
25 TONE-Lb
Bch TONE Bass Filter Capacitor
11 CVA
Ach Volume switching noise rejection Capacitor
26 TONE-Hb
Bch TONE Treble Filter Capacitor
12 CVB
Bch Volume switching noise rejection Capacitor
27 BBE2b
Bch BBE Low-Pass Filter Capacitor
13 SDA
I
2
C Data Input
28 BBE1b
Bch BBE High-Pass Filter Capacitor
14 SCL
I
2
C Clock Input
29 CSR
eala switching noise rejection Capacitor
15 GND
Ground
30 INb
B ch Input
1 15
16
30
NJW1146
3
PRELIMINARY
s
s
s
s
ABSOLUTE MAXIMUM RATING (Ta=25
C)
PARAMETER SYMBOL
RATING
UNIT
Supply Voltage
V
+
12 V
Power Dissipation
P
D
700
mW
Operating Temperature Range
Topr
-20 to +75
C
Storage Temperature Range
Tstg
-40 to +125
C
s
ELECTRICAL CHARACTERISTICS (Ta=25
C, V
+
=9V, R
L
=47k, Vin=100mVrms/1kHz
MODE ; VOL=0dB, BAL=0dB, AGC=OFF, BBE=OFF, Tone=0dB, eala=By-Pass)
PARAMETER
SYMBOL TEST
CONDITION MIN. TYP. MAX. UNIT
Operating Voltage
V
+
8.0
9.0
10.0
V
Supply Current
I
CC
No
Signal
- 25 35 mA
Reference Voltage
V
REF
No
Signal
4.0 4.5 5.0 V
Maximum Input Voltage
V
IM
VOL=-20dB,THD=10% 2.8 3.0 - Vrms
Maximum Output Voltage
V
OM
OUTPUT
VOL=0dB,THD=1%
- 2.5 - Vrms
Channel Balance
G
CB
VOL=0dB
-1.5 0.0 1.5 dB
Balance Boost A
G
BBA
CHS="0",BAL=Mute
-2.0 0.0 2.0 dB
Balance Cut A
G
BCA
CHS="1",BAL=Mute
Vin = 1Vrms
- - -70
dB
Balance Boost B
G
BBB
CHS="1",BAL=Mute
-2.0 0.0 2.0 dB
Balance Cut B
G
BCB
CHS="0",BAL=Mute
Vin = 1Vrms
- - -70
dB
Total Harmonic Distortion
THD
Vo=0.5Vrms
BW=400Hz to 30kHz
- - 0.5 %
Maximum Voltage Gain
G
VMAX
VOL=
0dB
-2.0 0.0 2.0 dB
Minimum Voltage Gain
G
VMIN
VOL=
Mute
-
- -70 dB
Channel Separation
CS
Vin = 1Vrms
-
-
-70
dB
Output Noise 1
V
NO1
VOL = 0dB
BW=400Hz to 30kHz
-
-
-90
(31.6)
-85
(56.2)
dBV
(Vrms)
Output Noise 2
V
NO2
VOL = Mute
BW = 400Hz to 30kHz
-
-
-106
(5.0)
-96
(15.8)
dBV
(Vrms)
BW : Band Width
x
x
x
x
TONE CONTROL CHARACTERISTICS (Ta=25
C, V
+
=9V, R
L
=47k, Vin=100mVrms/1kHz
MODE ; VOL=0dB, BAL=0dB, AGC=OFF, BBE=OFF, eala=By-Pass)
PARAMETER
SYMBOL
TEST
CONDITION
MIN. TYP. MAX. UNIT
Treble Boost Gain
G
HFBST
TREB=+15dB,
f=10kHz
12.5 15.0 17.5 dB
Treble Boost Flat
G
HFFLT
TREB=0dB,f=10kHz
-2.0 0.0 2.0 dB
Treble Boost Cut
G
HFCUT
TRBE=-15dB,
f=10kHz
-17.5 -15.0 -12.5 dB
Bass Boost Gain
G
LFBST
BASS=+15dB,
f=100Hz 12.5 15.0 17.5 dB
Bass Boost Flat
G
LFFLT
BASS=0dB,
f=100Hz
-2.0 0.0 2.0 dB
Bass Boost Cut
G
LFCUT
BASS=-15dB,
f=100Hz
-17.5 -15.0 -12.5 dB
NJW1146
4
PRELIMINARY
x
x
x
x
AGC CHARACTERISTICS (Ta=25
C, V
+
=9V, R
L
=47k
MODE ; VOL=0dB, BAL=0dB, AGC=ON, BBE=OFF, Tone=0dB, eala=By-Pass)
PARAMETER
SYMBOL
TEST
CONDITION
MIN. TYP. MAX. UNIT
AGC Boost
G
AGCBST
Vin=50mVrms,
f=1kHz
1.5 3.5 5.5 dB
AGC Flat 1
G
AGCFLT1
Vin=300mVrms,
f=1kHz
-2.5 0.0
2.5
dB
AGC Flat 2
G
AGCFLT2
Vin=400mVrms,
f=1kHz
-2.5 0.0
2.5
dB
AGC Flat 3
G
AGCFLT3
Vin=500mVrms,
f=1kHz
-2.5 0.0
2.5
dB
AGC Flat 4
G
AGCFLT4
Vin=600mVrms,
f=1kHz
-2.5 0.0
2.5
dB
AGC Cut
G
AGCCUT
Vin=2Vrms,
f=1kHz
-14 -10 -6.0
dB
x
x
x
x
BBE CHARACTERISTICS (Ta=25
C, V
+
=9V, R
L
=47k, Vin=100mVrms/1kHz
MODE ; VOL=0dB, BAL=0dB, AGC=OFF, Tone=0dB, eala=By-Pass)
PARAMETER
SYMBOL
TEST
CONDITION
MIN. TYP. MAX. UNIT
Low Boost Gain
G
BBELOW
BBE-LOW =+15dB, f=50Hz
12.5 15 17.5 dB
High Boost Gain
G
BBEHIGH
BBE-HIGH =+15dB, f=10kHz
12.5 15 17.5 dB
x
x
x
x
eala CHARACTERISTICS (Ta=25
C, V
+
=9V, R
L
=47k, Vin=100mVrms/1kHz
MODE ; VOL=0dB, BAL=0dB, AGC=OFF, BBE=0dB, Tone=0dB)
PARAMETER
SYMBOL
TEST
CONDITION
MIN. TYP. MAX. UNIT
Simulated Stereo A
G
SIMA
LIN+RINOUTa, f=1KHz, SIM
1.0 3.0 5.0 dB
Simulated Stereo B
G
SIMB
LIN+RINOUTb, f=1KHz, SIM
1.0 3.0 5.0 dB
Surround 3D1
G
3D1
LIN
OUTa, f=100Hz, SR2
5.5 7.5 9.5 dB
Surround 3D2
G
3D2
LIN
OUTa, f=10KHz, SR2
-2.0 0.0 2.0 dB
Surround 3D3
G
3D3
LIN
OUTb, f=100Hz, SR2
0.5 2.5 4.5 dB
Surround 3D4
G
3D4
LIN
OUTa, f=100Hz, SR1
3.5 5.5 7.5 dB
s
s
s
s
I
2
C BUS CHARACTERISTICS (SDA, SCL)
I
2
C BUS Load Conditions: Pull up resistance 4k(Connected to +5V), Load capacitance 200pF (Connected to GND)
PARAMETER
SYMBOL
MIN. TYP. MAX. UNIT
High Level Input Voltage
V
IH
3.0 - 5.0 V
Low Level Input Voltage
V
IL
0 -
1.5
V
High Level Input Current
I
IH
-
-
10
A
Low Level Input Current
I
IL
-
-
10
A
Low Level Output Voltage (3mA at SDA pin)
V
OL
0 -
0.4
V
Maximum Output Current
I
OL
-3.0 - - mA
Maximum Clock Frequency
f
SCL
0 -
100
kHz
Data Change Minimum Waiting Time
t
BUF
4.7 - - s
Data Transfer Start Minimum Waiting Time
t
HD:STA
4.0 - - s
Low Level Clock Pulse Width
t
LOW
4.7 - - s
High Level Clock Pulse Width
T
HIGH
4.0 - - s
Minimum Start Preparation Waiting Time
t
SU:STA
4.7 - - s
Minimum Data Hold Time
t
HD:DAT
5.0 - - s
Minimum Data Preparation Time
t
SU:DAT
250 - - ns
Rise Time
t
R
-
-
1.0
s
Fall Time
t
F
-
-
300
ns
Minimum Stop Preparation Waiting Time
t
SU:STO
4.7 - - s
NJW1146
5
PRELIMINARY
SDA
SCL
t
BU
t
HD:ST
Sr
P
t
LOW
t
R
t
HD:DA
t
HIGH
t
F
t
SU:DA
S
P
t
SU:ST
t
SU:ST
t
HD:ST
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