TL F 10215
54298
Quad
2-Port
Register
(Multiplexer
With
Storage)
June 1989
54298
Quad 2-Port Register (Multiplexer With Storage)
General Description
The '298 is a quad 2-port register It is the logical equivalent
of a quad 2-input multiplexer followed by a quad 4-bit edge-
triggered register A Common Select input selects between
two 4-bit input ports (data sources) The selected data is
transferred to the output register synchronous with the
HIGH-to-LOW transition of the Clock input
Features
Y
Select from two data sources
Y
Fully edge-triggered operation
Connection Diagram
Dual-In-Line Package
TL F 10215 1
Order Number 54298DMQB or 54298FMQB
See NS Package Number J16A or W16A
Logic Symbol
TL F 10215 2
V
CC
e
Pin 16
GND
e
Pin 8
Pin Names
Description
S
Common Select Input
CP
Clock Pulse Input (Active Falling Edge)
I0a I0d
Source 0 Data Inputs
I1a I1d
Source 1 Data Inputs
Qa Qd
Flip-Flop Outputs
C1995 National Semiconductor Corporation
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings
(Note)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7V
Input Voltage
5 5V
Operating Free Air Temperature
Range
b
55 C to
a
125 C
Storage Temperature Range
b
65 C to
a
150 C
Note
The ``Absolute Maximum Ratings'' are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ``Electrical Characteristics''
table are not guaranteed at the absolute maximum ratings
The ``Recommended Operating Conditions'' table will define
the conditions for actual operation
Recommended Operating Conditions
Symbol
Parameter
54298
Units
Min
Nom
Max
V
CC
Supply Voltage
4 5
5
5 5
V
V
IH
High Level Input Voltage
2
V
V
IL
Low Level Input Voltage
0 8
V
I
OH
High Level Output Current
b
0 8
mA
I
OL
Low Level Output Current
16
mA
T
A
Free Air Operating Temperature
b
55
125
C
t
s
(H)
Setup Time HIGH or LOW
25
ns
t
s
(L)
S to CP
25
t
h
(H)
Hold Time HIGH or LOW
0
ns
t
h
(L)
S to CP
0
t
s
(H)
Setup Time HIGH or LOW
15
ns
t
s
(L)
I
0x
or I
1x
to CP
15
t
h
(H)
Hold Time HIGH or LOW
5 0
ns
t
h
(L)
I
0x
or I
1x
to CP
5 0
t
w
(H)
CP Pulse Width HIGH or LOW
20
ns
t
w
(L)
20
Electrical Characteristics
over recommended operating free air temperature (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 1)
V
I
Input Clamp Voltage
V
CC
e
Min I
I
e b
12 mA
b
1 5
V
V
OH
High Level
V
CC
e
Min I
OH
e
Max
2 4
V
Output Voltage
V
IL
e
Max V
IH
e
Min
V
OL
Low Level
V
CC
e
Min I
OL
e
Max
0 4
V
Output Voltage
V
IH
e
Min V
IL
e
Max
I
I
Input Current
V
CC
e
Max V
I
e
5 5V
1
mA
Max Input Voltage
I
IH
High Level
V
CC
e
Max V
I
e
2 4V
40
m
A
Input Current
I
IL
Low Level
V
CC
e
Max V
I
e
0 4V
b
1 6
mA
Input Current
I
OS
Short Circuit
V
CC
e
Max
b
20
b
57
mA
Output Current
(Note 2)
I
CC
Supply Current
V
CC
e
Max (Note 3)
65
mA
Note 1
All typicals are at V
CC
e
5V T
A
e
25 C
Note 2
Not more than one output should be shorted at a time and the duration should not exceed one second
Note 3
I
CC
is measured with all outputs open and all inputs grounded
2
Switching Characteristics
V
CC
e a
5 0V T
A
e a
25 C (See Section 1 for test waveforms and output load)
C
L
e
15 pF
Symbol
Parameter
R
L
e
400X
Units
Min
Max
t
PLH
Propagation Delay CP to Q
n
27
ns
t
PHL
32
Functional Description
This device is a high speed quad 2-port register It selects
four bits of data from two sources (ports) under the control
of a Common Select input (S) The selected data is trans-
ferred to the 4-bit output register synchronous with the
HIGH-to-LOW transition of the Clock input (CP) The 4-bit
output register is fully edge-triggered The Data inputs (I
nx
)
and Select input (S) need be stable only one setup time
prior to the HIGH-to-LOW transition of the clock for predict-
able operation
Truth Table
Inputs
Output
S
I
0x
I
1x
Q
x
I
I
X
L
I
h
X
H
h
X
l
L
h
X
h
H
l
e
LOW Voltage Level one setup time prior to the HIGH-to-LOWclock
transition
h
e
HIGH Voltage Level one setup time prior to the HIGH-to-LOW clock
transition
H
e
HIGH Voltage level
L
e
LOW Voltage level
X
e
Immaterial
Logic Diagram
TL F 10215 3
3
54298
Quad
2-Port
Register
(Multiplexer
With
Storage)
Physical Dimensions
inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number 54298DMQB
NS Package Number J16A
16-Lead Ceramic Flat Package (W)
Order Number 54298FMQB
NS Package Number W16A
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SEMICONDUCTOR CORPORATION As used herein
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support device or system whose failure to perform can
into the body or (b) support or sustain life and whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system or to affect its safety or
with instructions for use provided in the labeling can
effectiveness
be reasonably expected to result in a significant injury
to the user
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