The CLC730024 is an evaluation board intended for the
evaluation of quad Op-Amps in the DIP package. The
CLC730031 is a similar board, but laid out for an SOIC
package.

To obtain optimum performance from a high speed
device, a good Printed Circuit Board (PCB) layout
is essential. The importance of the layout becomes
greater as the frequency of operation increases. Some
of National Semiconductor's quad Op-Amps have
bandwidths in excess of 100MHZ, therefore it is vital that
sound PCB layout techniques be used when designing
with these devices. The CLC730024 and CLC730031
are examples of good PCB layouts which designers are
encouraged to copy.

To minimize capacitive feedthrough and noise, if there
are op-amps not being used, they should be configured
as unity gain buffers (with a resistor in the feedback path
for current feedback devices) and the non-inverting
inputs connected to GND. On devices that are being
used, the ground plane should be removed from beneath
the feedback and gain setting resistors, to minimize
parasitic capacitance on sensitive nodes. Input and out-
put traces should be laid out as transmission lines with
the appropriate termination resistors very near the
device. On a 0.0065" (FR4 or equivalent) a 0.1" wide
trace over ground plane on the opposite side of the board
will exhibit a characteristic impedance of 50

Parasitic or load capacitance directly on the output of
an amplifier will introduce additional phase shift in the
device. If excessive, this phase shift can lead to peaking
in the frequency response or, in extreme cases, oscilla-
tion. A small series resistor in series with a capacitive
load effectively decouples it from the buffer output and
removes the undesirable effects of excess phase shift.
Further detail on the selection of these resistors can be
found in the individual amplifier data sheets.

Parts List

IN1

, R

IN2

, R

IN3

, R

IN4

select for desired input resistance

OUT1

OUT2

OUT3

, R

OUT4

select for desired output resistance

select according to data sheet and application

0.1

�

F capacitor

6.8

�

F capacitor

Optional ferrite bead inductors

Quad Op Amp Evaluation Boards

Part Number CLC730024, CLC730031

August 1997

� 1997 National Semiconductor Corporation

http://www.national.com

Printed in the U.S.A.

Figure 1: 730024 Board Layout and

Component Placement

Figure 2: 730031 Board Layout and

Component Placement

http://www.national.com

Lit #660414-002

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Figure 3: Evaluation Board Schematic

Электронный компонент: CLC730031