Comlinear suggests the use of evaluation boards as a
guide for high frequency layout and as an aid in device
testing and characterization. The 730043 and 730046
evaluation boards are designed to aid in the characteri-
zation of the CLC431 dual op amp with disable.
s
730043 - DIP packages
Uses all through-hole components
s
730046 - SOIC packages
Uses all surface mount components
Both boards have identical circuit configurations and are
designed for non-inverting gains. Inverting gains or other
circuit configurations can be obtained with slight modifi-
cations to the boards.
Basic Operation
Figures 1 and 2 show the schematics used for both
boards. The input signal is brought into the board
through SMA connectors to the non-inverting inputs of
the CLC431. The resistors R
in1
and R
in2
are used to set
the input termination resistance to the op amp. The non-
inverting gain is set by the following equation:
Non-inverting Gain:
The value of the feedback resistor, R
f
, has a strong influ-
ence on AC performance. (Feedback resistor selection is
addressed in the following section.) The output of the op
amp travels through a series resistance, R
out
, and then
leaves the board through an SMA connector. The series
resistance, R
out
, is provided to obtain adequate back
matching of a load or isolate the output from capacitive
loads.
Figure 1: Channel 1 Configuration
Figure 2: Channel 2 Configuration
When evaluating just one of the CLC431's channels, the
unused channel can cause adverse effects if not proper-
ly biased. Complete the following, on the unused chan-
nel:
s
Install R
f
and R
g
s
Ground the input through R
in
s
Load the output through R
out
Feedback Resistor Selection
Optimum performance of the CLC431, at a gain of +2V/V,
is achieved with R
f
equal to 866
. The
frequency response plots in the typical performance sec-
tion of the CLC431/CLC432 data sheet illustrate the rec-
ommended R
f
for several gains. Within limits, R
f
can be
adjusted to optimize the frequency response. Increase R
f
to roll-off frequency response and compress bandwidth.
As a rule of thumb, if the recommended R
f
is doubled,
then the bandwidth will be cut in half.
Disable Features
A detailed discussion of various disabling logic families
can be found in the CLC431/CLC432 data sheet. The
evaluation boards are designed to accommodate all
schemes mentioned in the data sheet.
There are 3 pins associated with the disable function for
each of the CLC431's op amps:
s
DIS - pins 3 and 5
s
DIS - pins 12 and 10
s
V
rttl
- pins 13 and 9
The CLC431 is guaranteed to be enabled if all of these
pins are left "open", unconnected.
CLC431 Evaluation Boards
Part Numbers CLC730043, CLC730046
August 1996
+
-
1/2 CLC431
R
f1
C
4
C
1
OUT
1
IN
1
+V
CC
2
1
11
1
+
R
g1
R
in1
R
out1
DIS
1
3
R
1
R
3
13
R
5
12
-V
CC
R
7
+
-
1/2 CLC431
R
f2
OUT
2
IN
2
-V
CC
6
7
8
R
g2
R
in2
R
out2
DIS
2
5
R
2
R
8
10
R
4
9
+V
CC
R
6
C
6
C
5
C
3
C
2
+
4
1
R
R
f
g
+
1996 National Semiconductor Corporation
http://www.national.com
Printed in the U.S.A.
N
The following is a brief description of R1 through R8
(refer to Figures 1 and 2):
s
R1 and R2 are used to set input termination
on the disable inputs (DIS).
s
R3 and R4 are inserted when it is necessary
to ground V
rttl
.
s
R5 and R6 connect each DIS pin to +V
CC
.
s
R7 and R8 connect each DIS pin to -V
CC
,
when desired.
The addition of R3 and R4 protect the disable circuit from
accidental shorts to the power supply during evaluation.
There are 2 diodes between DIS and V
rttl
, therefor setting
R3 and R4 to 2k
will limit the current and protect the
circuit from damage.
Isolation
For maximum isolation between channels, proper power
supply decoupling is required. Isolation performance
is significantly affected by the location of the bypass
capacitors' ground point. If these ground connections are
located near the ground connections of R
g
and R
in
, then
the channel-to-channel coupling will increase. To avoid
this, the CLC431 evaluation boards have been designed
with a "-V
CC
plane" under the part. This allows the
negative supply to be bypassed symmetrically near the
outputs.
s
When maximum isolation is desired, use C3,
C5, and C6 leaving C4 open.
s
When isolation is not critical, use C3 and C4
leaving C5 and C6 open.
The bypass capacitors, C1 and C2 should always be
included. The use of good quality capacitors also helps
to achieve better isolation performance.
Layout Considerations
General layout and supply bypassing play major roles in
high frequency performance. When designing your own
board, use the evaluation board as a guide and follow
these steps as a basis for high frequency layout:
1. Include 6.8
F tantalum and 0.1
F ceramic
capacitors on both supplies.
2. Place the 6.8
F capacitors within 0.75 inches
of the power pins.
3. Place the 0.1
F capacitors less than 0.1
inches from the power pins.
4. Remove the ground plane under and around
the part, especially near the input and output
pins to reduce parasitic capacitance.
5. Minimize all trace lengths to reduce series
inductances.
6. Do not use sockets. If absolutely necessary,
use individual flush-mount sockets.
Measurement Hints
If 50
coax and 50
R
in
/R
out
resistors are used,
many of the typical performance plots found in the
CLC431/CLC432 data sheets can be reproduced.
When SMA connectors and cables are not available to
evaluate the CLC431, do not use normal oscilloscope
probes. Use low impedance resistive divider probes of
100 to 500
. If a low impedance probe is not available,
then a section of 50
coaxial cable and a low impedance
resistor may be used. Follow these 3 steps to create a
"cable/resistor" probe:
1. Connect one end of the coax's center to a test
measurement box terminated in 50
.
2. Connect the other end of the cable's center
conductor to the low impedance resistor. (The
open side of the resistor is now a probe.)
3. Connect the ground shield of the cable to
evaluation board ground and test box ground.
Figure 3: "Cable/Resistor" Probe Configuration
This "cable/resistor" probe shown in Figure 3, forms a
voltage attenuator between the resistor and the 50
ter-
mination resistance of the test box. This method allows
measurements to be performed directly on the output pin
of the amplifier.
Power Supplies
The recommended power supply for the CLC431 is 15V.
However, the voltages can be taken down to 5V with
slightly degraded performance.
Component Values
s
Use the CLC431/CLC432 data sheet and the
evaluation board sheet to select resistor values.
s
C1, C2 - 6.8
F tantalum capacitors
s
C3, C4, C5, C6 0.1
F ceramic capacitors
http://www.national.com
2
Test Box and
Evaluation Board
Ground
50
Coaxial
Cable
Low Impedance
Resistor
Probe
Test Box
(terminated
in 50
)
3
http://www.national.com
(970) 226-0500
OUT1
OUT2
Gnd
C5
R7
Rout1
R3
C3 R4
R5
R6
R8
C6
C2
Rf 2
Rg 2
Rin 2
IN2
-Vcc
C4
R2
R1
DIS1
DIS2
F t C o l l i n s
C o l o r a d o
U S A
C o m l i n e a r
C1
Rf 1
+Vcc
U1
1
+
+
Rg1
Rin 1
IN1
Rout2
730046
REV A
730046 SOIC Top Side
730046 SOIC Bottom Side
Comlinear
Fort Collins
Colorado
DIS1
DIS2
IN2
IN1
OUT1
OUT2
(970) 226-0500
Rg1
Rin1
Rin2
Rg2
-Vcc
Gnd
C3
C6
C5
+Vcc
C4
R7
Rf1
Rf2
R8
R1
R2
C1
+
+
C2
U1
1
Rout1
R3
R5
R6
R4
Rout2
730043
REV A
730043 DIP Top Side
730043 DIP Bottom Side
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4
Lit #660431-001
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