COP884BC
8-Bit CMOS ROM Based Microcontrollers with 2k
Memory, Comparators, and CAN Interface
General Description
The following part number is a pin count and tempera-
ture variation of the COP884BC: COP885BC.
The COP884BC ROM based microcontrollers are highly
integrated COP8
TM
Feature core devices with 2k memory
and advanced features including a CAN 2.0B (passive) in-
terface and two Analog comparators. These single-chip
CMOS devices are suited for applications requiring a full
featured controller with a CAN interface, low EMI, and an
8-bit 39 kHz PWM timer. COP87L84BC devices are pin and
software compatible 16k OTP (One Time Programmable)
versions for pre-production, and for use with a range of
COP8 software and hardware development tools.
Features include an 8-bit memory mapped architecture, 10
MHz CKI (crystal osc) with 1s instruction cycle, one multi-
function 16-bit timer/counter, 8-bit 39 kHz PWM timer with 2
outputs, CAN 2.0B (passive) interface, MICROWIRE/
PLUS
TM
serial I/O, two Analog comparators, two power sav-
ing HALT/IDLE modes, idle timer, MIWU, software selectable
I/O options, Power on Reset, low EMI 4.5V to 5.5V opera-
tion, and 20/28 pin packages.
Note: A companion device with CAN interface, more I/O and
memory, A/D, and USART is the COP888EB.
Devices included in this datasheet are:
Device
Memory (bytes)
RAM (bytes)
I/O Pins
Packages
Temperature
COP684BC
2k ROM
64
18
28 SOIC
-55 to +125C
COP884BC
2k ROM
64
18
28 SOIC
-40 to +85C
COP685BC
2k ROM
64
10
20 SOIC
-55 to +125C
COP885BC
2k ROM
64
10
20 SOIC
-40 to +85C
Key Features
n
CAN 2.0B (passive) Interface
n
Power On Reset (selectable)
n
One 16-bit timer, with two 16-bit registers supporting:
-- Processor Independent PWM mode
-- External Event counter mode
-- Input Capture mode
n
High speed, constant resolution 8-bit PWM/frequency
monitor timer with 2 output pins
n
2048 bytes on-board ROM
n
64 bytes on-board RAM
Additional Peripheral Features
n
Idle Timer
n
Multi-Input Wake Up (MIWU) with optional interrupts (7)
n
Two analog comparators
n
MICROWIRE/PLUS serial I/O
I/O Features
n
Memory mapped I/O
n
Software selectable I/O options (TRI-STATE
Output,
Push-Pull Output, Weak Pull-Up Input, High Impedance
Input)
n
Schmitt trigger inputs on ports G and L
n
Packages: 28 SO with 18 I/O pins and 20 SO with 10
I/O pins
CPU/Instruction Set Features
n
1 s instruction cycle time
n
Eleven multi-source vectored interrupts servicing
-- External Interrupt
-- Idle Timer T0
-- Timer T1 (with 2 Interrupts)
-- MICROWIRE/PLUS
-- Multi-Input Wake Up
-- Software Trap
-- PWM Timer
-- CAN Interface (with 3 interrupts)
n
Versatile and easy to use instruction set
n
8-bit Stack Pointer (SP) -- stack in RAM
n
Two 8-bit Register Indirect Data Memory Pointers
(B and X)
Fully Static CMOS
n
Two power saving modes: HALT and IDLE
n
Low current drain (typically
<
1 A)
n
Single supply operation: 4.5V5.5V
n
Temperature ranges: -40C to +85C, -55C to +125C
Development Support
n
Emulation and OTP devices
n
Real time emulation and full program debug offered by
MetaLink Development Systems
COP8
TM
, and MICROWIRE/PLUS
TM
are trademarks of National Semiconductor Corporation.
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
iceMASTER
is a registered trademark of MetaLink Corporation.
September 1999
COP884BC
8-Bit
CMOS
ROM
Based
Microcontrollers
with
2k
Memory
,
Comparators,
and
CAN
Interface
2001 National Semiconductor Corporation
DS012067
www.national.com
Absolute Maximum Ratings
(Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
)
6V
Voltage at Any Pin
-0.3V to V
CC
+0.3V
Total Current into V
CC
Pin (Source)
90 mA
Total Current out of GND Pin (Sink)
100 mA
Storage Temperature Range
-65C to +150C
Note 2: Absolute maximum ratings indicate limits beyond which damage to
the device may occur. DC and AC electrical specifications are not ensured
when operating the device at absolute maximum ratings.
DC Electrical Characteristics COP884BC:
-40C
T
A
+85C
Parameter
Conditions
Min
Typ
Max
Units
Operating Voltage
4.5
5.5
V
Power Supply Ripple (Note 3)
Peak-to-Peak
0.1 V
CC
V
Supply Current
CKI = 10 MHz (Note 4)
V
CC
= 5.5V, t
c
= 1 s
15
mA
HALT Current (Notes 5, 6)
V
CC
= 5.5V, CKI = 0 MHz
Power-On Reset Enabled
<
300
480
A
Power-On Reset Disabled
<
250
380
A
IDLE Current (Note 6)
CKI = 10 MHz
V
CC
= 5.5V, t
c
= 1 s
5.5
mA
Input Levels (V
IH
, V
IL
)
Reset, CKI
Logic High
0.8 V
CC
V
Logic Low
0.2 V
CC
V
All Other Inputs
Logic High
0.7 V
CC
V
Logic Low
0.2 V
CC
V
Hi-Z Input Leakage
V
CC
= 5.5V
2
A
Input Pull-up Current
V
CC
= 5.5V, V
IN
= 0V
-40
-250
A
G and L Port Input Hysteresis
(Notes 9, 10)
0.05 V
CC
V
Output Current Levels D Outputs
Source
V
CC
= 4.5V, V
OH
= 3.3V
-0.4
mA
Sink
V
CC
= 4.5V, V
OL
= 1.0V
10
mA
Comparator Output (L2, L6)
Source (Push-Pull)
V
CC
= 4.5V, V
OH
= 3.3V
-1.6
mA
Sink (Push-Pull)
V
CC
= 4.5V, V
OL
= 0.4V
1.6
mA
CAN Transmitter Outputs
Source (Tx1)
V
CC
= 4.5V, V
OH
= V
CC
- 0.1V
-1.5
mA
V
CC
= 4.5V, V
OH
= V
CC
- 0.6V
-10
mA
Sink (Tx0)
V
CC
= 4.5V, V
OL
= 0.1V
1.5
mA
V
CC
= 4.5V, V
OL
= 0.6V
10
mA
All Others
Source (Weak Pull-Up)
V
CC
= 4.5V, V
OH
= 2.7V
-10
-110
A
Source (Push-Pull)
V
CC
= 4.5V, V
OH
= 3.3V
-0.4
mA
Sink (Push-Pull)
V
CC
= 4.5V, V
OL
= 0.4V
1.6
mA
TRl-STATE Leakage
V
CC
= 5.5V
2.0
A
Allowable Sink/Source Current per
Pin
D Outputs (Sink)
15
mA
Tx0 (Sink) (Note 10)
30
mA
Tx1 (Source) (Note 10)
All Other
30
3
mA
mA
COP884BC
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4
DC Electrical Characteristics COP884BC:
(Continued)
-40C
T
A
+85C
Parameter
Conditions
Min
Typ
Max
Units
Maximum Input Current
without Latchup (Notes 8, 10)
Room Temp
100
mA
RAM Retention Voltage, V
r
(Note 9)
500 ns Rise and Fall Time
2.0
V
Input Capacitance
(Note 10)
7
pF
Load Capacitance on D2
1000
pF
Note 3: Maximum rate of voltage change must be less than 0.5 V/ms
Note 4: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at V
CC
or GND, and outputs open.
Note 5: The HALT mode will stop CKI from oscillating in the Crystal configurations. Halt test conditions: All inputs tied to V
CC
; L, and G port I/Os configured as
outputs and programmed low; D outputs programmed low. Parameter refers to HALT mode entered via setting bit 7 of the G Port data register. Part will pull up CKI
during HALT in crystal clock mode.
Note 6: HALT and IDLE current specifications assume CAN block and comparators are disabled.
COP884BC
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5
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