TL F 9829
DM54LS323DM74LS323
8-Bit
Universal
ShiftStorage
Register
with
Synchronous
Reset
and
Common
IO
Pins
April 1992
DM54LS323 DM74LS323
8-Bit Universal Shift Storage Register
with Synchronous Reset and Common I O Pins
General Description
The 'LS323 is an 8-bit universal shift storage register with
TRI-STATE
outputs Its function is similar to the 'LS299
with the exception of Synchronous Reset Parallel load in-
puts and flip-flop outputs are multiplexed to minimize pin
count Separate inputs and outputs are provided for flip-
flops Q0 and Q7 to allow easy cascading Four operation
modes are possible hold (store) shift left shift right and
parallel load All modes are activated on the LOW-to-HIGH
transition of the Clock
Features
Y
Common I O for reduced pin count
Y
Four operation modes shift left shift right parallel load
and store
Y
Separate continuous inputs and outputs from Q0 and
Q7 allow easy cascading
Y
Fully synchronous reset
Y
TRI-STATE outputs for bus oriented applications
Connection Diagram
Dual-In-Line Package
TL F 9829 1
Order Number DM54LS323J DM54LS323W DM74LS323WM or DM74LS323N
See NS Package Number J20A M20B N20A or W20A
Pin Names
Description
CP
Clock Pulse Input (Active Rising Edge)
D
S
0
Serial Data Input for Right Shift
D
S
7
Serial Data Input for Left Shift
S0 S1
Mode Select Inputs
SR
Synchronous Reset Input (Active LOW)
OE1 OE2
TRI-STATE Output Enable Inputs (Active LOW)
I O0 I O7
Parallel Data Inputs or TRI-STATE
Parallel Outputs
Q0 Q7
Serial Outputs
TRI-STATE
is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation
RRD-B30M115 Printed in U S A
Absolute Maximum Ratings
(Note)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
DM54LS
b
55 C to
a
125 C
DM74LS
0 C to
a
70 C
Storage Temperature Range
b
65 C to
a
150 C
Note
The ``Absolute Maximum Ratings'' are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ``Electrical Characteristics''
table are not guaranteed at the absolute maximum ratings
The ``Recommended Operating Conditions'' table will define
the conditions for actual device operation
Recommended Operating Conditions
Symbol
Parameter
DM54LS323
DM74LS323
Units
Min
Nom
Max
Min
Nom
Max
V
CC
Supply Voltage
4 5
5
5 5
4 75
5
5 25
V
V
IH
High Level Input Voltage
2
2
V
V
IL
Low Level Input Voltage
0 7
0 8
V
I
OH
High Level Output Current
b
0 4
b
0 4
mA
I
OL
Low Level Output Current
4
8
mA
T
A
Free Air Operating Temperature
b
55
125
0
70
C
t
s
(H)
Setup Time HIGH or LOW
24
24
ns
t
s
(L)
S0 or S1 to CP
24
24
t
h
(H)
Hold Time HIGH or LOW
5
0
ns
t
h
(L)
S0 or S1 to CP
5
0
t
s
(H)
Setup Time HIGH or LOW
15
10
ns
t
s
(L)
I O
n
D
S
0 D
S
7 to CP
15
10
t
h
(H)
Hold Time HIGH or LOW
5
0
ns
t
h
(L)
I O
n
D
S
0 D
S
7 to CP
5
0
t
s
(H)
Setup Time HIGH or LOW
30
15
ns
t
s
(L)
SR to CP
20
15
t
h
(H)
Hold Time HIGH or LOW
0
0
ns
t
h
(L)
SR to CP
0
0
t
w
(H)
CP Pulse Width HIGH or LOW
15
15
ns
t
w
(L)
15
15
2
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 1)
V
I
Input Clamp Voltage
V
CC
e
Min I
I
e b
18 mA
b
1 5
V
V
OH
High Level Output
V
CC
e
Min I
OH
e
Max
DM54
2 5
V
Voltage
V
IL
e
Max
DM74
2 7
3 4
V
OL
Low Level Output
V
CC
e
Min I
OL
e
Max
DM54
0 4
Voltage
V
IH
e
Min
DM74
0 35
0 5
V
I
OL
e
4 mA V
CC
e
Min
DM74
0 25
0 4
I
I
Input Current
Max
V
CC
e
Max V
I
e
7V
Others
0 1
mA
Input Voltage
V
I
e
10V (DM54)
S
n
Inputs
0 2
mA
I
IH
High Level Input Current
V
CC
e
Max V
I
e
2 7V
Others
20
m
A
S
n
Inputs
40
m
A
I
IL
Low Level Input Current
V
CC
e
Max V
I
e
0 4V
Others
b
0 4
mA
S
n
Inputs
b
0 8
mA
I
OS
Short Circuit
V
CC
e
Max
DM54
b
20
b
100
mA
Output Current
(Note 2)
DM74
b
20
b
100
I
CC
Supply Current
V
CC
e
Max
60
mA
I
OZH
TRI-STATE Output Off
V
CC
e
Max
40
m
A
Current HIGH
V
O
e
2 7V
I
OZL
TRI-STATE Output Off
V
CC
e
Max
b
400
m
A
Current LOW
V
O
e
0 4V
Note 1
All typicals are at V
CC
e
5V T
A
e
25 C
Note 2
Not more than one output should be shorted at a time and the duration should not exceed one second
Switching Characteristics
V
CC
e a
5 0V T
A
e a
25 C
DM54LS323
DM74LS323
Symbol
Parameter
C
L
e
15 pF
R
L
e
2 kX C
L
e
15 pF
Units
Min
Max
Min
Max
f
max
Maximum Input Frequency
35
35
MHz
t
PLH
Propagation Delay
26
23
ns
t
PHL
CP to Q0 or Q7
28
25
t
PLH
Propagation Delay
25
25
ns
t
PHL
CP to I O
n
35
29
t
PZH
Output Enable Time
18
18
ns
t
PZL
C
L
e
50 pF
25
23
t
PHZ
Output Disable Time
15
15
ns
t
PLZ
C
L
e
5 pF
20
15
3
Functional Description
The 'LS323 contains eight edge-triggered D-type flip-flops
and the interstage logic necessary to perform synchronous
reset shift left shift right parallel load and hold operations
The type of operation is determined by S0 and S1 as shown
in the Mode Select Table All flip-flop outputs are brought
out through TRI-STATE buffers to separate I O pins that
also serve as data inputs in the parallel load mode Q0 and
Q7 are also brought out on other pins for expansion in serial
shifting of longer words
A LOW signal on SR overrides the Select inputs and allows
the flip-flops to be reset by the next rising edge of CP All
other state changes are also initiated by the LOW-to-HIGH
CP transition Inputs can change when the clock is in either
state provided only that the recommended setup and hold
times relative to the rising edge of CP are observed
A HIGH signal on either OE1 or OE2 disables the TRI-
STATE buffers and puts the I O pins in the high impedance
state In this condition the shift load hold and reset opera-
tions can still occur The TRI-STATE buffers are also dis-
abled by HIGH signals on both S0 and S1 in preparation for
a parallel load operation
Mode Select Table
Inputs
Response
SR S1 S0
CP
L
X
X
L Synchronous Reset Q0Q7
e
LOW
H
H
H
L Parallel Load I O
n
x
Q
n
H
L
H
L Shift Right DS0
x
Q0 Q0
x
Q1 etc
H
H
L
L Shift Left DS7
x
Q7 Q7
x
Q6 etc
H
H
H
X
Hold
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Logic Symbol
TL F 9829 2
V
CC
e
Pin 20
GND
e
Pin 10
4
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