TL F 6367
DM54LS107ADM74LS107A
Dual
Negative-Edge-Triggered
Master-Slave
J-K
Flip-Flops
with
Clear
and
Complementary
Outputs
June 1989
DM54LS107A DM74LS107A Dual Negative-Edge-
Triggered Master-Slave J-K Flip-Flops with
Clear and Complementary Outputs
General Description
This device contains two independent negative-edge-trig-
gered J-K flip-flops with complementary outputs The J and
K data is processed by the flip-flops on the falling edge of
the clock pulse The clock triggering occurs at a voltage
level and is not directly related to the transition time of the
negative going edge of the clock pulse The data on the J
and K inputs may change while the clock is high or low
without affecting the outputs as long as setup and hold
times are not violated A low logic level on the clear input
will reset the outputs regardless of the logic levels of the
other inputs
Connection Diagram
Dual-In-Line Package
TL F 6367 1
Order Number DM54LS107AJ DM54LS107AW DM74LS107AM or DM74LS107AN
See NS Package Number J14A M14A N14A or W14B
Function Table
Inputs
Outputs
CLR
CLK
J
K
Q
Q
L
X
X
X
L
H
H
v
L
L
Q
0
Q
0
H
v
H
L
H
L
H
v
L
H
L
H
H
v
H
H
Toggle
H
H
X
X
Q
0
Q
0
H
e
High Logic Level
X
e
Either Low or High Logic Level
L
e
Low Logic Level
v
e
Negative going edge of pulse
Q
0
e
The output logic level before the indicated input conditions were established
Toggle
e
Each output changes to the complement of its previous level on each falling edge of the clock pulse
C1995 National Semiconductor Corporation
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings
(Note)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
DM54LS
b
55 C to
a
125 C
DM74LS
0 C to
a
70 C
Storage Temperature Range
b
65 C to
a
150 C
Note
The ``Absolute Maximum Ratings'' are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ``Electrical Characteristics''
table are not guaranteed at the absolute maximum ratings
The ``Recommended Operating Conditions'' table will define
the conditions for actual device operation
Recommended Operating Conditions
Symbol
Parameter
DM54LS107A
DM74LS107A
Units
Min
Nom
Max
Min
Nom
Max
V
CC
Supply Voltage
4 5
5
5 5
4 75
5
5 25
V
V
IH
High Level Input Voltage
2
2
V
V
IL
Low Level Input Voltage
0 7
0 8
V
I
OH
High Level Output Current
b
0 4
b
0 4
mA
I
OL
Low Level Output Current
4
8
mA
f
CLK
Clock Frequency (Note 2)
0
30
0
30
MHz
f
CLK
Clock Frequency (Note 3)
0
25
0
25
MHz
t
W
Pulse Width
Clock High
20
20
ns
(Note 2)
Clear Low
25
25
t
W
Pulse Width
Clock High
25
25
ns
(Note 3)
Clear Low
30
30
t
SU
Setup Time (Notes 1
2)
20
v
20
v
ns
t
SU
Setup Time (Notes 1
3)
25
v
25
v
ns
t
H
Hold Time (Notes 1
2)
0
v
0
v
ns
t
H
Hold Time (Notes 1
3)
5
v
5
v
ns
T
A
Free Air Operating Temperature
b
55
125
0
70
C
Note 1
The symbol (
v
) indicates the falling edge of the clock pulse is used for reference
Note 2
C
L
e
15 pF R
L
e
2 kX T
A
e
25 C and V
CC
e
5V
Note 3
C
L
e
50 pF R
L
e
2 kX T
A
e
25 C and V
CC
e
5V
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 1)
V
I
Input Clamp Voltage
V
CC
e
Min I
I
e b
18 mA
b
1 5
V
V
OH
High Level Output
V
CC
e
Min I
OH
e
Max
DM54
2 5
3 4
V
Voltage
V
IL
e
Max V
IH
e
Min
DM74
2 7
3 4
V
OL
Low Level Output
V
CC
e
Min I
OL
e
Max
DM54
0 25
0 4
Voltage
V
IL
e
Max V
IH
e
Min
DM74
0 35
0 5
V
I
OL
e
4mA V
CC
e
Min
DM74
0 25
0 4
I
I
Input Current
Max
V
CC
e
Max V
I
e
7V
J K
0 1
Input Voltage
Clear
0 3
mA
Clock
0 4
2
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted) (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 1)
I
IH
High Level Input
V
CC
e
Max
J K
20
Current
V
I
e
2 7V
Clear
60
m
A
Clock
80
I
IL
Low Level Input
V
CC
e
Max
J K
b
0 4
Current
V
I
e
0 4V
Clear
b
0 8
mA
Clock
b
0 8
I
OS
Short Circuit
V
CC
e
Max
DM54
b
20
b
100
mA
Output Current
(Note 2)
DM74
b
20
b
100
I
CC
Supply Current
V
CC
e
Max (Note 3)
4
6
mA
Switching Characteristics
at V
CC
e
5V and T
A
e
25 C (See Section 1 for Test Waveforms and Output Load)
From (Input)
R
L
e
2 kX
Symbol
Parameter
To (Output)
C
L
e
15 pF
C
L
e
50 pF
Units
Min
Max
Min
Max
f
MAX
Maximum Clock
30
25
MHz
Frequency
t
PLH
Propagation Delay Time
Preset
20
24
ns
Low to High Level Output
to Q
t
PHL
Propagation Delay Time
Preset
20
28
ns
High to Low Level Output
to Q
t
PLH
Propagation Delay Time
Clear
20
24
ns
Low to High Level Output
to Q
t
PHL
Propagation Delay Time
Clear
20
28
ns
High to Low Level Output
to Q
t
PLH
Propagation Delay Time
Clock to
20
24
ns
Low to High Level Output
Q or Q
t
PHL
Propagation Delay Time
Clock to
20
28
ns
High to Low Level Output
Q or Q
Note 1
All typicals are at V
CC
e
5V T
A
e
25 C
Note 2
Not more than one output should be shorted at a time and the duration should not exceed one second For devices with feedback from the outputs where
shorting the outputs to ground may cause the outputs to change logic state an equivalent test may be performed where V
O
e
2 25V and 2 125V for DM54 and
DM74 series respectively with the minimum and maximum limits reduced by one half from their stated values This is very useful when using automatic test
equipment
Note 3
With all inputs open I
CC
is measured with the Q and Q outputs high in turn At the time of measurement the clock is grounded
3
Physical Dimensions
inches (millimeters)
14-Lead Ceramic Dual-In-Line Package (J)
Order Number DM54LS107AJ
NS Package Number J14A
4
Physical Dimensions
inches (millimeters) (Continued)
14-Lead Small Outline Molded Package (M)
Order Number DM74LS107AM
NS Package Number M14A
14-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS107AN
NS Package Number N14A
5
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