DS34LV86T
3V Enhanced CMOS Quad Differential Line Receiver
General Description
The DS34LV86T is a high speed quad differential CMOS re-
ceiver that meets the requirements of both TIA/EIA-422-B
and ITU-T V.11. The CMOS DS34LV86T features typical low
static I
CC
of 9 mA which makes it ideal for battery powered
and power conscious applications. The TRI-STATE
en-
ables, EN, allow the device to be disabled when not in use to
minimize power consumption. The dual enable scheme al-
lows for flexibility in turning receivers on and off.
The receiver output (RO) is guaranteed to be High when the
inputs are left open. The receiver can detect signals as low
as
200 mV over the common mode range of
10V. The re-
ceiver outputs (RO) are compatible with TTL and LVCMOS
levels.
Features
n
Low power CMOS design (30 mW typical)
n
Interoperable with existing 5V RS-422 networks
n
Industrial temperature range
n
Meets TIA/EIA-422-B (RS-422) and ITU-T V.11
recommendation
n
3.3V Operation
n
7V common mode range V
ID
= 3V
n
10V common mode range V
ID
= 0.2V
n
Receiver OPEN input failsafe feature
n
Guaranteed AC parameter:
Maximum Receiver Skew:
4 ns
Transition time:
10 ns
n
Pin compatible with DS34C86T
n
32 MHz Toggle Frequency
n
6.5k ESD Tolerance (HBM)
n
Available in SOIC packaging
Connection Diagram
Truth Table
Enable
Inputs
Output
EN
RI+RI-
RO
L
X
Z
H
V
ID
+0.2V
H
H
V
ID
-0.2V
L
H
Open
H
L = Logic Low
H = Logic High
X = Irrelevant
Z = TRI-STATE
= Open, Not Terminated
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
Dual-In-Line Package
DS012644-1
Top View
Order Number DS34LV86TN, DS34LV86TM
See NS Package Number M16A or N16E
February 1997
DS34L
V86T
3V
Enhanced
CMOS
Quad
Differential
Line
Receiver
1998 National Semiconductor Corporation
DS012644
www.national.com
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
)
+7V
Enable Input Voltage (EN)
+7V
Receiver Input Voltage
(V
ID
: RI+, RI-)
14V
Receiver Input Voltage
(V
CM
: RI+, RI-)
14V
Receiver Output Voltage (RO)
-0.5V to V
CC
+ 0.5V
Receiver Output Current (RO)
25 mA
Maximum Package Power Dissipation +25C
M Package
1190 mW
N Package
1645 mW
Derate M Package
9.8 mW/C above +25C
Derate N Package
13.9 mW/C above +25C
Storage Temperature Range
65C to +150C
Lead Temperature Range
Soldering (4 Seconds)
+260C
ESD Ratings (HBM, 1.5k, 100 pF)
Receiver Inputs and Enables
6.5 kV
Other Pins
2 kV
Recommended Operating
Conditions
Min
Typ
Max
Units
Supply Voltage (V
CC
)
3.0
3.3
3.6
V
Operating Free Air
Temperature (T
A
)
-40
+25
+85
C
Electrical Characteristics
(Notes 2, 3)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
Pin
Min
Typ
Max
Units
V
TH
Differential Input Threshold
V
OUT
= V
OH
or V
OL
RI+,
RI-
-200
17.5
+200
mV
-7V
<
V
CM
<
+7V
V
HY
Hysteresis
V
CM
= 1.5V
35
mV
V
IH
Minimum High Level Input
Voltage
EN
2.0
V
V
IL
Minimum Low Level Input
Voltage
0.8
V
R
IN
Input Resistance
V
IN
= -7V, +7V
RI+,
RI-
5.0
8.5
k
(Other Input = GND)
I
IN
Input Current
(Other Input = 0V,
Power On or V
CC
= 0V)
V
IN
= +10V
0
1.1
1.8
mA
V
IN
= +3V
0
0.27
mA
V
IN
= 0.5V
-0.02
mA
V
IN
= -3V
0
-0.43
mA
V
IN
= -10V
0
-1.26
-2.2
mA
I
EN
V
IN
= 0V to V
CC
EN
1
A
V
OH
High Level Output Voltage
I
OH
= -6 mA, V
ID
= +1V
RO
2.4
3
V
I
OH
= -6 mA, V
ID
= OPEN
V
OH
High Level Output Voltage
I
OH
= -100 A, V
ID
= +1V
V
CC
- 0.1
V
I
OH
= -100 A, V
ID
= OPEN
V
OL
Low Level Output Voltage
I
OL
= +6 mA, V
ID
= -1V
0.13
0.5
V
I
OZ
Output TRI-STATE
Leakage Current
V
IN
= V
CC
or GND
50
A
EN = V
IL
I
SC
Output Short Circuit Current
V
O
= 0V, V
ID
|200 mV|
-10
-35
-70
mA
(Note 4)
I
CC
Power Supply Current
No Load, All RI+, RI- = Open,
V
CC
9
15
mA
EN = V
CC
or GND
www.national.com
2
Switching Characteristics
(Notes 3, 9, 10)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHL
Propagation Delay High to Low
C
L
= 15 pF
(
Figures 1, 2 )
6
17.5
35
ns
t
PLH
Propagation DeIay Low to High
6
17.8
35
ns
t
r
Rise Time (20% to 80%)
4.1
10
ns
t
f
Fall Time (80% to 20%)
3.3
10
ns
t
PHZ
Disable Time
C
L
= 50 pF
40
ns
t
PLZ
Disable Time
(
Figures 3, 4)
40
ns
t
PZH
Enable Time
40
ns
t
PZL
Enable Time
40
ns
t
SK1
Skew, |t
PHL
- t
PLH
|(Note 5)
C
L
= 15 pF
0.3
4
ns
t
SK2
Skew, Pin to Pin (Note 6)
0.6
4
ns
t
SK3
Skew, Part to Part (Note 7)
7
17
ns
f
MAX
Maximum Operating Frequency
C
L
= 15 pF
32
MHz
(Note 8)
Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of "Electrical Characteristics" specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except V
ID
.
Note 3: All typicals are given for: V
CC
= +3.3V, T
A
= +25C.
Note 4: Short one output at a time to ground. Do not exceed package power dissipation ratings.
Note 5: t
SK1
is the |t
PHL
- t
PLH
| of a channel.
Note 6: t
SK2
is the maximum skew between any two channels within a device, on either edge.
Note 7: t
SK3
is the difference in propagation delay times between any channels of any devices. This specification (maximum limit) applies to devices within V
CC
0.1V of one another,and a Delta T
A
=
5C (between devices) within the operating temperature range. This parameter is guaranteed by design and characterization.
Note 8: All channels switching, output duty cycle criteria is 40%/60% measured at 50% Input = 1V to 2V, 50% Duty Cycle, t
r
/t
f
5 ns. This parameter is guaranteed
by design and characterization.
Parameter Measurement Information
Note 9: Generator waveform for all tests unless otherwise specified: f = 1 MHz, Duty Cycle = 50%, Z
O
= 50
, t
r
10 ns, t
f
10 ns.
Note 10: C
L
includes probe and jig capacitance.
DS012644-2
FIGURE 1. Receiver Propagation Delay and Transition Time Test Circuit (Notes 9, 10)
DS012644-3
FIGURE 2. Receiver Propagation Delay and Transition Time Waveform (Notes 9, 10)
www.national.com
3
Parameter Measurement Information
(Continued)
Typical Application Information
General application guidelines and hints for differential driv-
ers receivers may be found in the following application
notes:
AN-214, AN-457, AN-805, AN-847, AN-903, AN-912, AN-916
Power Decoupling Recommendations: Bypass caps must be
used on power pins. High frequency ceramic (surface mount
is recommended) 0.1 F in paraIIel with 0.01 F at the power
supply pin. A 10 F or greater solid tantalum or electrolytic
should be connected at the power entry point on the printed
circuit board.
DS012644-4
FIGURE 3. Receiver TRI-STATE Test Circuit
DS012644-5
FIGURE 4. Receiver TRI-STATE Output Enable and Disable Waveforms (Notes 9, 10)
www.national.com
4
Typical Application Information
(Continued)
DS012644-6
R
T
is optional although highly recommended to reduce reflection
DS012644-7
FIGURE 5. Typical Receiver Connections
DS012644-8
FIGURE 6. Typical Receiver Output Waveforms
DS012644-9
FIGURE 7. Typical Receiver Input Circuit
www.national.com
5
PDF 
ZIP