LM4992
420mW Stereo Cell Phone Audio Amplifier
General Description
The LM4992 is a stereo audio power amplifier primarily
designed for demanding applications in mobile phones and
other portable communication device applications. It is ca-
pable of delivering 1 watt, per channel, of continuous aver-
age power to an 8
BTL load with less than 1% distortion
(THD+N) from a 5V
DC
power supply.
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. The LM4992 does not require output
coupling capacitors or bootstrap capacitors, and therefore is
ideally suited for mobile phone and other low voltage appli-
cations where minimal power consumption is a primary re-
quirement.
The LM4992 features independent shutdown control for
each channel and a low-power consumption shutdown
mode, which is achieved by driving both shutdown pins with
logic low. Additionally, the LM4992 features an internal ther-
mal shutdown protection mechanism.
The LM4992 contains advanced pop & click circuitry which
eliminates noise which would otherwise occur during turn-on
and turn-off transitions.
The LM4992 is unity-gain stable and can be configured by
external gain-setting resistors.
Key Specifications
j
Improved PSRR at 217Hz & 1KHz
64dB (1KHz)
j
Stereo Output Power at 5.0V,
1% THD, 8
1.07W (typ)
j
Stereo Output Power at 3.3V,
1% THD, 8
420mW (typ)
j
Shutdown Current, V
dd
= 3.3V
0.2A (typ)
Features
n
Available in space-saving LLP package
n
Ultra low current shutdown mode
n
BTL output can drive capacitive loads
n
Improved pop & click circuitry eliminates noise during
turn-on and turn-off transitions
n
2.2 - 5.5V operation
n
No output coupling capacitors, snubber networks or
bootstrap capacitors required
n
Unity-gain stable
n
External gain configuration capability
Applications
n
Mobile Phones
n
PDAs
n
Portable electronic devices
Connection Diagram
SDA14A
200761E6
Top View
Order Number LM4992SD
See NS Package Number SDA14A
Boomer
is a registered trademark of National Semiconductor Corporation.
February 2004
LM4992
420mW
Stereo
Cell
Phone
Audio
Amplifier
2004 National Semiconductor Corporation
DS200761
www.national.com
Typical Application
200761E7
FIGURE 1. Typical Audio Amplifier Application Circuit
LM4992
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2
Absolute Maximum Ratings
(Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (Note 10)
6.0V
Storage Temperature
-65C to +150C
Input Voltage
-0.3V to V
DD
+0.3V
Power Dissipation (Notes 3, 11)
Internally Limited
ESD Susceptibility (Note 4)
2000V
ESD Susceptibility (Note 5)
200V
Junction Temperature
150C
Thermal Resistance
JA
(LLP)
103C/W
Operating Ratings
Temperature Range
T
MIN
T
A
T
MAX
-40C
T
A
85C
Supply Voltage
2.2V
V
DD
5.5V
Electrical Characteristics V
DD
= 5V
(Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for T
A
= 25C.
Symbol
Parameter
Conditions
LM4992
Units
(Limits)
Typical
Limit
(Note 6)
(Notes 7, 8)
I
DD
Quiescent Power Supply Current
V
IN
= 0V, I
o
= 0A, No Load
6
14
mA (max)
V
IN
= 0V, I
o
= 0A, 8
Load
7
18
mA (max)
I
SD
Shutdown Current
V
SD
= V
GND
1.4
3
A (max)
V
SDIH
Shutdown Voltage Input High
1.5
V
V
SDIL
Shutdown Voltage Input Low
1.3
V
V
OS
Output Offset Voltage
7
30
mV (max)
P
o
Output Power
THD = 1% (max); f = 1 kHz, per
channel
1.07
0.9
W (min)
T
WU
Wake-up time
100
ms
THD+N
Total Harmonic Distortion+Noise
P
o
= 0.5 Wrms; f = 1kHz
0.15
%
Xtalk
Crosstalk
80
dB
PSRR
Power Supply Rejection Ratio
V
ripple
= 200mV sine p-p
Input terminated with 10
60 (f =
217Hz)
64 (f = 1kHz)
55
dB (min)
Electrical Characteristics V
DD
= 3.3V
(Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for T
A
= 25C.
Symbol
Parameter
Conditions
LM4992
Units
(Limits)
Typical
Limit
(Note 6)
(Notes 7, 8)
I
DD
Quiescent Power Supply Current
V
IN
= 0V, I
o
= 0A, No Load
4
12
mA (max)
V
IN
= 0V, I
o
= 0A, 8
Load
5
15
mA (max)
I
SD
Shutdown Current
V
SD
= V
GND
0.2
2.0
A (max)
V
SDIH
Shutdown Voltage Input High
1.2
V
V
SDIL
Shutdown Voltage Input Low
1.0
V
V
OS
Output Offset Voltage
7
30
mV (max)
P
o
Output Power
THD = 1% (max); f = 1 kHz, per
channel
420
mW (min)
T
WU
Wake-up time
75
ms
THD+N
Total Harmonic Distortion+Noise
P
o
= 0.25 Wrms; f = 1kHz
0.1
%
Xtalk
Crosstalk
80
dB
PSRR
Power Supply Rejection Ratio
V
ripple
= 200mV sine p-p
Input terminated with 10
65 (f =
217Hz)
70 (f = 1kHz)
55
dB (min)
LM4992
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3
Electrical Characteristics V
DD
= 2.6V
(Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for T
A
= 25C.
Symbol
Parameter
Conditions
LM4992
Units
(Limits)
Typical
Limit
(Note 6)
(Notes 7, 8)
I
DD
Quiescent Power Supply Current
V
IN
= 0V, I
o
= 0A, No Load
4.0
mA (max)
V
IN
= 0V, I
o
= 0A, 8
Load
6.0
mA (max)
I
SD
Shutdown Current
V
SD
= V
GND
0.02
2.0
A (max)
V
SDIH
Shutdown Voltage Input High
1.2
V
V
SDIL
Shutdown Voltage Input Low
1.0
V
V
OS
Output Offset Voltage
5
30
mV (max)
P
o
Output Power
THD = 1% (max); f = 1 kHz, per
channel
240
mW (min)
T
WU
Wake-up time
70
ms
THD+N
Total Harmonic Distortion+Noise
P
o
= 0.15 Wrms; f = 1kHz
0.1
%
Xtalk
Crosstalk
80
dB
PSRR
Power Supply Rejection Ratio
V
ripple
= 200mV sine p-p
Input terminated with 10
51 (f =
217Hz)
51 (f = 1kHz)
dB (min)
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
JMAX
,
JA
, and the ambient temperature T
A
. The maximum
allowable power dissipation is P
DMAX
= (T
JMAX
T
A
)/
JA
or the number given in Absolute Maximum Ratings, whichever is lower.
Note 4: Human body model, 100pF discharged through a 1.5k
resistor.
Note 5: Machine Model, 220pF240pF discharged through all pins.
Note 6: Typicals are measured at 25C and represent the parametric norm.
Note 7: Limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 9: R
OUT
is measured from the output pin to ground. This value represents the parallel combination of the 10k
output resistors and the two 20k resistors.
Note 10: If the product is in Shutdown mode and V
DD
exceeds 6V (to a max of 8V V
DD
), then most of the excess current will flow through the ESD protection circuits.
If the source impedance limits the current to a max of 10mA, then the device will be protected. If the device is enabled when V
DD
is greater than 5.5V and less than
6.5V, no damage will occur, although operation life will be reduced. Operation above 6.5V with no current limit will result in permanent damage.
Note 11: Maximum power dissipation in the device (P
DMAX
) occurs at an output power level significantly below full output power. P
DMAX
can be calculated using
Equation 1 shown in the Application Information section. It may also be obtained from the power dissipation graphs.
LM4992
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4
External Components Description
(Figure 1)
Components
Functional Description
1.
R
i
Inverting input resistance which sets the closed-loop gain in conjunction with R
f
. This resistor also forms a
high pass filter with C
i
at f
C
= 1/(2
R
i
C
i
).
2.
C
i
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a
highpass filter with R
i
at f
c
= 1/(2
R
i
C
i
). Refer to the section, Proper Selection of External Components,
for an explanation of how to determine the value of C
i
.
3.
R
f
Feedback resistance which sets the closed-loop gain in conjunction with R
i
.
4.
C
S
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing
section for information concerning proper placement and selection of the supply bypass capacitor.
5.
C
B
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of C
B
.
Typical Performance Characteristics
THD+N vs Frequency
at V
DD
= 5V, 8
R
L
,
and PWR = 500mW, per channel
THD+N vs Frequency
at V
DD
= 3.3V, 8
R
L
,
and PWR = 250mW, per channel
200761F1
200761F2
THD+N vs Frequency
at V
DD
= 2.6V, 8
R
L
,
and PWR = 150mW, per channel
THD+N vs Power Out
at V
DD
= 5V, 8
R
L
,
1kHz, per channel
200761F3
200761F4
LM4992
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