TL H 11057
LM615
Quad
Comparator
and
Adjustable
Reference
December 1994
LM615 Quad Comparator and Adjustable Reference
General Description
The comparators have an input range which extends to the
negative supply and have open-collector outputs Improved
over the LM139 series the input stages of the comparators
have lateral PNP input transistors which enable low input
currents for large differential input voltages and swings
above V
a
The voltage reference is a three-terminal shunt-type band-
gap and is referred to the V
b
terminal Two resistors pro-
gram the reference from 1 24V to 6 3V with accuracy of
g
0 6% available The reference features operation over a
shunt current range of 17 mA to 20 mA low dynamic imped-
ance broad capacitive load range and cathode terminal
voltage ranging from a diode-drop below V
b
to above V
a
As a member of National's Super-Block
TM
family
the
LM615 is a space-saving monolithic alternative to a multi-
chip solution offering a high level of integration without sac-
rificing performance
Features
COMPARATORS
Y
Low operating current
600 mA
Y
Wide supply voltage range
4V to 36V
Y
Open-collector outputs
Y
Input common-mode range
V
b
to (V
a
b
1 8V)
Y
Wide differential input voltage
g
36V
REFERENCE
Y
Adjustable output voltage
1 24V to 6 3V
Y
Tight initial tolerance available
g
0 6% (25 C)
Y
Wide operating current range
17 mA to 20 mA
Y
Tolerant of load capacitance
Applications
Y
Adjustable threshold detector
Y
Time-delay generator
Y
Voltage window comparator
Y
Power supply monitor
Y
RGB level detector
Connection Diagram
M Package
TL H 11057 24
Top View
N Package
TL H 11057 1
Top View
Ordering Information
For information about surface-mount packaging of this device please contact the
Analog Product Marketing group at National Semiconductor Corp headquarters
Reference
Temperature Range
NSC
Tolerances
Military
Industrial
Package
Package Number
b
55 C
s
T
J
s
a
125 C
b
40 C
s
T
J
s
a
85 C
g
0 6% at 25 C
LM615AMN
LM615AIN
16-Pin
N16A
80 ppm C max
Molded DIP
LM615AMJ 883
16-Pin
J16A
(Note 13)
Ceramic DIP
g
2 0% at 25 C
LM615MN
LM615IN
16-Pin
N16A
150 ppm C max
Molded DIP
LM615IM
16-Pin Narrow
M16A
Surface Mount
Super-Block
TM
is a trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation
RRD-B30M115 Printed in U S A
Absolute Maximum Ratings
(Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Voltage on Any Pin Except V
RO
(referred to V
b
pin)
(Note 2)
36V (Max)
(Note 3)
b
0 3V (Min)
Current through Any Input Pin
and V
RO
Pin
g
20 mA
Differential Input Voltage
g
36V
Output Short-Circuit Duration
(Note 4)
Storage Temperature Range
b
65 C
s
T
J
s
a
150 C
Maximum Junction Temperature
150 C
Thermal Resistance Junction-to-Ambient (Note 5)
N Package
95 C W
Soldering Information
N Package Soldering (10 seconds)
260 C
ESD Tolerance (Note 6)
g
1 kV
Operating Temperature Range
LM615AI LM615I
b
40 C
s
T
J
s
a
85 C
LM615A LM615M
b
55 C
s
T
J
s
a
125 C
Electrical Characteristics
These specifications apply for V
b
e
GND
e
0V V
a
e
5V V
CM
e
V
OUT
e
V
a
2 I
R
e
100 mA FEEDBACK pin shorted to
GND unless otherwise specified Limits in standard typeface are for T
J
e
25 C limits in boldface type apply over the
Operating Temperature Range
LM615AM
LM615M
Symbol
Parameter
Conditions
Typical
LM615AI
LM615I
Units
(Note 7)
Limits
Limits
(Note 8)
(Note 8)
COMPARATORS
I
S
Total Supply Current
V
a
Current R
LOAD
e
%
250
550
600
m
A max
3V
s
V
a
s
36V
350
600
650
m
A max
V
OS
Offset Voltage over
4V
s
V
a s
36V R
L
e
15 kX
1 0
3 0
5 0
mV max
V
a
Range
2 0
6 0
7 0
mV max
V
OS
Offset Voltage over
0V
s
V
CM
s
(V
a
b
1 8V)
1 0
3 0
5 0
mV max
V
CM
Range
V
a
e
30V R
L
e
15 kX
1 5
6 0
7 0
mV max
D
V
OS
D
T
Average Offset
15
m
V C
Voltage Drift
I
B
Input Bias Current
b
5
25
35
nA max
b
8
30
40
nA max
I
OS
Input Offset Current
0 2
4
4
nA max
0 3
5
5
nA max
A
V
Voltage Gain
R
L
e
10 kX to 36V
500
50
50
V mV
2V
s
V
OUT
s
27V
min
100
V mV
t
R
Large Signal
V
a
IN
e
1 4V V
b
IN
e
TTL
1 5
m
s
Response Time
Swing R
L
e
5 1 kX
2 0
m
s
I
SINK
Output Sink Current
V
a
IN
e
0V V
b
IN
e
1V
20
10
10
mA min
V
OUT
e
1 5V
13
8
8
mA min
V
OUT
e
0 4V
2 8
1 0
0 8
mA min
2 4
0 5
0 5
mA min
I
L
Output Leakage
V
a
IN
e
1V V
b
IN
e
0V
0 1
10
10
m
A max
Current
V
OUT
e
36V
0 2
m
A
2
Electrical Characteristics
These specifications apply for V
b
e
GND
e
0V V
a
e
5V V
CM
e
V
OUT
e
V
a
2 I
R
e
100 mA FEEDBACK pin shorted to
GND unless otherwise specified Limits in standard typeface are for T
J
e
25 C limits in boldface type apply over the
Operating Temperature Range
(Continued)
LM615AM
LM615M
Symbol
Parameter
Conditions
Typical
LM615AI
LM615I
Units
(Note 7)
Limits
Limits
(Note 8)
(Note 8)
VOLTAGE REFERENCE
(Note 9)
V
R
Reference
1 244
1 2365
1 2191
V min
Voltage
1 2515
1 2689
V max
(
g
0 6%)
(
g
2%)
D
V
R
D
T
Average Drift
(Note 10)
18
80
150
ppm C
with Temperature
max
D
V
R
kH
Average Drift
T
J
e
40 C
400
ppm kH
with Time
T
J
e
150 C
1000
ppm kH
D
V
R
D
T
J
Hysteresis
(Note 11)
3 2
m
V C
D
V
R
D
I
R
V
R
Change
V
R 100 mA
b
V
R 17 mA
0 05
1
1
mV max
with Current
0 1
1 1
1 1
mV max
V
R 10 mA
b
V
R 100 mA
1 5
5
5
mV max
(Note 12)
2 0
5 5
5 5
mV max
R
Resistance
D
V
R 10 mA to 0 1 mA
9 9 mA
0 2
0 56
0 56
X
max
D
V
R 100 mA to 17 mA
83 mA
0 6
13
13
X
max
D
V
R
D
V
RO
V
R
Change
V
R VRO e VR
b
V
R VRO e 6 3V
2 5
5
5
mV max
with V
RO
2 8
10
10
mV max
D
V
R
D
V
a
V
R
Change
V
R Va e 5V
b
V
R Va e 36V
0 1
1 2
1 2
mV max
with V
a
Change
0 1
1 3
1 3
mV max
V
R Va e 5V
b
V
R Va e 3V
0 01
1
1
mV max
0 01
1 5
1 5
mV max
I
FB
FEEDBACK
V
b s
V
FB
s
5 06V
22
35
50
nA max
Bias Current
29
40
55
nA max
e
n
Voltage Noise
BW
e
10 Hz to 10 kHz
30
m
V
RMS
Note 1
Absolute maximum ratings indicate limits beyond which damage to the component may occur Electrical specifications do not apply when operating the
device beyond its rated operating conditions
Note 2
Input voltage above V
a
is allowed As long as one input pin voltage remains inside the common-mode range the comparator will deliver the correct output
Note 3
More accurately it is excessive current flow with resulting excess heating that limits the voltages on all pins When any pin is pulled a diode drop below
V
b
a parasitic NPN transistor turns ON No latch-up will occur as long as the current through that pin remains below the Maximum Rating Operation is undefined
and unpredictable when any parasitic diode or transistor is conducting
Note 4
Shorting an Output to V
b
will not cause power dissipation so it may be continuous However shorting an Output to any more positive voltage (including
V
a
) will cause 80 mA (typ ) to be drawn through the output transistor This current multiplied by the applied voltage is the power dissipation in the output transistor
If the total power from all shorted outputs causes the junction temperature to exceed 150 C degraded reliability or destruction of the device may occur To
determine junction temperature see Note 5
Note 5
Junction temperature may be calculated using T
J
e
T
A
a
P
D
i
JA
The given thermal resistance is worst-case for packages in sockets in still air For
packages soldered to copper-clad board with dissipation from one comparator or reference output transistor nominal i
JA
is 80 C W for the N package
Note 6
Human body model 100 pF discharge through a 1 5 kX resistor
Note 7
Typical values in standard typeface are for T
J
e
25 C values in boldface type apply for the full operating temperature range These values represent the
most likely parametric norm
Note 8
All limits are guaranteed for T
J
e a
25 C (standard type face) or over the full operating temperature range (bold type face)
Note 9
V
RO
is the reference output voltage which may be set for 1 2V to 6 3V (see Application Information) V
R
is the V
RO
-to-FEEDBACK voltage (nominally
1 244V)
Note 10
Average reference drift is calculated from the measurement of the reference voltage at 25 C and at the temperature extremes The drift in ppm C is
10
6
D
V
R
V
R 25 C
D
T
J
where DV
R
is the lowest value subtracted from the highest V
R 25 C
is the value at 25 C and DT
J
is the temperature range This
parameter is guaranteed by design and sample testing
Note 11
Hysteresis is the change in V
RO
caused by a change in T
J
after the reference has been ``dehysterized '' To dehysterize the reference that is minimize the
hysteresis to the typical value its junction temperature should be cycled in the following pattern spiraling in toward 25 C 25 C 85 C
b
40 C 70 C 0 C 25 C
Note 12
Low contact resistance is required for accurate measurement
Note 13
A military RETS electrical test specification is available on request The LM615AMJ 883 may also be procured as a Standard Military Drawing
3
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