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Электронный компонент: LMD18200-2D/883

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LMD18245
3A, 55V DMOS Full-Bridge Motor Driver
General Description
The LMD18245 full-bridge power amplifier incorporates all
the circuit blocks required to drive and control current in a
brushed type DC motor or one phase of a bipolar stepper
motor. The multi-technology process used to build the device
combines bipolar and CMOS control and protection circuitry
with DMOS power switches on the same monolithic struc-
ture. The LMD18245 controls the motor current via a fixed
off-time chopper technique.
An all DMOS H-bridge power stage delivers continuous out-
put currents up to 3A (6A peak) at supply voltages up to 55V.
The DMOS power switches feature low R
DS(ON)
for high ef-
ficiency, and a diode intrinsic to the DMOS body structure
eliminates the discrete diodes typically required to clamp bi-
polar power stages.
An innovative current sensing method eliminates the power
loss associated with a sense resistor in series with the motor.
A four-bit digital-to-analog converter (DAC) provides a digital
path for controlling the motor current, and, by extension, sim-
plifies implementation of full, half and microstep stepper mo-
tor drives. For higher resolution applications, an external
DAC can be used.
Features
n
DMOS power stage rated at 55V and 3A continuous
n
Low R
DS(ON)
of typically 0.3
per power switch
n
Internal clamp diodes
n
Low-loss current sensing method
n
Digital or analog control of motor current
n
TTL and CMOS compatible inputs
n
Thermal shutdown (outputs off) at T
J
= 155C
n
Overcurrent protection
n
No shoot-through currents
n
15-lead TO-220 molded power package
Applications
n
Full, half and microstep stepper motor drives
n
Stepper motor and brushed DC motor servo drives
n
Automated factory, medical and office equipment
Functional Block and Connection Diagram
(15-Lead TO-220 Molded Power Package (T) )
DS011878-1
Order Number LMD18245T
See NS Package Number TA15A
April 1998
LMD18245
3A,
55V
DMOS
Full-Bridge
Motor
Driver
1998 National Semiconductor Corporation
DS011878
www.national.com
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
DC Voltage at:
OUT 1, V
CC
, and OUT 2
+60V
COMP OUT, RC, M4, M3, M2, M1, BRAKE,
+12V
DIRECTION, CS OUT, and DAC REF
DC Voltage PGND to SGND
400mV
Continuous Load Current
3A
Peak Load Current (Note 2)
6A
Junction Temperature (T
J(max)
)
+150C
Power Dissipation (Note 3) :
TO-220 (T
A
= 25C, Infinite Heatsink)
25W
TO-220 (T
A
= 25C, Free Air)
3.5W
ESD Susceptibility (Note 4)
1500V
Storage Temperature Range (T
S
)
-40C to +150C
Lead Temperature (Soldering, 10 seconds)
300C
Operating Conditions
(Note 1)
Temperature Range (T
J
) (Note 3)
-40C to +125C
Supply Voltage Range (V
CC
)
+12V to +55V
CS OUT Voltage Range
0V to +5V
DAC REF Voltage Range
0V to +5V
MONOSTABLE Pulse Range
10 s to 100 ms
Electrical Characteristics
(Note 2)
The following specifications apply for V
CC
= +42V, unless otherwise stated. Boldface limits apply over the operating tem-
perature range, -40C
T
J
+125C. All other limits apply for T
A
= T
J
= 25C.
Symbol
Parameter
Conditions
Typical
Limit
Units
(Note 5)
(Note 5)
(Limits)
I
CC
Quiescent Supply Current
DAC REF = 0V, V
CC
= +20V
8
mA
15
mA (max)
POWER OUTPUT STAGE
R
DS(ON)
Switch ON Resistance
I
LOAD
= 3A
0.3
0.4
(max)
0.6
(max)
I
LOAD
= 6A
0.3
0.4
(max)
0.6
(max)
V
DIODE
Body Diode Forward Voltage
I
DIODE
= 3A
1.0
V
1.5
V(max)
T
rr
Diode Reverse Recovery Time
I
DIODE
= 1A
80
ns
Q
rr
Diode Reverse Recovery Charge
I
DIODE
= 1A
40
nC
t
D(ON)
Output Turn ON Delay Time
Sourcing Outputs
I
LOAD
= 3A
5
s
Sinking Outputs
I
LOAD
= 3A
900
ns
t
D(OFF)
Output Turn OFF Delay Time
Sourcing Outputs
I
LOAD
= 3A
600
ns
Sinking Outputs
I
LOAD
= 3A
400
ns
t
ON
Output Turn ON Switching Time
Sourcing Outputs
I
LOAD
= 3A
40
s
Sinking Outputs
I
LOAD
= 3A
1
s
t
OFF
Output Turn OFF Switching Time
Sourcing Outputs
I
LOAD
= 3A
200
ns
Sinking Outputs
I
LOAD
= 3A
80
ns
t
pw
Minimum Input Pulse Width
Pins 10 and 11
2
s
t
DB
Minimum Dead Band
(Note 6)
40
ns
CURRENT SENSE AMPLIFIER
Current Sense Output
I
LOAD
= 1A (Note 7)
200
A (min)
250
175
A (min)
300
A (max)
325
A (max)
Current Sense Linearity Error
0.5A
I
LOAD
3A (Note 7)
6
%
9
%(max)
Current Sense Offset
I
LOAD
= 0A
5
A
20
A (max)
www.national.com
2
Electrical Characteristics
(Note 2) (Continued)
The following specifications apply for V
CC
= +42V, unless otherwise stated. Boldface limits apply over the operating tem-
perature range, -40C
T
J
+125C. All other limits apply for T
A
= T
J
= 25C.
Symbol
Parameter
Conditions
Typical
Limit
Units
(Note 5)
(Note 5)
(Limits)
DIGITAL-TO-ANALOG CONVERTER (DAC)
Resolution
4
Bits (min)
Monotonicity
4
Bits (min)
Total Unadjusted Error
0.125
0.25
LSB (max)
0.5
LSB (max)
Propagation Delay
50
ns
I
REF
DAC REF Input Current
DAC REF = +5V
-0.5
A
10
A (max)
COMPARATOR AND MONOSTABLE
Comparator High Output Level
6.27
V
Comparator Low Output Level
88
mV
Comparator Output Current
Source
0.2
mA
Sink
3.2
mA
t
DELAY
Monostable Turn OFF Delay
(Note 8)
1.2
s
2.0
s (max)
PROTECTION AND PACKAGE THERMAL RESISTANCES
Undervoltage Lockout, V
CC
5
V (min)
8
V (max)
T
JSD
Shutdown Temperature, T
J
155
C
Package Thermal Resistances
JC
Junction-to-Case, TO-220
1.5
C/W
JA
Junction-to-Ambient, TO-220
35
C/W
LOGIC INPUTS
V
IL
Low Level Input Voltage
-0.1
V (min)
0.8
V (max)
V
IH
High Level Input Voltage
2
V (min)
12
V (max)
I
IN
Input Current
V
IN
= 0V or 12V
10
A (max)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device
outside the rated Operating Conditions.
Note 2: Unless otherwise stated, load currents are pulses with widths less than 2 ms and duty cycles less than 5%.
Note 3: The maximum allowable power dissipation at any ambient temperature is P
Max
= (125 - T
A
)/
JA
, where 125C is the maximum junction temperature for op-
eration, T
A
is the ambient temperature in C, and
JA
is the junction-to-ambient thermal resistance in C/W. Exceeding P
max
voids the Electrical Specifications by forc-
ing T
J
above 125C. If the junction temperature exceeds 155C, internal circuitry disables the power bridge. When a heatsink is used,
JA
is the sum of the
junction-to-case thermal resistance of the package,
JC
, and the case-to-ambient thermal resistance of the heatsink.
Note 4: ESD rating is based on the human body model of 100 pF discharged through a 1.5 k
resistor. M1, M2, M3 and M4, pins 8, 7, 6 and 4 are protected to 800V.
Note 5: All limits are 100% production tested at 25C. Temperature extreme limits are guaranteed via correlation using accepted SQC (Statistical Quality Control)
methods. All limits are used to calculate AOQL (Average Outgoing Quality Level). Typicals are at T
J
= 25C and represent the most likely parametric norm.
Note 6: Asymmetric turn OFF and ON delay times and switching times ensure a switch turns OFF before the other switch in the same half H-bridge begins to turn
ON (preventing momentary short circuits between the power supply and ground). The transitional period during which both switches are OFF is commonly referred
to as the dead band.
Note 7: (I
LOAD
, I
SENSE
) data points are taken for load currents of 0.5A, 1A, 2A and 3A. The current sense gain is specified as I
SENSE
/I
LOAD
for the 1A data point.
The current sense linearity is specified as the slope of the line between the 0.5A and 1A data points minus the slope of the line between the 2A and 3A data points
all divided by the slope of the line between the 0.5A and 1A data points.
Note 8: Turn OFF delay, t
DELAY
, is defined as the time from the voltage at the output of the current sense amplifier reaching the DAC output voltage to the lower
DMOS switch beginning to turn OFF. With V
CC
= 32V, DIRECTION high, and 200
connected between OUT1 and V
CC
, the voltage at RC is increased from 0V to
5V at 1.2V/s, and t
DELAY
is measured as the time from the voltage at RC reaching 2V to the time the voltage at OUT 1 reaches 3V.
3
www.national.com
Typical Performance Characteristics
RDS(ON) vs Temperature
DS011878-29
RDS(ON) vs Load Current
DS011878-30
RDS(ON) vs
Supply Voltage
DS011878-31
Current Sense Output
vs Load Current
DS011878-32
Supply Current vs
Supply Voltage
DS011878-33
Supply Current vs
Temperature
DS011878-34
www.national.com
4
Connection Diagram
Pinout Descriptions
(See Functional Block
and Connection Diagrams)
Pin 1, OUT 1: Output node of the first half H-bridge.
Pin 2, COMP OUT: Output of the comparator. If the voltage
at CS OUT exceeds that provided by the DAC, the compara-
tor triggers the monostable.
Pin 3, RC: Monostable timing node. A parallel resistorca-
pacitor network connected between this node and ground
sets the monostable timing pulse at about 1.1 RC seconds.
Pin 5, PGND: Ground return node of the power bridge. Bond
wires (internaI) connect PGND to the tab of the TO-220
package.
Pins 4 and 6 through 8, M4 through M1: Digital inputs of
the DAC. These inputs make up a four-bit binary number
with M4 as the most significant bit or MSB. The DAC pro-
vides an analog voltage directly proportional to the binary
number applied at M4 through M1.
Pin 9, V
CC
: Power supply node.
Pin 10, BRAKE: Brake logic input. Pulling the BRAKE input
logic-high activates both sourcing switches of the power
bridge -- effectively shorting the load. See
Table 1. Shorting
the load in this manner forces the load current to recirculate
and decay to zero.
Pin 11, DIRECTION: Direction logic input. The logic level at
this input dictates the direction of current flow in the load.
See
Table 1.
Pin 12, SGND: Ground return node of all signal level circuits.
Pin 13, CS OUT: Output of the current sense amplifier. The
current sense amplifier sources 250 A (typical) per ampere
of total forward current conducted by the upper two switches
of the power bridge.
Pin 14, DAC REF: Voltage reference input of the DAC. The
DAC provides an analog voltage equal to V
DAC REF
x D/16,
where D is the decimal equivalent (015) of the binary num-
ber applied at M4 through M1.
Pin 15, OUT 2: Output node of the second half H-bridge.
TABLE 1. Switch Control Logic Truth Table
BRAKE
DIRECTION
MONO
Active Switches
H
X
X
Source 1, Source 2
L
H
L
Source 2
L
H
H
Source 2, Sink 1
L
L
L
Source 1
L
L
H
Source 1, Sink 2
X = don't care
MONO is the output of the monostable.
Functional Descriptions
TYPICAL OPERATION OF A CHOPPER AMPLIFIER
Chopper amplifiers employ feedback driven switching of a
power bridge to control and limit current in the winding of a
motor (
Figure 1). The bridge consists of four solid state
power switches and four diodes connected in an H configu-
ration. Control circuitry (not shown) monitors the winding
current and compares it to a threshold. While the winding
current remains less than the threshold, a source switch and
a sink switch in opposite halves of the bridge force the sup-
ply voltage across the winding, and the winding current in-
creases rapidly towards V
CC
/R (
Figure 1a and Figure 1d ).
As the winding current surpasses the threshold, the control
circuitry turns OFF the sink switch for a fixed period or
off-time. During the off-time, the source switch and the oppo-
site upper diode short the winding, and the winding current
recirculates and decays slowly towards zero (
Figure 1b and
Figure 1e ). At the end of the off-time, the control circuitry
turns back ON the sink switch, and the winding current again
increases rapidly towards V
CC
/R (
Figure 1a and Figure 1d
again). The above sequence repeats to provide a current
chopping action that limits the winding current to the thresh-
old (
Figure 1g ). Chopping only occurs if the winding current
reaches the threshold. During a change in the direction of
the winding current, the diodes provide a decay path for the
initial winding current (
Figure 1c and Figure 1f ). Since the
bridge shorts the winding for a fixed period, this type of chop-
per amplifier is commonly referred to as a
fixed off-time
chopper.
DS011878-2
Top View
15-Lead TO-220 Molded Power Package
Order Number LMD18245T
See NS Package Number TA15A
5
www.national.com