Document Outline

• LMH1981
  • General Description
  • Features
  • Applications
  • Connection Diagram
    • FIGURE 1. Pinout
  • Pin Descriptions
  • Ordering Information
  • Absolute Maximum Ratings
  • Operating Ratings
  • Electrical Characteristics
  • LMH1981 Test Circuit
    • FIGURE 2. Test Circuit
  • SDTV Vertical Interval Timing (NTSC, PAL SECAM, 480i, 576i)
    • FIGURE 3. NTSC Odd Field Vertical Interval
    • FIGURE 4. NTSC Even Field Vertical Interval
  • EDTV Vertical Interval Timing (480p, 576p)
    • FIGURE 5. 480p Vertical Interval
  • HDTV Vertical Interval Timing (720p)
    • FIGURE 6. 720p Vertical Interval
  • HDTV Vertical Interval Timing (1080i)
    • FIGURE 7. 1080i Field 1 Vertical Interval
    • FIGURE 8. 1080i Field 2 Vertical Interval
  • SD/EDTV Horizontal Interval Timing
    • FIGURE 9. SD/EDTV Horizontal Interval with Bi-level Sync
  • HDTV Horizontal Interval Timing
    • FIGURE 10. HDTV Horizontal Interval with Tri-Level Sync
  • Application Information
    • GENERAL DESCRIPTION
      • Internal Reference Voltage and REXT
      • Automatic Format Detection and Switching
      • Advanced Video Sync Processing
      • Macrovision Compatibility
    • VIDEO INPUT
      • Video Standards Supported
      • Video Input Requirements
    • LOGIC OUTPUTS
      • Sync-Lock Condition for Output Accuracy
      • Composite Sync Output
      • Horizontal Sync Output
      • Vertical Sync Output
      • Burst/Back Porch Timing Output
      • Odd/Even Field Output
      • Video Format Output (Lines-per-Frame Data)
        • FIGURE 11. Video Format Output for Interlaced Format, 1080i Field 1
        • FIGURE 12. Video Format Output for Interlaced Format, 1080i Field 2
        • FIGURE 13. Video Format Output for Progressive Format, 480p
    • PCB LAYOUT CONSIDERATIONS
      • LMH1981 IC Placement
      • Ground Plane
      • Power Supply Pins
      • REXT Resistor
      • Video Input
      • Output Routing
  • Physical Dimensions