LP3933
Lighting Management System for Six White LEDs and
Two RGB or FLASH LEDs
General Description
The LP3933 is a complete lighting management system
designed for portable wireless applications. It contains a
boost DC/DC converter, 4 white-LED drivers to drive the
main LCD panel backlight, 2 white-LED drivers for the sub-
LCD panel and two sets of RGB/FLASH LED drivers.
Both backlight drivers have 8-bit constant current drivers that
are separately adjustable and matched to 0.5% (typ.). The
RGB LED drivers are PWM-driven with programmable color,
intensity and blinking patterns. In addition, they feature a
FLASH function to support picture taking with camera-
enabled cellular phones.
An efficient magnetic boost DC/DC converter provides the
required bias for LEDs, operating from a single Li-Ion bat-
tery. The DC/DC converter output voltage is user program-
mable from 4.1V to 5.3V for adapting to different LED types
and for efficiency optimization. All functions are software
controllable through a SPI interface and 19 internal registers.
Features
n
High Efficiency Programmable 300 mA Magnetic Boost
DC-DC converter
n
2 separately controlled PWM RGB LED drivers with
programmable color, brightness, turn on/off slopes and
blinking patterns
n
FLASH function with up to 6 outputs, each up to 120
mA
n
4 constant current LED drivers with programmable 8-bit
adjustment (0 ... 25 mA/LED)
n
2 constant current LED drivers with programmable 8-bit
adjustment (0 ... 25 mA/LED)
n
Functions software controlled through SPI interface
n
Additional LED on/off and dimming hardware control
n
Programmable low current Standby mode
n
Low voltage digital interface down to 1.8V
n
Space efficient 32-pin thin CSP laminate package
Applications
n
Cellular Phones
n
PDAs
Typical Application
20080505
March 2004
LP3933
Lighting
Management
System
for
Six
White
LEDs
and
T
w
o
RGB
or
FLASH
LEDs
2004 National Semiconductor Corporation
DS200805
www.national.com
Connection Diagrams and Package Mark Information
32-Lead Thin CSP Package, 4.5 x 5.5 x 0.8 mm, 0.5 mm pitch
See NS Package Number SLE32A
20080509
20080507
20080508
Package Mark -- TOP VIEW
Note: The actual physical placement of the package marking will vary from part to part. The package marking "XY" designates
the date code. "UZ" and "TT" are NSC internal codes for die manufacturing and assembly traceability. Both will vary considerably.
Ordering Information
Order Number
Package Marking
Supplied As
LP3933SL
LP3933SL
1000 units, Tape-and-Reel
LP3933SLX
LP3933SL
2500 units, Tape-and-Reel
LP3933
www.national.com
2
Pin Description
Pin #
Name
Type
Description
1
FB
Input
Boost Converter Feedback
2
GND_BOOST
Ground
Power Switch Ground
3
SW
Output
Open Drain, Boost Converter Power Switch
4
V
DD2
Power
Supply Voltage for Internal Digital Circuits
5
GND2
Ground
Ground Return for V
DD2
(Internal Digital)
6
CLED1
Output
Open Drain, CLED1 Output
7
CLED2
Output
Open Drain, CLED2 Output
8
GND_WLED
Ground
Ground for WLED and CLED Drivers
9
WLED1
Output
Open Drain, White LED1 Output
10
WLED2
Output
Open Drain, White LED2 Output
11
WLED3
Output
Open Drain, White LED3 Output
12
WLED4
Output
Open Drain, White LED4 Output
13
RT
Input
Oscillator Resistor
14
V
DD1
Power
Supply Voltage for Internal Analog Circuits
15
GND1
Ground
Ground
16
V
REF
Output
Internal Reference Bypass Capacitor
17
GND3
Ground
Ground
18
NRST
Logic Input
Low Active Reset Input
19
SS
Logic Input
SPI Slave Select
20
SO
Logic Output
SPI Serial Data Output
21
SI
Logic Input
SPI Serial Data Input
22
SCK
Logic Input
SPI Clock
23
PWM_LED
Logic Input
LED Control for On/Off or Dimming Control
24
V
DD_IO
Power
Supply Voltage for Logic IO Signals
25
GND4
Ground
Ground
26
B2
Output
Open Drain Output, Blue LED 2
27
G2
Output
Open Drain Output, Green LED 2
28
R2
Output
Open Drain Output, Red LED 2
29
GND_RGB
Ground
RGB Driver Ground
30
R1
Output
Open Drain Output, Red LED 1
31
G1
Output
Open Drain Output, Green LED 1
32
B1
Output
Open Drain Output, Blue LED 1
LP3933
www.national.com
3
Absolute Maximum Ratings
(Notes 1,
2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V (SW, FB, WLED1-4, CLED1-2,
R1-2, G1-2, B1-2) pins:
Voltage to GND (Notes 3, 4)
-0.3V to +7.2V
V
DD1
, V
DD2
, V
DD_IO
-0.3V to +6.0V
Voltage on Logic Pins
-0.3V to V
DD_IO
+
0.3V, with 6.0V max
I (R1, G1, B1, R2, G2, B2)
(Note 5)
150 mA
I (V
REF
)
10 A
Continuous Power Dissipation
(Note 6)
Internally Limited
Junction Temperature (T
J-MAX
)
125C
Storage Temperature Range
-65C to +150C
Maximum Lead Temperature
(Reflow soldering, 3 times)
(Note 7)
260C
ESD Rating (Notes 8, 14)
Human Body Model:
2 kV
Machine Model:
200V
Operating Ratings
(Notes 1, 2)
V (SW, FB, WLED1-4, CLED1-2,
R1-2, G1-2, B1-2)
3.0V to 6.0V
V
DD1
, V
DD2
(Note 4)
2.65 to 2.9V
V
DD_IO
1.8V to V
DD1,2
Recommended Load Current
0 mA to 300 mA
Junction Temperature (T
J
) Range
-40C to +125C
Ambient Temperature (T
A
) Range
(Note 9)
-40C to +85C
Thermal Properties
Junction-to-Ambient Thermal Resistance (
JA
),
SLE32A Package (Note 10)
72C/W
Electrical Characteristics
(Notes 2, 11)
Limits in standard typeface are for T
J
= 25C. Limits in boldface type apply over the operating ambient temperature range
(-40C
T
A
+85C). Unless otherwise noted, specifications apply to the LP3933 Functional Block Diagram (pg. 5) with: V
DD1
= V
DD2
= 2.775V, C
VDD1
= C
VDD2
= C
VDDIO
= 0.1 F, C
OUT
= C
IN
= 10 F, C
VREF
= 0.1 F, L
1
= 10 H (Note 12).
Symbol
Parameter
Condition
Min
Typ
Max
Units
I
DD
Standby Supply Current
(V
DD1
and V
DD2
current)
NSTBY = L (register)
SCK, SS, SI, NRST = H
1
5
A
No-Load Supply Current
(V
DD1
and V
DD2
current, boost off)
NSTBY = H (reg.)
EN_BOOST = L (reg.)
SCK, SS, SI, NRST = H
170
300
A
Full Load Supply Current
(V
DD1
and V
DD2
current, boost on)
NSTBY = H (reg.)
EN_BOOST = H (reg.)
SCK, SS, SI, NRST = H
All Outputs Active
1
mA
I
DD_IO
V
DD_IO
Standby Supply Current
NSTBY = L (register)
SCK, SS, SI, NRST = H
1
5
A
V
DD_IO
Operating Supply Current
1 MHz Clock Frequency
C
L
= 50 pF at SO pin
20
A
V
REF
Reference Voltage (Note 13)
I(V
REF
)
1 nA,
Test Purposes Only
1.205
-2
1.23
1.255
+2
V
%
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pins (GND1-4, GND_BOOST, GND_WLED, GND_RGB).
Note 3: Battery/Charger voltage should be above 6V no more than 10% of the operational lifetime.
Note 4: Voltage tolerance of LP3933 above 6.0V relies on fact that V
DD1
and V
DD2
(2.775V) are available (ON) at all conditions. If V
DD1
and V
DD2
are not available
(ON) at all conditions, National Semiconductor does not guarantee any parameters or reliability for this device.
Note 5: The total load current of the boost converter should be limited to 300 mA.
Note 6: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T
J
= 160C (typ.) and disengages at T
J
=
140C (typ.).
Note 7: For detailed soldering specifications and information, please refer to National Semiconductor Application Note 1125: Laminate CSP/FBGA.
Note 8: The Human body model is a 100 pF capacitor discharged through a 1.5 k
resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin. MIL-STD-883 3015.7
LP3933
www.national.com
4
Electrical Characteristics
(Notes 2, 11) (Continued)
Note 9: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T
A-MAX
) is dependent on the maximum operating junction temperature (T
J-MAX-OP
= 125C), the maximum power
dissipation of the device in the application (P
D-MAX
), and the junction-to ambient thermal resistance of the part/package in the application (
JA
), as given by the
following equation: T
A-MAX
= T
J-MAX-OP
- (
JA
x P
D-MAX
).
Note 10: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues in board design.
Note 11: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 12: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) are used in setting electrical characteristics.
Note 13: V
REF
pin (Bandgap reference output) is for internal use only. A capacitor should always be placed between V
REF
and GND1.
Note 14: ESD susceptibility for pin 11 and 12 is 500V for the human body model and 150V for the machine model.
Block Diagram
20080503
LP3933
www.national.com
5