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Электронный компонент: NTE3093

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NTE3093
Optoisolator
NPN Split Darlington Output
Description:
The NTE3093 coupler uses a light emitting diode (LED) and an integrated high gain photon detector
to provide 3000V DC electrical insulation, 500V/
s common mode transient immunity and extremely
high current transfer ratio between inut and output. Separate pins for the photodiode and output stage
result in TTL compatible saturation voltages and high speed operation. Where desired, the V
CC
and
V
O
terminals may be tied together to achieve conventional photodarlington operation. A base access
terminal allows a gain bandwidth adjustment to be made.
Features:
D
High Current Transfer Ratio
D
Low Input Current Requirement
D
TTL Compatible Output
D
3000V DC Withstand Test Voltage
D
High Common Mode Rejection
D
Base Access Allows Gain Bandwidth Adjustment
D
High Output Current
D
DC to 1Mbit/s Operation
Absolute Maximum Ratings: (T
A
= +25
C unless otherwise specified)
Input Diode
Reverse Voltage, V
R
5V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak Current (50% Duty Cycle,1ms Pulse Width), I
F
40mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak Transient Current (
1
s Pulse Width, 300pps), I
F
20mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation, P
D
35mW
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derate Linearly Above 50
C
0.7mW/
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Transistor
Current (Pin6), I
O
60mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derate Linearly Above 25
C
0.7mA/
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EmitterBase Reverse Voltage (Pin57)
0.5V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply Voltage (Pin85), V
CC
0.5 to 18V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage (Pin65), V
O
0.5 to 18V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation, P
D
35mW
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derate Linearly Above 50
C
0.7mW/
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total Device
Operating Temperature Range, T
opr
0
to +70
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature Range, T
stg
55
to +125
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (During Soldering, 1.6mm below seating plane, 10sec Max), T
L
+260
C
. . . . . .
Note 1. The small junction sizes inherent to the design of this bipolar component increases the
component's susceptibility to damage from electrostatic discharge (ESD). It is advised
that normal static precautions be taken in handling and assembly of this component to pre-
vent damage and/or degredation which may be induced by ESD.
Electrical Characteristics: (T
A
= 0
to +70
C, Note 2 unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Current Transfer Ratio
CTR
I
F
= 0.5mA, V
O
= 0.4V, V
CC
= 4.5V, Note 3, Note 4
400
800
%
I
F
= 1.6mA, V
O
= 0.4V, V
CC
= 4.5V, Note 3, Note 4
500
900
%
Logic Low Output Voltage
V
OL
I
F
= 1.6mA, I
O
= 6.4mA, V
CC
= 4.5V, Note 4
0.1
0.4
V
I
F
= 5mA, I
O
= 15mA, V
CC
= 4.5V, Note 4
0.1
0.4
V
I
F
= 12mA, I
O
= 24mA, V
CC
= 4.5V, Note 4
0.2
0.4
V
Logic High Output Current
I
OH
I
F
= 0, V
O
= V
CC
= 18V, Note 4
0.05
100
A
Logic Low Supply Current
I
CCL
I
F
= 1.6mA, V
O
= Open, V
CC
= 5V, Note 4
0.2
mA
Logic High Supply Current
I
CCH
I
F
= 0mA, V
O
= Open, V
CC
= 5V, Note 4
10
nA
Input Forward Voltage
V
F
I
F
= 1.6mA, T
A
= +25
C
1.4
1.7
V
Input Reverse Breakdown
Voltage
V
(BR)R
I
F
= 10
A, T
A
= +25
C
5
V
Temperature Coefficient
of Forward Voltage
T
A
V
F
I
F
= 1.6mA
1.8
mV/
C
Input Capacitance
C
IN
f = 1MHz, V
F
= 0
60
pF
InputOutput Insulation
Leakage Currnt
I
IO
45% Relative Humidity, T
A
= +25
C, t = 5s,
V
IO
= 3KVdc, Note 5
1.0
A
Resistance
R
IO
V
IO
= 500Vdc, Note 5
10
11
Capacitance
C
IO
f = 1MHz, Note 5
0.6
pF
Note 2. All typicals at T
A
= +25
C, V
CC
= 5V unless otherwise specified.
Note 3. DC Current Transfer Ratio is defined as the ratio of output collector current (I
O
) to the forward
LED input current (I
F
) times 100%.
Note 4. Pin7 Open.
Note 5. Device considered a twoterminal device (Pins 1, 2, 3 and 4 shorted together and Pins 5,
6, 7 and 8 shorted together).
Switching Characteristics: (T
A
= +25
C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Propagation Delay Time
t
PHL
I
F
= 0.5mA, R
L
= 4.7k
, Note 3, Note 6
5
25
s
I
F
= 12mA, R
L
= 270
, Note 3, Note 6
0.2
1.0
s
t
PLH
I
F
= 0.5mA, R
L
= 4.7k
, Note 3, Note 6
5
60
s
I
F
= 12mA, R
L
= 270
, Note 3, Note 6
1
7
s
Common Mode Transient Immunity
CM
H
I
F
= 0, R
L
= 2.2k
, R
CC
= 0,
|V
CM
| = 10V
PP
, Note 7, Note 8
500
V/
s
CM
L
I
F
= 1.6mA, R
L
= 2.2k
, R
CC
= 0,
|V
CM
| = 10V
PP
, Note 7, Note 8
500
V/
s
Note 3. DC Current Transfer Ratio is defined as the ratio of output collector current (I
O
) to the forward
LED input current (I
F
) times 100%.
Note 6. Use of a resistor between Pin5 and Pin7 will decrease gain abd delay time.
Note 7. Common mode transient immunity in Logic High level is the maximum tolerable (positive)
dv cm/dt on the leading edge of the common mode pulse (V
CM
) to assure that the output will
remain in a Logic High state (i.e. V
O
2.0V). Common mode transient immunity in Logic Low
level is the maximum tolerable (negative) dc cm/dt on the trailing edge of the common mode
pulse signal (V
CM
) to assure that the output will remain in a Logic Low state (i.e. V
O
0.8V).
Note 8. In applications where dV/dt may exceed 50,000V/
s (such as static discharge) a series re-
sistor (R
CC
) should be included to protect the detector IC from destructively high surge cur-
rents. The recommended value is:
R
CC
=
1V
0.15 I
F
(mA)
k
V
CC
V
B
V
O
Pin Connection Diagram
GND
1
2
N.C.
Anode
3
Cathode
4
N.C.
8
7
6
5
.390 (9.9) Max
.250 (6.35)
Seating
Plane
1
4
8
5
.185
(4.7)
Max
.115 (2.94) Min
.100 (2.54)
.020 (.508) Min