Semiconductor
ML2500
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FEDL2500-01
Semiconductor
ML2500
Analog-Storage Single-chip Record/Playback LSI with 1M Bit-Cell Flash Memory
This document contains minimum specifications. For full specifications, please contact your
nearest Oki office or representative.
GENERAL DESCRIPTION
Thanks to newly developed Analog Multi-Level Storage technology, ML2500 stores non-
compressed analog source signal directly into on-chip 1M Bit-Cell Flash memory. The result is
superb sound quality without noise and distortions introduced through coding/decoding, and
impressive long-time record/playback capability up to 256 sec. ML2500 is fully controllable by
an external MCU via the industry's standard Serial Peripheral Interface.
In addition, no backup requirement and low operating voltage (2.7 to 3.3 V) make the LSI an ideal
choice for compact, handy and portable terminals. ML2500 is a true shingle-chip solution to
record/playback subsystem for use with today's size-critical electronic products.
FEATURES
On-chip non-volatile 1M bit-cell Flash memory
Program/Erase Cycles
: 10,000 cycles
Data Retention
: 10 years
MCU Interface
Serial Peripheral Interface (SPI; Mode 0)
Record/Playback Time Length (With the int. Osc. or ext. clock at 8.192 MHz)
ap. 160 sec (At fsam = 6.4 kHz)
ap. 190 sec (At fsam = 5.3 kHz)
ap. 256 sec (At fsam = 4.0 kHz)
Selectable Sampling Frequencies
4.0 kHz, 5.3 kHz, 6.4 kHz
Maximum number of recording phrases: 320 phrases
Phrase Control
Fully controllable with user-definable Start, Stop addresses
Built-in LPF/Smoothing Filter (LPF attenuation 40dB/oct)
Built-in Oscillation Circuit (8.192 MHz), No oscillator required
Optional external clock input (Clock Frequency 4.0 MHz to 8.192 MHz)
Power Supply
: 2.7 to 3.3 V
Operating Temperature:
10 to +70
C (guaranteed for both function and voice quality)
40 to +85
C (guaranteed for function only) *Notice
*Notice
The voice quality can deteriorate at temperatures beyond the range of 10 to +70
C.
DC and AC characteristics in this data sheet are specified for 10 to +70
C operating
temperature range.
Package:
32-pin Plastic TSOP (TSOPI32-P-814-0.50-1K) (Product name: ML2500TA)
FEDL2500-01
This version: Jul. 2000
Previous version: Jun. 1999
Semiconductor
ML2500
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FEDL2500-01
BLOCK DIAGRAM
PIN CONFIGURATION (TOP VIEW)
NC: No connection. Keep NC pins open.
32-Pin Plastic TSOP (Type
1
1
1
1
1)
LOUT
LIN
ROSC
EXTCLK
AV
DD
AOUT
AGND
RESET
SG
SG
Analog Write & Read Circuits
1M Bit Cell
Analog Storage Flash
Memory Array
Address Decoder
MUX
Serial Peripheral Interface & Controller
CS
SCK
DI
DO
MON
DV
DD
DGND
TEST1
LPF
Internal
Oscillator
Power
Supplies
DV
DD
1
32 AV
DD
RESET 2
31 LIN
CS 3
30 LOUT
SCK 4
29 TEST2
DI 5
28 TEST2
DO 6
27 AOUT
MON 7
26 SG
EXTCLK 8
25 NC
NC 9
24 TEST1
NC 10
23 NC
TEST2 11
22 TEST2
NC 12
21 NC
ROSC 15
18 TEST2
DGND 16
17 AGND
TEST2 13
20 TEST2
NC 14
19 NC
Semiconductor
ML2500
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FEDL2500-01
PIN DESCRIPTIONS
Symbol
Type
Description
DI
I
Serial input pin for command data.
CS
I
Chip select pin. "L" level input enables data input/output through the serial
interface.
RESET
I
RESET input pin, resetting the serial interface circuit only. "L" level input to
this pin initializes the serial interface. Must input "L" pulse after each power-on.
ROSC
I
Insert a 30 kW resistor (Precision within 1%) between this pin and the DGND pin.
The same resistor should also be inserted if an external clock is used.
The resistor value determines the frequency of the clock for control in this device.
SG
O
Analog reference voltage (Signal Ground Voltage) output pin. It is
recommendable to insert a capacitor smaller than 3300 pF between this pin and
the AGND pin. Loads except for capacitors should not be connected to this pin.
LIN
I
Inverting input pin for the internal OP amplifier. Non-inverting input pin is
internally connected to SG voltage.
MON
O
Output "H" level during recording/playback operation.
TEST1
I
LSI's testing pin. Must be connected to DGND.
Pin
5
3
2
15
26
31
7
24
DO
O
Serial output pin for status data.
6
SCK
I
Shift clock input pin for the DI and the DO pins.
4
EXTCLK
I
External clock input pin. Allowable clock frequency range is 4.0 MHz to 8.192
MHz. When external clock is unused and internal oscillation clock in used,
connect this pin to the DGND.
8
LOUT
O
Output pin from the internal OP amplifier.
30
AOUT
O
Analog waveform output. Connect to an amplifier to drive a SP.
27
TEST2
O
Pins for testing the LSI. Must be held "OPEN".
11, 13, 18,
20, 22, 28, 29
DV
DD
--
Digital power supply pin. Insert a 0.1 mF or larger by-pass capacitor between
this pin and the DGND pin .
1
DGND
--
Digital Ground pin.
16
AV
DD
--
Analog power supply pin. Insert a 0.1 mF or larger by-pass capacitor between
this pin and the AGND pin.
32
AGND
--
Analog Ground pin.
17
Semiconductor
ML2500
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FEDL2500-01
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
ELECTRICAL CHARACTERISTICS
DC Characteristics
Parameter
Symbol
Condition
Rating
Unit
Power Supply Voltage
V
DD
Ta = 25C
0.3 to +5.0
V
Input Voltage
V
IN
0.3 to V
DD
+0.3
V
Storage Temperature
T
STG
--
55 to +150
C
Parameter
Symbol
Condition
Range
Unit
Power Supply Voltage
V
DD
DGND = AGND = 0V
2.7 to 3.3
V
Operating Temperature
T
op
--
10 to +70
C
External Clock Frequency 2
f
EXTCLK2
--
8.192
MHz
*1
External Clock Frequency 1
f
EXTCLK1
--
4.096
MHz
*1
Typ.
Min.
Max.
3.85
4.34
7.70
8.68
Parameter
Symbol
Condition
Typ.
Unit
"H" Input Voltage
V
IH
DGND = AGND = 0V
--
V
"L" Input Voltage
V
IL
--
--
V
*2
Min.
0.8 V
DD
--
Max.
--
0.2 V
DD
"H" Output Voltage
V
OH
I
OH
= 40mA
--
V
"L" Output Voltage
V
OL
I
OL
= 2mA
--
V
V
DD
0.3
--
--
0.45
*1
*1
*2
"H" Input Current
I
IH
V
IH
= V
DD
--
mA
"L" Input Current
I
IL
V
IL
= 0V
--
mA
10
10
--
Operating Current Consumption 1
I
DD1
In Recording Operation
30
mA
--
45
*1
*1
--
Operating Current Consumption 2
I
DD2
In Playback Operation
20
mA
--
30
Operating Current Consumption 3
I
DD3
In Command-Wait State
5
mA
--
10
Powerdown Current Consumption
I
DDS
--
--
mA
--
10
DV
DD
= AV
DD
= 2.7 V to 3.3 V, DGND = AGND = 0 V, Ta = 10 to +70C
*1: Applied to logic input pins (DI, SCK, CS, RESET and EXTCLK) except ROSC and TEST1 pins.
*2: Applied to logic output pins (DO and MON) except TEST2 pin.
*1: Applicable only with external clock
Semiconductor
ML2500
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FEDL2500-01
APPLICATION CIRCUITS
DV
DD
0.1mF
0.1mF
Power Supply (+3V)
AV
DD
RESET
CS
DI
DO
SCK
MON
MCU
MSC1157
AOUT
170K
W
51pF
LOUT
LIN
0.47mF
30KW
30KW
ROSC
DGND
SG
AGND
3300pF
TEST1
EXCLK
LINE IN
ML2500TA
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