OKI Semiconductor
FEDR27V12850J-02-03
Issue Date: Jul. 9, 2004
MR27V12850J
8MWord
16Bit or 16MWord 8Bit Page mode
P2ROM
1/8
FEATURES
8,388,608-word
16-bit/16,777,216-word 8-bit electrically
switchable configuration
Page size of 8-word x 16-Bit or 16-word x 8-Bit
3.0 V to 3.6 V power supply
Access time 100 ns MAX
Page Access time 25 ns MAX
Operating current
50 mA MAX(5MHz)
Standby current
10 A MAX
Input/Output TTL compatible
Three-state output
PACKAGES
MR27V12850J-xxxTN
48-pin plastic TSOP (TSOP I 48-P-1220-0.50-1K)
P2ROM ADVANCED TECHNOLOGY
P2ROM stands for Production Programmed ROM. This
exclusive Oki technology utilizes factory test equipment for
programming the customers code into the P2ROM prior to final
production testing. Advancements in this technology allows
production costs to be equivalent to MASKROM and has many
advantages and added benefits over the other non-volatile
technologies, which include the following;
Short lead time
, since the P2ROM is programmed at the
final stage of the production process, a large P2ROM
inventory "bank system" of un-programmed packaged
products are maintained to provide an aggressive lead-time
and minimize liability as a custom product.
No mask charge
, since P2ROMs do not utilize a custom
mask for storing customer code, no mask charges apply.
No additional programming charge,
unlike Flash and
OTP that require additional programming and handling
costs, the P2ROM already has the code loaded at the
factory with minimal effect on the production throughput.
The cost is included in the unit price.
Custom Marking is
available at no additional charge.
Pin Compatible with Mask ROM
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
BYTE#
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
A21
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48TSOP(Type-I)
PIN CONFIGURATION (TOP VIEW)
Vss
Vss
D15/A1
D7
D14
D6
D13
D5
D12
D4
V
CC
V
CC
A22
D11
D3
D10
D2
D9
D1
D8
D0
OE #
Vss
Vss
FEDR27V12850J-02-03
OKI Semiconductor
MR27V12850J / P2ROM
2/8
BLOCK DIAGRAM
PIN DESCRIPTIONS
Pin name
Functions
D15 / A1
Data output / Address input
A0 to A22
Address inputs
D0 to D14
Data outputs
CE#
Chip enable input
OE#
Output enable input
BYTE#
Word / Byte select input
V
CC
Power supply voltage
V
SS
Ground
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
CE# BYTE#
OE#
CE OE
8/ 16 Switch
D0 D2 D4 D6 D8 D10 D12 D14
D1 D3 D5 D7 D9 D11 D13 D15
Memory Cell Matrix
8M 16-Bit or 16M 8-Bit
Multiplexer
Output Buffer
Ro
w
Dec
o
d
e
r
Colum
n
Deco
d
e
r
Address Buffer
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
A1
FEDR27V12850J-02-03
OKI Semiconductor
MR27V12850J / P2ROM
3/8
FUNCTION TABLE
Mode
CE#
OE#
BYTE#
V
CC
D0 to D7
D8 to D14
D15/A1
Read (16-Bit)
L
L
H
D
OUT
Read (8-Bit)
L
L
L
D
OUT
HiZ L/H
H
Output disable
L
H
L
HiZ
H
Standby H
L
3.0 V
to
3.6 V
HiZ
: Don't Care (H or L)
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Condition
Value
Unit
Operating temperature under bias
Ta
0 to 70
C
Storage temperature
Tstg
--
55 to 125
C
Input voltage
V
I
0.5 to V
CC
+0.5 V
Output voltage
V
O
0.5 to V
CC
+0.5 V
Power supply voltage
V
CC
relative to V
SS
0.5 to 5
V
Power dissipation per package
P
D
Ta
=
25C
1.0
W
Output short circuit current
I
OS
--
10 mA
RECOMMENDED OPERATING CONDITIONS
(Ta = 0 to 70C)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
V
CC
power supply voltage
V
CC
3.0
--
3.6
V
Input "H" level
V
IH
2.2
--
V
CC
+0.5
V
Input "L" level
V
IL
V
CC
= 3.0 to 3.6 V
0.5
-- 0.6 V
Voltage is relative to V
SS
.
: Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns.
: -1.5V(Min.) when pulse width of undershoot is less than 10ns.
PIN CAPACITANCE
(V
CC
= 3.0 V, Ta = 25C, f = 1 MHz)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Input C
IN1
--
--
8
BYTE# C
IN2
V
I
= 0 V
-- -- 200
Output C
OUT
V
O
= 0 V
--
--
10
pF
FEDR27V12850J-02-03
OKI Semiconductor
MR27V12850J / P2ROM
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ELECTRICAL CHARACTERISTICS
DC Characteristics
(V
CC
= 3.0 to 3.6 V, Ta = 0 to 70C)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Input leakage current
I
LI
V
I
= 0 to V
CC
--
--
5
A
Output leakage current
I
LO
V
O
= 0 to V
CC
--
--
5
A
I
CCSC
CE# = V
CC
--
--
10
A
V
CC
power supply current
(Standby)
I
CCST
CE# = V
IH
--
--
1
mA
V
CC
power supply current
(Read)
I
CCA
CE# = V
IL
, OE# = V
IH
f=5MHz
-- -- 50 mA
Input "H" level
V
IH
-- 2.2
--
V
CC
+0.5
V
Input "L" level
V
IL
--
0.5
-- 0.6 V
Output "H" level
V
OH
I
OH
= 1 mA
2.4
--
--
V
Output "L" level
V
OL
I
OL
= 2 mA
--
--
0.4
V
Voltage is relative to V
SS
.
: Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns.
: -1.5V(Min.) when pulse width of undershoot is less than 10ns.
AC Characteristics
(V
CC
= 3.0 to 3.6 V, Ta = 0 to 70C)
Parameter
Symbol
Condition
Min.
Max.
Unit
Address cycle time
t
C
-- 100 --
ns
Address access time
t
ACC
CE# = OE# = V
IL
--
100 ns
Page cycle time
t
PC
--
25 --
ns
Page access time
t
PAC
--
-- 25 ns
CE# access time
t
CE
OE# = V
IL
-- 100
ns
OE# access time
t
OE
CE# = V
IL
-- 30 ns
t
CHZ
OE# = V
IL
0 20
ns
Output disable time
t
OHZ
CE# = V
IL
0 20
ns
Output hold time
t
OH
CE# = OE# = V
IL
0
-- ns
Measurement conditions
Input
signal
level --------------------------------------0 V/3 V
Input timing reference level-------------------------1/2Vcc
Output load ---------------------------------------------50 pF
Output timing reference level
-------------------
1/2Vcc
Output load
Output
50 pF
(Including scope and jig)
FEDR27V12850J-02-03
OKI Semiconductor
MR27V12850J / P2ROM
5/8
TIMING CHART (READ CYCLE)
RANDOM ACCESS MODE READ CYCLE
CE#
OE#
D0 to D15(Word mode)
t
C
t
CE
t
OE
t
OH
t
CHZ
t
OHZ
Valid Data
Hi-Z
Hi-Z
t
OH
Valid Data
t
ACC
t
C
t
ACC
A-1 to A22 (Byte mode)
A0 to A22 (Word mode)
D0 to D7(Byte mode)
D8 to D15 : Hi-Z(Byte mode)
PAGE ACCESS MODE READ CYCLE
A3 to A21
t
C
t
CE
t
OE
t
ACC
t
OH
t
CHZ
t
OHZ
Hi-Z
Hi-Z
D0 to D7(Byte mode)
t
PAC
A-1 to A2 (Byte mode)
t
PC
t
PC
t
PAC
A0 to A2 (Word mode)
CE#
OE#
D0 to D15(Word mode)
D8 to D15 : Hi-Z(Byte mode)
FEDR27V12850J-02-03
OKI Semiconductor
MR27V12850J / P2ROM
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TSOP(1)48-P-1220-0.50-1K
Mirror finish
Package material
Epoxy resin
Lead frame material
42 alloy
Pin treatment
Solder plating (
5m)
Package weight (g)
0.55 TYP.
5
Rev. No./Last Revised
1/Dec. 2, 1999
Notes for Mounting the Surface Mount Type Package
The surface mount type packages are very susceptible to heat in reflow mounting and humidity
absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product
name, package name, pin number, package code and desired mounting conditions (reflow method,
temperature and times).
(Unit: mm)
FEDR27V12850J-02-03
OKI Semiconductor
MR27V12850J / P2ROM
7/8
REVISION HISTORY
Page
Document
No.
Date
Previous
Edition
Current
Edition
Description
FEDR27V12850J-02-01
Dec., 2002
Final edition 1
FEDR27V12850J-02-02
Jun. 4, 2003
1
1
Change 48TSOP(1) package code to 1K
FEDR27V12850J-02-03
Jul. 9, 2004
3
3
Add P
D
condition and I
OS
= 10mA
FEDR27V12850J-02-03
OKI Semiconductor
MR27V12850J / P2ROM
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NOTICE
1. The information contained herein can change without notice owing to product and/or technical improvements.
Before using the product, please make sure that the information being referred to is up-to-date.
2. The outline of action and examples for application circuits described herein have been chosen as an
explanation for the standard action and performance of the product. When planning to use the product, please
ensure that the external conditions are reflected in the actual circuit, assembly, and program designs.
3. When designing your product, please use our product below the specified maximum ratings and within the
specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating
temperature.
4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation
resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or
unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified
maximum ratings or operation outside the specified operating range.
5. Neither indemnity against nor license of a third party's industrial and intellectual property right, etc. is
granted by us in connection with the use of the product and/or the information and drawings contained herein.
No responsibility is assumed by us for any infringement of a third party's right which may result from the use
thereof.
6. The products listed in this document are intended for use in general electronics equipment for commercial
applications (e.g., office automation, communication equipment, measurement equipment, consumer
electronics, etc.). These products are not, unless specifically authorized by Oki, authorized for use in any
system or application that requires special or enhanced quality and reliability characteristics nor in any
system or application where the failure of such system or application may result in the loss or damage of
property, or death or injury to humans.
Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace
equipment, nuclear power control, medical equipment, and life-support systems.
7. Certain products in this document may need government approval before they can be exported to particular
countries. The purchaser assumes the responsibility of determining the legality of export of these products
and will take appropriate and necessary steps at their own expense for these.
8.
No part of the contents contained herein may be reprinted or reproduced without our prior permission.
Copyright 2004 Oki Electric Industry Co., Ltd.
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