¡ Semiconductor

MSM6948/6948V

1/13

¡ Semiconductor

MSM6948/6948V

1200 bps Single Chip MSK Modem

GENERAL DESCRIPTION

The MSM6948/6948V is a single chip MSK (Minimum Shift Keying) modem which is fabricated by
Oki's low power consumption CMOS silicon gate technology.
The demodulator receives the data to be transmitted (SD) synchronized with the transmit timing
clock (ST) generated by the on-chip clock generator. The signal, which is modulated by MSK method,
is output.
The demodulator converts the received MSK signal to the received data (RD) by means of a delay
detection technique after limiting the band of the received MSK signal. This signal is input to the
digital PLL and the re-generated timing clock (RT) is output from the demodulator, synchronized
with the RD.

FEATURES

· Signal power supply: +5 V
· On-chip SCF (Switched Capacitor Filter)
· The transmit filter can be also used as voice splatter filter.
· The receive timing re-generator has two different lock-in time performance options to be chosen

from.

· Built-in crystal oscillation circuit.
· Small number of external components for easy application.
· Wide application-wireless data equipment, MCA system.
· Low power consumption CMOS.
· Package options:

18-pin plastic DIP

(DIP18-P-300-2.54)

(Product name: MSM6948RS)

24-pin plastic SOP

(SOP24-P-430-1.27-K)

(Product name: MSM6948GS-K)

E2A0034-16-X1

This version: Jan. 1998

Previous version: Nov. 1996

¡ Semiconductor

MSM6948/6948V

2/13

BLOCK DIAGRAM

MCK

Modulator

LPF

Transmit

LPF

LIM

LPF

Receive

BPF

LPF

Timing

Re-generator

Delay

Detector

PDF

Power

Reset

Signal

Ground

Clock

Generator

*1 Post Detection Filter
*2 NC (MSM6948V)

¡ Semiconductor

MSM6948/6948V

3/13

PIN CONFIGURATION (TOP VIEW)

*NC (MSM6948V)
NC : No connect pin

*MCK

(NC)

24-Pin Plastic SOP

*MCK

18-Pin Plastic DIP

¡ Semiconductor

MSM6948/6948V

4/13

PIN DESCRIPTION

Name

Description

Crystal connection pins.
A 3.6864 MHz crystal shall be connected.
When an external clock is applied for MSM6948's oscillation source, it has to be input to X2.
In this case, X2 has to be AC-coupled by the capacitor of 200 pF. X1 shall be left open.

3.6864 MHz ±0.02% clock output.
This can be used for other devices under limited load conditions.

*MCK

When digital "1" is put on this pin, MSK modulator output is connected to the input of
transmit LPF.
When digital "0" is put on, the input of transmit LPF is connected to TI that is voice signal input.
The data put on ME terminal is synchronized with the rising edge of ST and input to internal
logic as a control data. The rising edge of this synchronized data resets MSK modulator.

Transmit data input.
The data on this pin is synchronized with the rising edge of ST and input to MSK modulator
as an actual transmit data.

50%

MSK

Modulated

Data

50%

hold

setup

; Min. 300 ns

hold

; Min. 300 ns

ST is synchronizing signal used for ME and SD.
This is made from master clock and is usually 1200 Hz.

Built-in analog signal ground.
The DC voltage is approximately half of V

, so the analog signals of AI, AO, and TI interfaces

with peripheral circuits which must be implemented by AC-coupling. To make this voltage
source impedance lower and ensure the device performance, it is necessary to put a bypass
capacitor on SG in close physical proximity to the device.

Analog ground.
This pin should be common with DG at the system ground point as close as possible.

setup

*NC : MSM6948V

¡ Semiconductor

MSM6948/6948V

5/13

Digital ground.
This pin should be common with AG at the system ground point as close as possible.

Voice signal input.
The signal input to this pin can be sent out to AO through the transmit LPF, the characteristics
of which, gives the splatter filter for voice band signal.
When this function is used, digital "0" must be input to ME.
TI is biased internally to SG with about 100 kW.

Transmit analog signal output.
According to the control data on ME and FT, AO is set to various state as an output terminal as
follows.

Transmit LPF

Receive BPF

The state when FT and ME = "0" is shown above. When the input digital data on FT changes to
"1" from "0", AO remains to be connected to SG during about 12 ms and after that, and AO is
switched to transmit LPF.
This delay time prevents AO from outputting meaningless signal during transient time from
power down to on of LPF.

Receive analog signal input.
AI is biased internally to SG with about 100 kW same as TI. Receive BPF and demodulator
extract the information in this signal and convert it into a serial data stream at RD output.

Transmit LPF

State of AO

"1"

Power On

The output of

MSK Signal

"1"

"0"

Transmit LPF

Voice Signal

"0"

"1"

The Output of Receive BPF

Power Down

(Used for Device Test Only)

"0"

No-signal Output

(DC-biased to SG)

Modu-

lator

Power down

Name

Description

¡ Semiconductor

MSM6948/6948V

6/13

Demodulated serial data output.
This data is synchronized with the re-generated timing clock RT.

Receive data timing clock output.
This signal is re-generated by internal digital PLL.
Synchronizing to falling edge of RT, RD is output.

Receive data timing clock is re-generated by digital PLL of which phase correcting speed can
be selected with CF.
When a digital "1" is put on CF and phase difference between receive data timing and RT is
more than 22.5 degree, phase correcting speed is high. In this case, as the phase difference
enters within 22.5 degrees, that speed changes to low immediately.
When digital "0" is input to CF, phase correcting speed of PLL remains low regardless of the
phase difference.
Usually, CF is connected to digital "1".

PLL's lock-in characteristics can be selected with CT.
When digital "1" is put on CT, PLL requires max. 50-bit alternative data pattern. On the other
hand, when digital "0" is input to CT,
PLL can be locked in below 18-bit data.

Control signal for the internal connection of AO.
Refer to column AO.
When digital "0" is input to this pin, transmit LPF enters in power down mode, but the output
buffer operational amplifier remains active.

+5 V power supply.
This device is sensitive to supply noises as switched capacitor techniques are utilized.
Bypass capacitors of more than 2.2 mF between V

and AG, and between V

and DG are

indispensable to ensure the performance.

Delay time (RT Æ RD) < 300 ns

Equipment

Personal/MCA wireless terminals

"1"

MCA wireless bases

"0"

Name

Description

¡ Semiconductor

MSM6948/6948V

7/13

ABSOLUTE MAXIMUM RATINGS

Parameter

Symbol

Condition

Rating

Unit

Power Supply Voltage

0.3 to 7.0

Analog Input Voltage *1

0.3 to V

+ 0.3

Digital Input Voltage *2

0.3 to V

+ 0.3

Operating Temperature

25 to 70

Storage Temperature

STG

55 to 150

Ta = 25°C

With respect to AG and DG

°C

*1 TI, AI
*2 ME, SD, CF, CT, FT

RECOMMENDED OPERATING CONDITIONS

Parameter

Symbol

Condition

Typ.

Unit

Operating Temperature

Min.

Max.

With respect to AG and DG

4.75

5.25

AG, DG

Power Supply Voltage

°C

Crystal Resonant Frequency

X' TAL

3.6864

3.6860

3.6868

MHz

Data Speed

1200

bit/sec

2.2

C2, C6

0.1

0.047

100 kW

0.01

0.047

25 ±5°C

100

+100

Frequency Deviation

Crystal

At 40°C to +85°C

100

+100

ppm

Temperature
Characteristics

100

Equivalent Series
Resistance

Load Capacitance

¡ Semiconductor

MSM6948/6948V

8/13

ELECTRICAL CHARACTERISTICS

DC and Digital Interface Characteristics

*1 ME, SD, CF, CT, FT
*2 ST, RD, RT
*3 MCK (NC : MSM6948V)

Analog Interface Characteristics

Transmit signal output (AO)

SD = "1"

1200

1199

1201

Carrier Frequency

= 5.0 V ±5%, Ta = 25°C to 70°C)

SD = "0"

FT = "1"

ME = "1"

1800

1799

1801

100 kW

£ 40 pF

FT = "1"

ME = "1"

Carrier Level

dBm

Output Resistance

£ 4 kHz

Output Load Resistance

100

Output Load Capacitance

0.1

+ 0.1

Output DC Voltage

OSX

Parameter

Symbol

Condition

Typ.

Unit

Min.

Max.

Note

0 dBm = 0.775 Vrms

Parameter

Symbol

Condition

Typ.

Unit

Min.

Max.

Normal Operating Mode

Power Supply Current

= 5 V ±5%, Ta = 25°C to 70°C)

MCK

X'TAL

= 3.6864 MHz ±0.01%

3.6864

3.6857

3.6871

Oscilating Frequency

MHz

= 0 V

= V

Input Leakage Current *1

0.8

2.2

Input Voltage *1

OL1

= 1.6 mA

0.4

OH1

= 400 mA

0.8V

Output Voltage *2

OL2

0.4

OH2

0.6V

Output Voltage *3

> 50 kW

< 20 pF

¡ Semiconductor

MSM6948/6948V

9/13

Voice signal input (TI)

Voltage Gain

FT = "1"

ME = "0"

£ 4 kHz

dBm

Input Signal Level

Input Resistance

Parameter

Symbol

Condition

Typ.

Unit

Min.

Max.

Built-in signal ground (SG)

0.1

+ 0.1

DC Voltage

Without DC Load

Parameter

Symbol

Condition

Typ.

Unit

Min.

Max.

Receive signal input (AI)

Input Resistance

£ 4 kHz

Receive Signal Level

dBm

S/N

at AI

8 dB

10 dB

1 ¥ 10

5 ¥ 10

Bit Error Rate

BER

N/N

Parameter

Symbol

Condition

Typ.

Unit

Min.

Max.

Re-generated receive data timing clock output (RT)

PLL1

PLL2

CT= "0"

CT= "1"

CF = "1"

Data Bit Number for PLL'
Lock-in

bit

Parameter

Symbol

Condition

Typ.

Unit

Min.

Max.

*1 Data bit number to lock-in within 22.5 degree

¡ Semiconductor

MSM6948/6948V

11/13

APPLICATION CIRCUIT

Crystal
3.6864 MHz

3.6864 MHz
Clock

Transmit Control
"1" : Data Signal (SD)
"0" : Voice Signal (TI)

Transmit Data

Transmit Data
Timing Clock

+5 V

Filter Test

PLL's Lock-in Speed
"1" : Low Speed
"0" : High Speed

Phase Correcting Speed
"1" : High Speed Correction
"0" : Low Speed Correction

Receive Data Timing Clock

Receive Data

Receive Analog Signal

Transmit Analog Signal

Voice Signal

*MCK

*NC : MSM6948V

¡ Semiconductor

MSM6948/6948V

13/13

(Unit : mm)

Notes for Mounting the Surface Mount Type Package

The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).

SOP24-P-430-1.27-K

Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)

Epoxy resin
42 alloy
Solder plating
5 mm or more
0.58 TYP.

Mirror finish

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: MSM6948V

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: MSM6948V