MSM9201-01

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GENERAL DESCRIPTION

The MSM9201-01 is a dot matrix fluorescent display tube controller driver IC which displays
characters, numerics and symbols.
Dot matrix fluorescent display tube drive signals are generated by serial data sent from a micro-
controller. A display system is easily realized by internal ROM and RAM for character display.

FEATURES

· Logic power supply (V

)

: 3.3 V

10%/5.0 V

10%

· Fluorescent display tube drive power supply (V

DISP

)

: 3.3 V

10%/5.0 V

10%

· Fluorescent display tube drive power supply (V

)

: 20 to 60 V

· VFD driver output current

(VFD driver output can directly be connected to the fluorescent display tube. No pull-down
resistor is required.)
- Segment driver (SEG1 to SEG35)

: 5.0 mA (V

=60V)

- Segment driver (AD1 to AD8)

: 10.0 mA (V

=60V)

- Grid driver (COM1 to COM16)

: 20.0 mA (V

=60V)

· General output port output current

- Output driver (P1-4)

1.0 mA (V

=3.3V

10%)

2.0 mA (V

=5.0V

10%)

· Content of display

- CGROM

5¥7 dots, 240 types

(character data)

- CGRAM

5¥7 dots, 16 types

(character data)

- ADRAM

24 (display digit) ¥4 bits (symbol data)

- DCRAM

24 (display digit) ¥8 bits (register for character data display)

- General output port

4 bits (static mode)

· Display control function

- Display digit

: 9 to 24 digits

- Display duty (contrast adjustment)

: 8 stages

- All lights ON/OFF

· 3 interfaces with microcontroller

: DA, CS, CP (4 interfaces if RESET is added)

· 1-byte instruction execution (excluding data write to RAM)
· Built-in oscillation circuit (external C and R)
· Package options:

80-pin plastic QFP (QFP80-P-1414-0.65-K) (Product name: MSM9201-01GS-K)
80-pin plastic QFP (QFP80-P-1420-0.80-BK) (Product name: MSM9201-01GS-BK)

¡ Semiconductor
MSM9201-01

Fluorescent Display Tube Controller Driver

PEDL9201-03

This version: Sep. 2000

Previous version: Nov. 1997

Preliminary

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PIN CONFIGURATION (TOP VIEW)

AD2

AD1

DISP2

FL2

RESET

OSC1

OSC0

GND

FL1

COM24

COM23

SEG19

SEG20

SEG21

SEG22

SEG23

SEG24

SEG25

SEG26

SEG27

SEG28

SEG29

SEG30

SEG31

SEG32

SEG33

SEG34

SEG35

DISP1

COM1

COM2

60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41

COM22
COM21
COM20
COM19
COM18
COM17
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
COM8
COM7
COM6
COM5
COM4
COM3

1
2
3
4
5
6
7
8
9

10
11
12
13
14
15
16
17
18
19
20

AD3
AD4

SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9

SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18

NC: No connection

80-Pin Plastic QFP

(QFP80-P-1414-0.65-K)

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COM1

COM2

COM3

COM4

COM5

COM6

COM7

COM8

COM9

COM10

COM11

COM12

COM13

COM14

COM15

COM16

COM17

COM18

COM19

COM20

COM21

COM22

COM23

COM24

DISP1

SEG35

SEG34

SEG33

SEG32

SEG31

SEG30

SEG29

SEG28

SEG27

SEG26

SEG25

SEG24

SEG23

SEG22

SEG21

SEG20

SEG19

SEG18

SEG17

SEG16

SEG15

SEG14

SEG13

SEG12

SEG11

SEG10

SEG9

SEG8

SEG7

SEG6

SEG5

SEG4

SEG3

SEG2

SEG1

AD4

AD3

AD2

AD1

FL1

GND

OSC0

OSC1

RESET

FL2

DISP2

NC: No connection

80-Pin Plastic QFP

(QFP80-P-1420-0.80-BK)

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PIN DESCRIPTIONS

QFP

-2*

Symbol Type

Description

5-39

SEG1-35

Fluorescent

tube anode

electrode

41-64

COM1-24

Fluorescent

tube grid

electrode

1-4

AD1-4

Fluorescent

tube anode

electrode

74-77

P1-4

LED drive

control

terminals

General port output.

Output of these pins in static operation, so these pins can drive

the LED. I

>2.0 mA

40, 80

DISP1-2

GND

65, 78

FL1-2

Power

supply

Fluorescent display tube anode electrode drive output.

Directly connected to fluorescent display tube. No pull-down

resistor is required. I

>5.0 mA

Fluorescent display tube grid electrode drive output.

Directly connected to fluorescent display tube. No pull-down

resistor is required. I

>20.0 mA

Fluorescent display tube anode electrode drive output.

Directly connected to fluorescent display tube. No pull-down

resistor is required. I

>10.0 mA

-GND are power supplies for internal logic.

DISP

-V

are power supplies for driving fluorescent tubes.

Use the same power supply for V

and V

DISP

Connects to:

Micro-

controller

Serial data input (positive logic).

Input from LSB.

Micro-

controller

Shift clock input.

Serial data is shifted on the rising edge of CP.

Micro-

controller

Chip select input.

Setting this pin to "H" disables serial data transfer.

QFP

-1*

3-27

39-62

1, 2, 79, 80

72-75

38, 78

63, 76

Pin

QFP-1 : QFP80-P-1414-0.65-K
QFP-2 : QFP80-P-1420-0.80-BK

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Pin

Symbol Type

Description

OSC0

, R

OSC1

External RC pin for RC oscillation.

Connect R and C externally. The RC time constant depends on the

voltage used. Set the target oscillation frequency to 2 MHz.

Connects to:

OSC0

OSC1

RESET

Micro-

controller

Reset input.

Setting this pin to "Low" initializes all the functions.

The initial status is as follows.

· Address of each RAM

· Data of each RAM

· Number of display digits

· Contrast adjusment

· All lights ON or OFF

· All outputs

address "00"H

Content is undefined

24 digits

8/16

OFF mode

"Low" level

RESET

(Circuit when R and C are

connected externally)

See Application Circuit.

(RC oscillation circuit)

See Application Circuit.

, R

QFP

-2*

QFP

-1*

QFP-1 : QFP80-P-1414-0.65-K
QFP-2 : QFP80-P-1420-0.80-BK

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ABSOLUTE MAXIMUM RATINGS

Parameter

Supply Voltage 1

Symbol

Condition

Rating

Unit

Supply Voltage 2

Input Voltage

Power Dissipation

Storage Temperature

Output Current

DISP

STG

(*1)

Ta£25°C

COM1-COM24

AD1-AD4

SEG1-SEG35

0.3 to +6.5

80 to V

DISP

+0.3

80 to V

+0.3

QFP80-P-1414-0.65-K

55 to +150

10 to 0.0

°C

30 to 0.0

20 to 0.0

(*1)

0.3 to +6.5

P1-P4

4.0 to +4.0

QFP80-P-1420-0.80-BK

565

643

*1 Use the same power supply for V

and V

DISP

RECOMMENDED OPERATING CONDITIONS (1)

When the power supply voltage is 5V (typ)

Parameter

Supply Voltage 1

Symbol

Condition

Min.

Typ.

Max.

Unit

Supply Voltage 2

High Level Input Voltage

Low Level Input Voltage
CP Frequency

Oscillation Frequency

Frame Frequency

Operating Temperature

DISP

All input pins excluding OSC0 pin

R=3.3kW, C=47pF

DIGIT=1-24, R=3.3kW, C=47pF

4.5

0.7V

5.0

5.5

0.3V

1.0

MHz

°C

1.5

122

2.0

163

2.5

204

MHz

OSC

RECOMMENDED OPERATING CONDITIONS (2)

When the power supply voltage is 3.3V (typ)

Parameter

Supply Voltage 1

Symbol

Condition

Min.

Typ.

Max.

Unit

Supply Voltage 2

High Level Input Voltage

Low Level Input Voltage
CP Frequency

Oscillation Frequency

Frame Frequency

Operating Temperature

DISP

All input pins excluding OSC0 pin

R=3.3kW, C=39pF

DIGIT=124, R=3.3kW, C=39pF

3.0

0.8V

3.3

3.6

0.2V

1.0

MHz

°C

1.5

122

2.0

163

2.5

204

MHz

OSC

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ELECTRICAL CHARACTERISTICS

DC Characteristics (1)

Parameter

Symbol

Applied pin

Condition

Min.

Max.

Unit

High Level Input Voltage

CS, CP,

DA, RESET
CS, CP,

DA, RESET

Low Level Input Voltage

=0.0V

CS, CP,

DA, RESET

High Level Input Current

Low Level Input Current

High Level Output

Voltage

OH1

OH2

OH3

OH4

COM1-24

AD1-4

SEG1-35

P1-4

DD1

P1-4

COM1-24

AD1-4

SEG1-35

, V

DISP

OH1

=20.0mA

OH2

=10.0mA

OH3

=5.0mA

OH4

=2.0mA

Duty=15/16

Digit=124

All outputs go ON

Low Level Output

Voltage

Supply Current

0.7V

1.0

DISP

1.5

DISP

1.5

DISP

1.5

1.0

0.3V

1.0

µA

DISP

=5.0V±10%, V

=60V, Ta=40 to +85°C, unless otherwise specified)

CS, CP,

+1.0

OL1

=2mA

OL2

OL1

DD2

OSC

2MHz,

no load

Duty=8/16

Digit=19

All outputs go OFF

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DC Characteristics (2)

Parameter

Symbol

Applied pin

Condition

Min.

Max.

Unit

High Level Input Voltage

CS, CP,

DA, RESET
CS, CP,

DA, RESET

Low Level Input Voltage

=0.0V

CS, CP,

DA, RESET

High Level Input Current

Low Level Input Current

High Level Output

Voltage

OH1

OH2

OH3

OH4

COM1-24

AD1-4

SEG1-35

P1-4

DD1

P1-4

COM1-24

AD1-4

SEG1-35

, V

DISP

OH1

=20.0mA

OH2

=10.0mA

OH3

=5.0mA

OH4

=1.0mA

Duty=15/16

Digit=124

All outputs go ON

Low Level Output

Voltage

Supply Current

0.8V

1.0

DISP

1.5

DISP

1.5

DISP

1.5

1.0

0.2V

1.0

µA

DISP

=3.3V±10%, V

=60V, Ta=40 to +85°C, unless otherwise specified)

CS, CP,

+1.0

OL1

=2mA

OL2

OL1

DD2

OSC

2MHz,

no load

Duty=8/16

Digit=19

All outputs go OFF

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AC Characteristics (1)

AC Characteristics (2)

Parameter

Symbol

Condition

Min.

Max.

Unit

CP Pulse Width

DA Setup Time

DA Hold Time
CS Setup Time
CS Hold Time
CS Wait Time

Data Processing Time
RESET Pulse Width

DA Wait Time

Slew Rate (All Drivers)

Rise Time

CSS

CSH

CSW

DOFF

WRES

RSOFF

PRZ

=3.3kW, C

=39pF

=3.3kW, C

=39pF

=100pF

When mounted on the unit

300

4.0

100

CP Frequncy

1.0

MHz

When RESET signal is input externally

300

, V

DISP

=3.3V±10%, V

=60V, Ta=40 to +85°C, unless otherwise specified)

4.0

=20% to 80%

=80% to 20%

Off Time

POF

When mounted on the unit, V

=0.0V

5.0

Parameter

Symbol

Condition

Min.

Max.

Unit

CP Pulse Width

DA Setup Time

DA Hold Time
CS Setup Time
CS Hold Time
CS Wait Time

Data Processing Time
RESET Pulse Width

DA Wait Time

Slew Rate (All Drivers)

Rise Time

CSS

CSH

CSW

DOFF

WRES

RSOFF

PRZ

=3.3kW, C

=47pF

=3.3kW, C

=47pF

=20% to 80%

=80% to 20%

When mounted on the unit

300

4.0

100

CP Frequncy

1.0

MHz

When RESET signal is input externally

300

, V

DISP

=5.0V±10%, V

=60V, Ta=40 to +85°C, unless otherwise specified)

=100pF

4.0

Off Time

POF

When mounted on the unit, V

=0.0V

5.0

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TIMING DIAGRAM

Symbol

=3.3V±10%

0.8 V

0.2 V

=5.0V±10%

0.7 V

0.3 V

· Data Timing

CSS

DOFF

CSH

CSW

VALID

0.7 V

0.3 V

· Reset Timing

· Output Timing

RESET

PRZ

RSON

RSOFF

WRES

When external

R and C are

connected.

When input externally

0.8 V

0.0 V

All outputs

0.8 V

DISP

0.2 V

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FUNCTIONAL DESCRIPTION

Command List

1st byte

2nd byte

LSB

MSB

LSB

MSB

Command

DCRAM data write

CGRAM data write 1

ADRAM data write

General output port set

Display duty set

Number of display digits set

All lights ON/OFF

Test mode

C5 C10 C15 C20 C25 C30

C6 C11 C16 C21 C26 C31

C7 C12 C17 C22 C27 C32

C8 C13 C18 C23 C28 C33

C9 C14 C19 C24 C29 C34

2nd byte

3rd byte

4th byte

5th byte

6th byte

Xn
Cn
Pn
Dn
Kn
H
L

: Don't care
: Address specification for each RAM
: Character code specification for each RAM
: General output port status specification
: Display duty specification
: Number of display digits specification
: All lights ON instruction
: All lights OFF instruction

Note: The test mode is used for inspection before shipment.

It is not a user function.

When data is written to RAM (DCRAM, CGRAM, ADRAM) continuously,
addresses are internally incremented automatically.
Therefore it is not necessary to specify the 1st byte when RAM data
for the 2nd and later bytes is written.

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Positional Relationship Between SEGn and ADn (one digit)

AD1

SEG1

SEG6

C10

SEG11

C15

SEG16

C20

SEG21

C25

SEG26

C30

SEG31

SEG2

SEG7

C11

SEG12

C16

SEG17

C21

SEG22

C26

SEG27

C31

SEG32

SEG3

SEG8

C12

SEG13

C17

SEG18

C22

SEG23

C27

SEG28

C32

SEG33

SEG4

SEG9

C13

SEG14

C18

SEG19

C23

SEG24

C28

SEG29

C33

SEG34

SEG5

SEG10

C14

SEG15

C19

SEG20

C24

SEG25

C29

SEG30

C34

SEG35

ADRAM written data.
Corresponds to 2nd byte

CGRAM data write mode. Corresponds to 2nd byte

CGRAM data write mode. Corresponds to 3rd byte

CGRAM data write mode. Corresponds to 4th byte

CGRAM data write mode. Corresponds to 6th byte
CGRAM data write mode. Corresponds to 5th byte

AD2

AD3

AD4

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Data Transfer Method and Command Write Method

Display control command and data are written by an 8-bit serial transfer.
Write timing is shown in the figure below.

Setting the CS pin to "Low" level enables a data transfer.
Data is 8 bits and is sequentially input into the DA pin from LSB (LSB first).
As shown in the figure below, data is read by the shift register at the rise of the shift clock, which
is input into the CP pin. If 8-bit data is input, internal load signals are automatically generated
and data is written to each register and RAM.
Therefore it is not necessary to input load signals from the outside.

Setting the CS pin to "High" disables data transfer. Data input from the point when the CS pin
changes from "High" to "Low" is recognized in 8-bit units.

When data is written to RAM (DCRAM, ADRAM, CGRAM) continuously, addresses are
internally incremented automatically.
Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later
bytes.

Reset Function

Reset is executed when the RESET pin is set to "L", (when turning power on, for example,) which
initializes all functions.
The initial status is as follows.
· Address of each RAM .................. address "00"H
· Data of each RAM ........................ All contents are undefined
· General output port ..................... All general output ports go "Low"
· Number of display digits ............ 24 digits
· Contrast adjustment ..................... 8/16
· All display lights ON or OFF ..... OFF mode
· Segment output ............................ All segment outputs go "Low"
· AD output ..................................... All AD outputs go "Low"
After reset is executed, perform settings again according to "Initial Setting Flowchart" shown
later.

DOFF

LSB

B1 B2 B3 B4 B5 B6 B7

B0 B1 B2 B3 B4 B5 B6 B7

MSB

1st byte

LSB

MSB

2nd byte

When data is written to DCRAM* Command and address data

CSH

B0 B1 B2 B3 B4 B5 B6 B7

LSB

MSB

2nd byte

Character code data of the
next address

Character code data

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Description of Commands and Functions

1. DCRAM data write

(Specifies the address (00H to 1FH) of DCRAM and writes the character code of CGROM and
CGRAM.)

DCRAM (Data Control RAM) has 5-bit addresses to store character code of CGROM and
CGRAM.
The character code specified in DCRAM is converted to a 5¥7 dot matrix character pattern via
CGROM or CGRAM.
The DCRAM can store 24 characters.

[Command format]

X0 X1 X2 X3 X4

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

(1st)

LSB

MSB

C0 C1 C2 C3 C4 C5 C6 C7

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(2nd)

LSB

MSB

: selects DCRAM data write mode and specifies DCRAM

address.
(Ex: Specifies DCRAM address 00H)

: specifies character code of CGROM and CGRAM.

(written into DCRAM address 00H)

To specify the character code of CGROM and CGRAM continuously to the next address, specify
only character codes as follows.
Since the addresses of DCRAM are automatically incremented, they do not need to be specified.

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C0 C1 C2 C3 C4 C5 C6 C7

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(3rd)

LSB

MSB

C0 C1 C2 C3 C4 C5 C6 C7

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(4th)

LSB

MSB

: specifies character code of CGROM and CGRAM.

(written into DCRAM address 01H)

: specifies character code of CGROM and CGRAM.

(written into DCRAM address 02H)

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(25th)

LSB

MSB

C0 C1 C2 C3 C4 C5 C6 C7

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(26th)

LSB

MSB

: specifies character code of CGROM and CGRAM.

(written into DCRAM address 17H)

: specifies dummy character code of CGROM and CGRAM.

(not written into DCRAM address)

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(33th)

LSB

MSB

C0 C1 C2 C3 C4 C5 C6 C7

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(34th)

LSB

MSB

: specifies dummy character code of CGROM and CGRAM.

(not written into DCRAM address)

: specifies character code of CGROM and CGRAM.

(rewritten into DCRAM address 00H)

C0 C1 C2 C3 C4 C5 C6 C7

X0 (LSB) to X4 (MSB): DCRAM address (5 bits: 24 characters)
C0 (LSB) to C7 (MSB): Character code of CGROM and CGRAM (8 bits: 256 characters)

Setting of CGROM and CGRAM character codes for up to 24 digits is now complete.
To further specify character codes continuously from DCRAM address 00H, dummy character
codes must be specified for DCRAM address 18H to 1FH (so that DCRAM address will be
incremented automatically and will be reset to 00H).

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[COM positions and set DCRAM address]

HEX

COM position

X0 X1 X2 X3 X4

HEX

COM position

X0 X1 X2 X3 X4

COM1

COM17

COM2

COM18

COM3

COM19

COM4

COM20

COM5

COM21

COM6

COM22

COM7

COM23

COM8

COM24

COM9

COM10

COM11

COM12

COM13

COM14

COM15

COM16

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2. CGRAM data write

(Specifies the addresses 00H to 0FH of CGRAM and writes character pattern data.)

CGRAM (Character Generator RAM) has 4-bit addresses to store 5¥7 dot matrix character
patterns.
A character pattern stored in CGRAM can be displayed by specifying the character code
(address) in DCRAM.
The addresses of CGRAM are assigned to 00H to 0FH. (All the other addresses are the
CGROM addresses.)
(The CGRAM can store 16 types of character patterns.)

[Command format]

C0 C5 C10 C15 C20 C25 C30

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(2nd)

LSB

MSB

: specifies 1st column data.

(written into CGRAM address 00H)

C1 C6 C11 C16 C21 C26 C31

B0 B1 B2 B3 B4 B5 B6 B7

3rd byte

(3rd)

LSB

MSB

: specifies 2nd column data.

(written into CGRAM address 00H)

X0 X1 X2 X3

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

(1st)

LSB

MSB

: selects CGRAM data write mode and specifies

CGRAM address.
(Ex: specifies CGRAM address 00H)

C2 C7 C12 C17 C22 C27 C32

B0 B1 B2 B3 B4 B5 B6 B7

4th byte

(4th)

LSB

MSB

: specifies 3rd column data.

(written into CGRAM address 00H)

C3 C8 C13 C18 C23 C28 C33

B0 B1 B2 B3 B4 B5 B6 B7

5th byte

(5th)

LSB

MSB

: specifies 4th column data.

(written into CGRAM address 00H)

C4 C9 C14 C19 C24 C29 C34

B0 B1 B2 B3 B4 B5 B6 B7

6th byte

(6th)

LSB

MSB

: specifies 5th column data.

(written into CGRAM address 00H)

To specify character pattern data continuously to the next address, specify only character pattern
data as follows.
Since the addresses of CGRAM are automatically incremented, they do not need to be specified.
The 2nd to 6th byte (character pattern data) are regarded as one data item, so 300 ns is sufficient
for t

DOFF

time between bytes.

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X0 (LSB) to X3 (MSB): CGRAM address (4 bits: 16 characters)
C0 (LSB) to C34 (MSB): Character pattern data (35 bits: 35 outputs per digit)

C0 C5 C10 C15 C20 C25 C30

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(7th)

LSB

MSB

specifies 1st column data.
(written into CGRAM address 01H)

C4 C9 C14 C19 C24 C29 C34

B0 B1 B2 B3 B4 B5 B6 B7

6th byte

(11th)

LSB

MSB

specifies 5th column data.
(written into CGRAM address 01H)

C0 C5 C10 C15 C20 C25 C30

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(12th)

LSB

MSB

specifies 1st column data.
(written into CGRAM address 02H)

C4 C9 C14 C19 C24 C29 C34

B0 B1 B2 B3 B4 B5 B6 B7

6th byte

(16th)

LSB

MSB

specifies 5th column data.
(written into CGRAM address 02H)

C0 C5 C10 C15 C20 C25 C30

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(77th)

LSB

MSB

specifies 1st column data.
(written into CGRAM address 0FH)

C4 C9 C14 C19 C24 C29 C34

B0 B1 B2 B3 B4 B5 B6 B7

6th byte

(81th)

LSB

MSB

specifies 5th column data.
(written into CGRAM address 0FH)

C0 C5 C10 C15 C20 C25 C30

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(82th)

LSB

MSB

specifies 1st column data.
(rewritten into CGRAM address 00H.)

C4 C9 C14 C19 C24 C29 C34

B0 B1 B2 B3 B4 B5 B6 B7

6th byte

(86th)

LSB

MSB

specifies 5th column data.
(rewritten into CGRAM address 00H.)

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[CGROM addresses and set CGRAM addresses]

Refer to ROM CODE

HEX X0

CGROM address

X1 X2 X3

HEX X0

CGROM address

X1 X2 X3

RAM00(00000000B)

RAM01(00000001B)

RAM08(00001000B)

RAM09(00001001B)

RAM02(00000010B)

RAM03(00000011B)

RAM0A(00001010B)

RAM0B(00001011B)

RAM04(00000100B)

RAM05(00000101B)

RAM0C(00001100B)

RAM0D(00001101B)

RAM06(00000110B)

RAM07(00000111B)

RAM0E(00001110B)

RAM0F(00001111B)

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Positional relationship between the output area of CGROM and that of CGRAM

Note: CGROM (Character Generator ROM) has 8-bit addresses to generate 5¥7 dot matrix

character patterns.
CGRAM can store 240 types opf character patterns.

C10

C15

C20

C25

C30

C11

C16

C21

C26

C31

C12

C17

C22

C27

C32

C13

C18

C23

C28

C33

C14

C19

C24

C29

C34

Corresponds to 2nd byte (1st column)

Corresponds to 3rd byte (2nd column)

Corresponds to 5th byte (4th column)

Corresponds to 6th byte (5th column)

Corresponds to 4th byte (3rd column)

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3. ADRAM data write

(specifies address of ADRAM and writes symbol data)

ADRAM (Additional Data RAM) has 4-bit addresses to store symbol data.
Symbol data specified in ADRAM is directly output without CGROM and CGRAM.
(The DRAM can store 4 types of symbol patterns for each digit.)
The terminal to which the contents of ADRAM are output can be used as a cursor.

[Command format]

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(2nd)

LSB

MSB

: specifies symbol data.

(written into ADRAM address 00H)

X0 X1 X2 X3 X4

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

(1st)

LSB

MSB

: selects ADRAM data write mode and specifies ADRAM

address.
(Ex: specifies ADRAM address 00H)

To specify symbol data continuously to the next address, specify only symbol data as follows.
The addresses of ADRAM are automatically incremented. Specification of ADRAM addresses
is therefore unnecessary.

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(3rd)

LSB

MSB

: specifies symbol data.

(written into ADRAM address 01H)

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(4th)

LSB

MSB

: specifies symbol data.

(written into ADRAM address 02H)

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(17th)

LSB

MSB

: specifies symbol data.

(written into ADRAM address 17FH)

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(18th)

LSB

MSB

: specifies dummy symbol data.

(not written into ADRAM address)

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(65th)

LSB

MSB

: specifies dummy symbol data.

(not written into ADRAM address)

C0 C1 C2 C3 C4 C5 C6 C7

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(66th)

LSB

MSB

: specifies symbol data.

(rewritten into ADRAM address 00H.)

Setting of symbol data for up to 24 digits is now complete.
To further specify symbol data continuously from DCRAM address 00H, dummy symbol data
must be specified for ADRAM addresses 18H to 1FH (so that the ADRAM address will be
incremented automatically and will be reset to 00H).

X0 (LSB) to X4 (MSB): ADRAM addresses (5 bits: 24 characters)
C0 (LSB) to C3 (MSB): Symbol data (4 bits: 4-symbol data per digit)

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[COM positions and ADRAM addresses]

HEX X0

COM position

X1 X2 X3

HEX X0

COM position

X1 X2 X3

COM1

COM17

COM2

COM18

COM3

COM19

COM4

COM20

COM5

COM21

COM6

COM22

COM7

COM23

COM8

COM24

COM9

COM10

COM11

COM12

COM13

COM14

COM15

COM16

4. General output port set

(specifies the general output port status)

The general output port is an output for 4-bit static operation.
It is used to control other I/O devices and turn on LED. (Static operation.)
The fluorescent display tube cannot be driven by this output port, because when at the "High"
level this output becomes the V

voltage and when at the "Low" level it becomes the ground

potential.

[Command format]

P1 P2 P3 P4

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

LSB

MSB

: selects general output port and specifies

the output status.

P1-P4 : general output ports

: don't care

[Set data and set state of general output port]

Display state of general output port

Sets P1-P4 to Low

Sets P1-P4 to High

(The state when power is applied or when RESET is input)

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5. Display duty set

(writes display duty value to duty cycle register)

Display duty adjusts contrast in 8 stages using 3-bit data.
At the time power is turned on or the RESET signal is input, the duty cycle register value is
"0". Always execute this instruction before turning the display on, then set a desired duty
value.

[Command format]

D0 D1 D2

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

LSB

MSB

: selects display duty set mode and sets duty value.

D0 (LSB) to D2 (MSB) : display duty data (3 bits: 8 stages)

* : don't care

[Relation between setup data and controlled COM duty]

HEX

COM duty

8/16

9/16

10/16

11/16

12/16

13/16

14/16

15/16

(The state at the time power is turned on or RESET

signal is input)

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6. Number of display digits set

(writes the number of display digits to the display digit register)

The number of display digits set can display 9 to 24 digits using 4-bit data.
At the time power is turned on or a RESET signal is input, the display digit register value is
"0". Always execute this instruction to change the number of digits before turning the dispaly
on.

[Command format]

K0 K1 K2 K3

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

LSB

MSB

: selects the number of display digits set mode and specifies

the number of digits value.

K0 (LSB) to K3 (MSB): number of display digits data (4 bits: 16 digits)

[Relation between setup data and controlled COM]

The state at the time power is turned on or RESET signal is input

HEX

Number of digits

of COM

COM1-24

COM1-9

COM1-10

COM1-11

COM1-12

COM1-13

COM1-14

COM1-15

HEX

Number of digits

of COM

COM1-16

COM1-17

COM1-18

COM1-19

COM1-20

COM1-21

COM1-22

COM1-23

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7. All display lights ON/OFF set

(Turns all display lights ON or OFF)

The all display lights ON mode is used primarily for display testing.
The all display lights OFF mode is primarily used to prevent malfunction on power-up.

[Command format]

* * *

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

LSB

MSB

: selects all display lights ON or OFF mode.

[Set data and display state of SEG and AD]

All outputs maintain current states

Sets all outputs to Low

Sets all outputs to High

Display state of SEG and AD

(The state at the time power is applied or RESET is input)

(All lights ON mode has priority.)

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Initial Setting Flowchart

All display lights OFF

Specify display duty

CGRAM

Data write mode

(with address set)

CGRAM

Character code

CGRAM

Is character code

write ended?

Another RAM to

be set?

Release all display lights

OFF mode

ADRAM

Data write mode

(with address set)

ADRAM

Character code

ADRAM

Is character code

write ended?

DCRAM

Data write mode

(with address set)

DCRAM

Character code

DCRAM

Is character code

write ended?

Select a RAM to be used

Status of all outputs by RESET
signal input

Normal operation status (display ON)

Address is automatically
incremented

YES

End

Address is automatically
incremented

Start

Power is applied or RESET is input

Apply V

Specify number of

display digits

Specify general output

port status

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APPLICATION CIRCUIT

Notes: 1. The V

value depends on the power supply voltage of the microcontroller used.

Adjust the values of the constants R

, R

, C

, and C

to the power supply voltage

used.

2. The V

value depends on the fluorescent display tube used. Adjust the values of the

constants R

and ZD to the power supply voltage used.

MSM9201-01

Micro-

controller

RESET V

DISP1-2

COM1-24

SEG1-35

AD1-4

GND

FL1-2

OSC0

OSC1

Output Port

P1-2

5¥7-dot matrix fluorescent display tube

GRID

(DIGIT)

ANODE

(SEGMENT)

ANODE

(SEGMENT)

Heater transformer

LED

NPN Tr

GND

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Reference data

The figure below shows the relationship between the V

voltage and the output current of each

driver.
Take care that the total power consumption to be used does not exceed the power dissipation.

Output Current (mA)

Voltage (V

DD-n

)

COM1 to COM24
(Condition: V

DISP

1.5 V)

AD1 to AD4
(Condition: V

DISP

1.5 V)

SEG1 to SEG35
(Condition: V

DISP

1.5 V)

(V)

Voltage vs. Output Current of Each Driver

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(Unit : mm)

PACKAGE DIMENSIONS

Notes for Mounting the Surface Mount Type Package

The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).

Package material
Lead frame material
Pin treatment
Package weight (g)

Oki Electric Industry Co., Ltd.

Rev. No./Last Revised

Epoxy resin
42 alloy
Solder plating (5 mm)
0.85 TYP.
3/Nov. 28, 1996

Mirror finish

QFP80-P-1414-0.65-K

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(Unit : mm)

Notes for Mounting the Surface Mount Type Package

Package material
Lead frame material
Pin treatment
Package weight (g)

Oki Electric Industry Co., Ltd.

Rev. No./Last Revised

Epoxy resin
42 alloy
Solder plating (5 mm)
1.27 TYP.
4/Nov. 28, 1996

Mirror finish

QFP80-P-1420-0.80-BK

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NOTICE

The information contained herein can change without notice owing to product and/or
technical improvements. Before using the product, please make sure that the information
being referred to is up-to-date.

The outline of action and examples for application circuits described herein have been
chosen as an explanation for the standard action and performance of the product. When
planning to use the product, please ensure that the external conditions are reflected in the
actual circuit, assembly, and program designs.

When designing your product, please use our product below the specified maximum
ratings and within the specified operating ranges including, but not limited to, operating
voltage, power dissipation, and operating temperature.

Oki assumes no responsibility or liability whatsoever for any failure or unusual or
unexpected operation resulting from misuse, neglect, improper installation, repair, alteration
or accident, improper handling, or unusual physical or electrical stress including, but not
limited to, exposure to parameters beyond the specified maximum ratings or operation
outside the specified operating range.

Neither indemnity against nor license of a third party's industrial and intellectual property
right, etc. is granted by us in connection with the use of the product and/or the information
and drawings contained herein. No responsibility is assumed by us for any infringement
of a third party's right which may result from the use thereof.

The products listed in this document are intended for use in general electronics equipment
for commercial applications (e.g., office automation, communication equipment,
measurement equipment, consumer electronics, etc.). These products are not authorized
for use in any system or application that requires special or enhanced quality and reliability
characteristics nor in any system or application where the failure of such system or
application may result in the loss or damage of property, or death or injury to humans.
Such applications include, but are not limited to, traffic and automotive equipment, safety
devices, aerospace equipment, nuclear power control, medical equipment, and life-support
systems.

Certain products in this document may need government approval before they can be
exported to particular countries. The purchaser assumes the responsibility of determining
the legality of export of these products and will take appropriate and necessary steps at their
own expense for these.

No part of the contents contained herein may be reprinted or reproduced without our prior
permission.

MS-DOS is a registered trademark of Microsoft Corporation.

Printed in Japan

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