¡ Semiconductor

MSM9210

1/20

FEDL9210-04

GENERAL DESCRIPTION

The MSM9210 is a full CMOS controller/driver for Duplex or Triplex (1/2 duty or 1/3 duty)
vacuum fluorescent display tube. It consists of a 32-segment driver multiplexed to drive up to
96 segments, and 10-bit digital dimming circuit.
MSM9210 features a selection of a master mode and a slave mode, and therefore it can be used
to expand segments for the VFD driver with keyscan and A/D converter function.
MSM9210 provides an interface with a microcontroller only by three signal lines: DATA IN,
CLOCK and CS.

FEATURES

· Logic supply voltage (V

)

: 4.5 to 5.5V

· Driver supply voltage (V

DISP

)

: 8 to 18V

· Duplex/Triplex (1/2 duty / 1/3 duty) selectable

DUP/TRI=1/2 duty selectable at "H" level
DUP/TRI=1/3 duty selectable at "L" level

· Number of display segments

Max. 64-segment display (during 1/2 duty mode)
Max. 96-segment display (during 1/3 duty mode)

· Master/Slave selectable

M/S=Master mode selectable at "H" level
M/S=Slave mode selectable at "L" level

· Interface with a microcontroller

Three lines: CS, CLOCK, and DATA IN

· 32-segment driver outputs

: I

=5mA at V

DISP

0.8V (SEG1 to 22)

(can be directly connected to VFD tube

: I

=10mA at V

DISP

0.8V (SEG23 to 32)

and require no external resisters)

: I

=500mA at V

=2V (SEG1 to 32)

· 3-grid pre-driver outputs

: I

=5.0mA at V

DISP

0.8V

(require external drivers)

=10mA at V

=2V

· Logic outputs

: I

=200mA at V

0.8V

=200mA at V

=0.8V

· Built-in digital dimming circuit (10-bit resolution)
· Built-in oscillation circuit (external R and C)
· Built-in Power-On-Reset circuit
· Package options:

56-pin plastic QFP (QFP56-P-910-0.65-2K)

Product name: MSM9210GS-2K

64-pin plastic QFP (QFP64-P-1414-0.80-BK)

Product name: MSM9210GS-BK

¡ Semiconductor
MSM9210

32-Bit Duplex/Triplex (1/2 duty / 1/3 duty) VF Controller/Driver with Digital Dimming

FEDL9210-04

This version: May 2000

Previous version: Set. 1999

¡ Semiconductor

MSM9210

2/20

FEDL9210-04

BLOCK DIAGRAM

Timing Generator

DIM OUT

SYNC OUT1

SYNC OUT2

DIM IN

SYNC IN1

SYNC IN2

M/S

DUP/TRI

OSC

Control

Out1-32

32bit Shift Register

in1-10

Dimming Latch

Out1-10

10bit Digital

Dimming

POR

OSC0

OSC1

CLOCK

DATA IN

Out1-3

3bit Shift Register

POR

Out1-32

Segment Latch

in1-32

POR

Out1-32

Segment Latch

in1-32

POR

Out1-32

Segment Latch

in1-32

POR

Mode Select

in1-3

POR

Power

Reset

L-GND

POR

Out1-32

96 to 32 Segment Control

in1-32

32 Segment Driver

DISP

D-GND

3 Grid pre Driver

GRID2 GRID3

GRID1

SEG32

SEG1

¡ Semiconductor

MSM9210

4/20

FEDL9210-04

PIN CONFIGURATION (TOP VIEW)

42
41
40
39
38
37
36
35
34
33
32

1
2
3
4
5
6
7
8
9

10
11

SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32

GRID1
GRID2
GRID3

SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3

DISP

SEG24

SEG23

SEG22

SEG21

SEG20

SEG19

D-GND

SEG18

DIM IN

SYNC IN 1

SYNC IN 2

CLOCK

DATA IN

L-GND

OSC1

OSC0

D-GND

DUP/

TRI

SYNC OUT 2

SYNC OUT 1

DIM OUT

31 SEG2
30 SEG1
29 NC

SEG17

SEG16

SEG15

SEG14

DISP

NC: No connection

56-pin Plastic QFP

¡ Semiconductor

MSM9210

5/20

FEDL9210-04

NC: No connection

64-pin Plastic QFP

48
47
46
45
44
43
42
41
40
39
38

1
2
3
4
5
6
7
8
9

10
11

SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32

GRID1
GRID2

NC
NC
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5

DISP

SEG24

SEG23

SEG22

SEG21

SEG20

SEG19

D-GND

SEG18

SEG17

DIM IN

SYNC IN1

SYNC IN2

CLOCK

DATA IN

L-GND

OSC1

OSC0

DUP/

TRI

GRID3

D-GND

SYNC OUT2

SYNC OUT1

DIM OUT

37 SEG4
36 SEG3
35 SEG2
34 SEG1
33 NC

SEG16

SEG15

SEG14

DISP

¡ Semiconductor

MSM9210

6/20

FEDL9210-04

PIN DESCRIPTIONS

Symbol

QFP56

Type

Description

DISP

43,56

Power supply pins for VFD driver circuit.
43 pin and 56 pin should be connected externally.

Power supply pin for logic drive.

D-GND

12, 49

L-GND

SEG1 to 22

30 to 42,
44 to 48,

50 to 53

D-GND is ground pin for the VFD driver circuit. L-GND is ground
pin for the logic circuit. 12pin, 21pin and 49pin should be
connected externally.

Segment (anode) signal output pins for a VFD tube.
These pins can be directly connected to the VFD tube.
External circuit is not required.
IOH£5 mA

SEG23 to 32

1 to 8,
54, 55

Segment (anode) signal output pins for a VFD tube.
These pins can be directly connected to the VFD tube.
External circuit is not required.
IOH£10 mA

GRID1 to 3

9, 10, 11

Inverted Grid signal output pins.
For pre-driver, the external circuit is required.
IOL£10 mA

Chip select input pin.
Data is not transferred when CS is set to a Low level.

CLOCK

Shift clock input pin.
Serial data shifts at the rising edge of the CLOCK.

DATA IN

Serial data input pin (positive logic).
Data is input to the shift register at the rising edge of the CLOCK signal.

DUP/TRI

Duplex/Triplex operation select input pin.
Duplex (1/2 duty) operation is selected when this pin is set to V

Triplex (1/3 duty) operation is selected when this pin is set to L-GND.

M/S

Master/Slave mode select input pin.
Master mode is selected when this pin is set to V

Slave mode is selected when this pin is set to L-GND.

Dimming pulse input.
When the slave mode is selected, the pulse width of the all segment
output are controlled by a input pulse width of DIM IN.
Connect this pin to the master side DIM OUT pin at the slave mode.
When the master mode is selected, the input level of this pin is
ignored and the pulse width of the all grids and segment outputs are
controlled by a built-in 10-bit dimming circuit.
Connect this pin to V

or L-GND at the master mode.

DIM IN

QFP64

49,64

13, 56

34 to 46,
51 to 55,

57 to 60

2 to 9,
61, 62

10, 11, 12

Pin

¡ Semiconductor

MSM9210

7/20

FEDL9210-04

Symbol

QFP56

Type

Description

SYNC OUT 1, 2

26, 27

Synchronous signal output.
Connect these pins to the slave side SYNC IN 1, and 2 pins.

OSC0

OSC1

RC oscillator connecting pins.
Oscillation frequency depends on
display tubes to be used.
For details, refer to ELECTRICAL
CHARACTERISTICS.

OSC0

OSC1

QFP64

29, 30

Pin

SYNC IN 1, 2

16, 17

Synchronous signal input.
When the slave mode is selected, connect these pins to the master
side SYNC OUT 1, and 2 pins.
When the master mode is selected, the input level of these pins are ignored.
Connect these pins to V

or L-GND at the master mode.

DIM OUT

Dimming pulse output.
Connect this pin to the slave side DIM IN pin.

19, 20

ABSOLUTE MAXIMUM RATING

RECOMMENDED OPERATING CONDITIONS

Parameter

Symbol

DISP

Driver Supply Voltage

Logic Supply Voltage

High Level Input Voltage

Low Level Input Voltage

Clock Frequency

Operating Temperature

Condition

Min.

Typ.

Max.

Unit

8.0

13.0

18.0

4.5

5.0

5.5

All inputs except OSC0

0.8V

All inputs except OSC0

0.2V

1.0

MHz

+85

°C

Parameter

Symbol

Condition

Ratings

Unit

DISP

0.3 to +20

Driver Supply Voltage

Logic Supply Voltage

Input Voltage

Ta25

Power Dissipation

STG

Storage Temperature

SEG1 to 22

SEG23 to 32

Output Current

GRID1 to 3

DIM OUT, SYNC OUT1, SYNC OUT2

0.3 to +6.5

0.3 to V

+0.3

260

55 to +150

10.0 to +2.0

20.0 to +2.0

10.0 to +20.0

2.0 to +2.0

¡ Semiconductor

MSM9210

8/20

FEDL9210-04

When a 1/2 duty VFD tube is used

When a 1/3 duty VFD tube is used

Parameter

Symbol

OSC

Oscillation Frequency

Frame Frequency

Condition

Min.

Typ.

Max.

Unit

R=8.2KW±5%, C=22pF±5%

1.0

1.5

2.0

MHz

R=8.2KW±5%, C=22pF±5%

122

183

244

Parameter

Symbol

OSC

Oscillation Frequency

Frame Frequency

Condition

Min.

Typ.

Max.

Unit

R=6.2KW±5%, C=22pF±5%

1.5

2.25

3.0

MHz

R=6.2KW±5%, C=22pF±5%

122

183

244

¡ Semiconductor

MSM9210

9/20

FEDL9210-04

ELECTRICAL CHARACTERISTICS

DC Characteristics

Parameter

Symbol

High Level Input Voltage

Low Level Input Voltage

High Level Input Current

Low Level Input Current

OH1

OH2

OH3

High Level Output Voltage

Condition

Min.

Max.

Unit

0.8V

0.2V

1.0

+1.0

=GND

1.0

+1.0

DISP

0.8

DISP

0.8

DISP

0.8

DISP

=9.5V

Applied pin

*1)

SEG1-22

SEG23-32

GRID1-3

OH4

*2)

=4.5V

OH1

=5mA

OH2

=10mA

OH3

=5mA

OH4

=200mA

OL1

OL2

OL3

Low Level Output Voltage

2.0

0.8

DISP

=9.5V

SEG1-22

SEG23-32

GRID1-3

OL4

*2)

=4.5V

OL1

=500mA

OL2

=500mA

OL3

=10mA

OL4

=200mA

5.0

Supply Current

100

DISP

OSC

=3.0MHz, no load

OSC

=3.0MHz, no load

Ta=40 to +85°C,V

DISP

=8.0 to 18.0V, V

=4.5 to 5.5V

*1) CS, CLOCK, DATA IN, DIM IN, SYNC IN 1, SYNC IN 2, M/S, DUP/TRI
*2) DIM OUT, SYNC OUT 1, SYNC OUT 2

¡ Semiconductor

MSM9210

10/20

FEDL9210-04

AC Characteristics

TIMING DIAGRAM

Data Input Timing

0.8V

0.2V

0.8V

0.2V

0.8V

0.2V

CLOCK

DATA IN

CSS

1/f

CSH

CSL

VALID

Reset Timing

POF

PRZ

RSOFF

0.8V

0.0V

0.8V

0.0V

Driver Output Timing

0.8V

DISP

0.2V

DISP

SEG1-32, GRID1-3

Parameter

Symbol

Clock Frequency

Clock Pulse Width

Data Setup Time

Data Hold Time

CSL

CS Off Time

CSS

PRZ

CS Setup Time
(CS-Clock)

Output Slew Rate Time

Rise Time

Condition

Min.

Max.

Unit

1.0

MHz

400

=20% to 80%

2.0

=80% to 20%

2.0

Mounted in a unit

100

=100pF

CSH

CS Hold Time
(Clock-CS)

400

POF

Off Time

Mounted in a unit, V

=0.0V

5.0

RSOFF

CS Wait Time

400

Ta=40 to +85°C,V

DISP

=8.0 to 18.0V, V

=4.5 to 5.5V

¡ Semiconductor

MSM9210

11/20

FEDL9210-04

Output Timing (Duplex Operation)

*1bit time=4/f

OSC

(The dimming data is 1016/1024 at the master mode)

GRID1

DISP

D-GND

GRID2

DISP

D-GND

GRID3

SEG1-32

DISP

D-GND

DIM OUT

L-GND

SYNC OUT1

L-GND

SYNC OUT2

L-GND

DISP

D-GND

2048bit times (1 display cycle)

1016bit times

1019bit times

1029bit times

1019bit times

1029bit times

5bit times

3bit times

8bit times

5bit times

Output Timing (Triplex Operation)

*1bit time=4/f

OSC

(The dimming data is 1016/1024 at the master mode)

GRID1

DISP

D-GND

GRID2

DISP

D-GND

GRID3

SEG1-32

DISP

D-GND

DIM OUT

L-GND

SYNC OUT1

L-GND

SYNC OUT2

L-GND

DISP

D-GND

3072bit times (1 display cycle)

1016bit times

1019bit times

1029bit times

1019bit times

1029bit times

5bit times

3bit times

8bit times

5bit times

1019bit times

1016bit times

8bit times

¡ Semiconductor

MSM9210

12/20

FEDL9210-04

Segment Data Input [Function Mode: 0 to 3]
· MSM9210 receives the segment data when function mode 0 to 3 are selected.
· The same segment data is transferred to the 3 segment data latches corresponding to GRID 1

to 3 at the same time when the function mode 0 is selected.

· The segment data is transferred to only one segment data latch corresponding to the specified

GRID when the function mode is 1, 2 or 3 is selected.

· Segment output (SEG1 to 32) becomes High level (lightning) when the segment data (S1 to S32)

is set to "1".

[Data Format]

Input Data

: 35 bits

Segment Data : 32 bits
Mode Data

: 3 bits

FUNCTIONAL DESCRIPTION

Power-on Reset
When power is turned on, MSM9210 is initialized by the internal power-on reset circuit.
The status of the internal circuit after initialization is as follows:
· The contents of the shift registers and latches are set to "0".
· The digital dimming duty cycle is set to "0".
· All segment outputs are set to Low level.
· All grid outputs are set to High level.

Data Transfer Method
Data can be transferred between the rising edge and the next falling edge of chip select input.
The mode data, segment data and dimming data are written by a serial transfer method. The
serial data is input to the shift register at the rising edge of a shift clock pulse.
The mode data (M0 to M2) must be transferred after the segment data and dimming data
succeedingly.
When the chip select input falls, an internal LOAD signal is automatically generated and data is
loaded to the latches.

Function Mode
Function mode is selected by the mode data (M0 to M2). The relation between function mode and
mode data is as follows:

FUNCTION MODE

OPERATING MODE

FUNCTION DATA

Segment Data for GRID1-3 Input

Segment Data for GRID1 Input

Segment Data for GRID2 Input

Segment Data for GRID3 Input

Digital Dimming Data Input

S29

S30

S31

S32

Bit

Input Data

Segment Data (32bits)

Mode Data

(3bits)

¡ Semiconductor

MSM9210

13/20

FEDL9210-04

[Bit correspondence between segment output and segment data]

S17

S18

S19

S20

S21

S22

S23

S24

S25

S10

S26

S11

S27

S12

S28

S13

S29

S14

S30

S15

S31

S16

S32

SEG n

Segment data

SEG n

Segment data

Digital Dimming Data Input [Function Mode: 4]
· MSM9210 receives the digital dimming data when function mode 4 is selected.
· The output duty changes in the range of 0/1024 (0%) to 1016/1024 (99.2%) for each grid.
· The 10-bit digital dimming data is input from LSB.

[Data Format]

Input Data

: 13 bits

Digital Dimming Data: 10 bits
Mode Data

: 3 bits

D10

Bit

Input Data

Digital Dimming Data (10bits)

Mode Data

(3bits)

D10

Dimming Data

(MSB)

(LSB)

Duty Cycle

0/1024

1/1024

1015/1024

1016/1024

LSB

MSB

Master Mode
Master Mode is selected when M/S pin is set at High level. The master mode operation is as
follows:
· The input levels of DIM IN, SYNC IN1 and SYNC IN2 are ignored, and these pins should be

connected to L-GND or V

· The pulse width of GRID1 to 3 and SEG1 to 32 are controlled by the internal digital dimming

circuit.

· The segment Latch1 to 3 corresponding to GRID1 to 3 are selected by the internal timing

generator.

¡ Semiconductor

MSM9210

14/20

FEDL9210-04

SYNC IN 1

SYNC IN 2

Segment Latch

GRID

Latch1

GRID1

Latch2

GRID2

Latch3

GRID3

DIM IN

SEG1 to 32

Low

High

Slave Mode
Slave Mode is selected when M/S pin is set at Low level. The slave mode operation is as follows:
· The internal dimming circuit is ignored.
· The pulse width of SEG1 to 32 are controlled by the pulse width of DIM IN signal.
· The segment Latch1 to 3 corresponding to GRID1 to 3 are selected by SYNC IN1 and SYNC IN2

signals.

· The output levels of GRID1 to 3 are set at High level. The output levels of DIM OUT, SYNC

OUT1 and SYNC OUT2 are set at Low level.

[Correspondence between SYNC IN1, 2 and Segment Latch1 to 3] [Correspondence between DIM IN and SEG1 to 32]

Note: Low: Lights OFF

High: Lights ON

¡ Semiconductor

MSM9210

15/20

FEDL9210-04

APPLICATION CIRCUITS

1. Circuit for the duplex VFD tube with 128 segments (2 Grid

64 Anode)

MSM9210
(MASTER)

DISP

D-GND

L-GND

OSC 0

OSC 1

CLOCK

DATA IN

DIM IN

SYNC IN 1

SYNC IN 2

M/S

DUP/TRI

DIM OUT

SYNC OUT 1

SYNC OUT 2

GRID2

GRID1

GRID3

SEG1

SEG32

MSM9210

(SLAVE)

DISP

D-GND

L-GND

OSC 0

OSC 1

CLOCK

DATA IN

DIM IN

SYNC IN 1

SYNC IN 2

DIM OUT

SYNC OUT 1

SYNC OUT 2

GRID2

GRID1

GRID3

SEG1

SEG32

Duplex VF Tube

S62 S63 S64

S1 S2 S3

Microcontroller

DISP

M/S

GND

DUP/TRI

GND

¡ Semiconductor

MSM9210

16/20

FEDL9210-04

2. Circuit for the triplex VFD tube with 192 segments (3 Grid

64 Anode)

MSM9210
(MASTER)

DISP

D-GND

L-GND

OSC 0

OSC 1

CLOCK

DATA IN

DIM IN

SYNC IN 1

SYNC IN 2

DUP/TRI

M/S

DIM OUT

SYNC OUT 1

SYNC OUT 2

GRID2

GRID1

GRID3

SEG1

SEG32

MSM9210

(SLAVE)

DISP

D-GND

L-GND

OSC 0

OSC 1

CLOCK

DATA IN

DIM IN

SYNC IN 1

SYNC IN 2

DUP/TRI

M/S

DIM OUT

SYNC OUT 1

SYNC OUT 2

GRID2

GRID1

GRID3

SEG1

SEG32

Triplex VF Tube

S62 S63 S64

S1 S2 S3

G1
G2

Microcontroller

DISP

GND

¡ Semiconductor

MSM9210

18/20

FEDL9210-04

(Unit : mm)

PACKAGE DIMENSIONS

Notes for Mounting the Surface Mount Type Package

The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).

QFP56-P-910-0.65-2K

Mirror finish

Package material
Lead frame material
Pin treatment
Package weight (g)

Oki Electric Industry Co., Ltd.

Rev. No./Last Revised

Epoxy resin
42 alloy
Solder plating (5 mm)
0.43 TYP.
4/Nov. 28, 1996

¡ Semiconductor

MSM9210

19/20

FEDL9210-04

(Unit : mm)

Notes for Mounting the Surface Mount Type Package

QFP64-P-1414-0.80-BK

Package material
Lead frame material
Pin treatment
Package weight (g)

Oki Electric Industry Co., Ltd.

Rev. No./Last Revised

Epoxy resin
42 alloy
Solder plating (5 mm)
0.87 TYP.
5/Sept. 21, 1999

¡ Semiconductor

MSM9210

20/20

FEDL9210-04

NOTICE

The information contained herein can change without notice owing to product and/or
technical improvements. Before using the product, please make sure that the information
being referred to is up-to-date.

The outline of action and examples for application circuits described herein have been
chosen as an explanation for the standard action and performance of the product. When
planning to use the product, please ensure that the external conditions are reflected in the
actual circuit, assembly, and program designs.

When designing your product, please use our product below the specified maximum
ratings and within the specified operating ranges including, but not limited to, operating
voltage, power dissipation, and operating temperature.

Oki assumes no responsibility or liability whatsoever for any failure or unusual or
unexpected operation resulting from misuse, neglect, improper installation, repair, alteration
or accident, improper handling, or unusual physical or electrical stress including, but not
limited to, exposure to parameters beyond the specified maximum ratings or operation
outside the specified operating range.

Neither indemnity against nor license of a third party's industrial and intellectual property
right, etc. is granted by us in connection with the use of the product and/or the information
and drawings contained herein. No responsibility is assumed by us for any infringement
of a third party's right which may result from the use thereof.

The products listed in this document are intended for use in general electronics equipment
for commercial applications (e.g., office automation, communication equipment,
measurement equipment, consumer electronics, etc.). These products are not authorized
for use in any system or application that requires special or enhanced quality and reliability
characteristics nor in any system or application where the failure of such system or
application may result in the loss or damage of property, or death or injury to humans.
Such applications include, but are not limited to, traffic and automotive equipment, safety
devices, aerospace equipment, nuclear power control, medical equipment, and life-support
systems.

Certain products in this document may need government approval before they can be
exported to particular countries. The purchaser assumes the responsibility of determining
the legality of export of these products and will take appropriate and necessary steps at their
own expense for these.

No part of the contents contained herein may be reprinted or reproduced without our prior
permission.

MS-DOS is a registered trademark of Microsoft Corporation.

Printed in Japan

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ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: MSM9210GS-2K