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MSM9563
Semiconductor
GENERAL DESCRIPTION
The MSM9563 is an IC which demodulates FM character multiplex signals in the DARC (Data Radio
Channel)
*1
format to obtain digital data. The MSM9563 operates at 3 V.
The MSM9563 contains on one chip a band pass filter using a switched capacitor filter (SCF) and a
group of circuits including frame memory, a frame synchronization circuit, and an error correction
circuit.
By connecting an external FM receiver and memory for temporary data storage, and microcontroller,
a system for obtaining digital data can easily be constructed.
The FM multiplex demodulation ICs, the MSM9500-series devices, are configured with minimum
functions; so they will, by changing the software of the external microcontroller, be able to respond
flexibly to the many FM multiplex broadcast services that are going to come about in the future.
The MSM9563 is best suited to radios and information processing devices that support DARC FM
multiplex broadcasting. It is also best suited to car radios and car navigation systems.
*1 DARC is a registered trademark of NHK Engineering Services.
Note that a contract needs to be made with NHK Engineering Service if a manufacturer produces/
sells electronic equipment utilizing the DARC technology.
FEATURES
Built-in two receive channels including main channel and sub-channel
(one of two FM stations can be selected)
Pin compatible with MSM9553/MSM9555
Internal frame memory enables automatic error correction.
Built-in bandpass filter (SCF)
Built-in block synchronization circuit and frame synchronization circuit
Setting of the number of synchronization protection steps can be changed.
Data clocks are regenerated by digital PLL.
1T delay detection
Built-in vertical and horizontal error correction circuits
Built-in layer 4 and layer 2 CRC processing circuits
Parallel interface with microcontroller
Clock output for external devices (64 kHz to 8.192 MHz variable)
Compatible with the international standard frame formats A (real time block also supported),
B, C
Power supply:
2.7 V to 3.6 V
Package:
44-pin plastic QFP (QFP44-P-910-0.80-2K) (Product name: MSM9563GA)
Semiconductor
MSM9563
IC for FM Multiplex Data Demodulation
Preliminary
E2F0015-19-32
This version: Mar. 1999
Previous version: Oct. 1998
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MSM9563
Semiconductor
BLOCK DIAGRAM
Data Add
CS
WR
RD
CLR
1T delay
circuit
LPF
Variable
gain
AMP
BPF
(SCF)
XTAL1
XTAL2
Frequency
divider
IC internal
clock
Vref
FM multiplex
signal input
LPF
PN
Descrambler
Receive RAM
Layer 4 CRC
CPU interface
Data bus
Address bus
INT
Filter Section
Delay Detection Section
Digital Signal Processing Section
Error
correction
&
Layer 2 CRC
SP
SG
Timer
INT
Clock
generator
Clock
regeneration
Block
synchronization
Frame
synchronization
Timing
control
FRAME
memory
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MSM9563
Semiconductor
PIN CONFIGURATION (TOP VIEW)
NC : No-connection pin
44-Pin Plastic QFP
1
2
3
11
10
9
8
7
6
5
4
44
43
42
41
40
39
38
37
36
35
34
33
32
31
23
24
25
26
27
28
29
30
12
13
14
15
16
17
18
19
20
21
22
MOUT1
MOUT2
MOUT3
MON
ADETIN
AV
DD
AGND
XOUTC
MOUT0
MOUT5
MOUT6
INT
WR
NC
RD
DB0
DB1
DB3
NC
NC
NC
A4
A3
A2
DB6
DB5
CS
XTAL2
DB7
AIN
A0
XOUT
DB4
SG
MOUT4
DB2
DGND
DV
DD
XTAL1
A1
A5
CLR
NC
NC
,
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MSM9563
Semiconductor
PIN DESCRIPTIONS
Function
Pin
Type
Description
Microcontroller
Interface
16
I
Write signal to internal register.
18
I
Read signal to internal register.
15
O
Interrupt signal to microcontroller. "L": An interrupt is
generated.
31
I
Chip select signal.
"L": Read, write, and data bus signals become active.
40
I
"L" : the internal registers are initialized and the device enters
power down mode.
33 to 38
I
Address signal to internal register.
19 to 26
I/O
Data bus signal to internal register.
6
I
FM multiplex signal input.
5
O
Analog reference voltage output pin. Connect a capacitor
between this pin and analog ground to prevent noise.
1
O
Analog section waveform monitoring pin. The analog block
mode setting is specified by the analog control register.
2
I
Digital signal input pin for testing analog section.
8 to 14
O
Digital section test signal output and monitor output pins.
29
I
8.192 MHz crystal connection pin.
30
O
8.192 MHz crystal connection pin.
32
O
Pin for supply of 64 kHz to 8.192 MHz variable clock to the
outside.
7
I
XOUT output control pin.
"L" = Clock output, "H" = Output disabled. Pulled up internally.
3
--
Analog section power supply pin.
4
--
Analog ground pin.
28
--
Digital section power supply pin.
27
--
Digital ground pin.
Tuner
Interface
Analog
Section Test
Digital
Section Test
Clock
Power
Supply
Symbol
WR
RD
INT
CS
CLR
A0 to A5
DB0 to DB7
AIN
SG
MON
ADETIN
MOUT0 to
MOUT6
XTAL1
XTAL2
XOUT
XOUTC
AV
DD
AGND
DV
DD
DGND
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MSM9563
Semiconductor
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Condition
Rating
Unit
Power Supply Voltage
AV
DD
= DV
DD
Ta = 25C
AV
DD
0.3 to +7.0
V
Input Voltage
V
I
0.3 to AV
DD
+ 0.3
Maximum Power Dissipation
Ta = 25C, per package
P
D
400
mW
Ta = 25C, per output
50
Storage Temperature
--
T
STG
55 to +150
C
DV
DD
V
O
0.3 to DV
DD
+ 0.3
Output Voltage
Parameter
Symbol
Condition
Range
Unit
Power Supply Voltage
AV
DD
= DV
DD
AV
DD
2.7 to 3.6
V
Applied Pin
AV
DD
Crystal Oscillation Frequency
--
f
XTAL
8.192 MHz 100 ppm
--
XTAL1,
XTAL2
FM Multiplex Signal Input
Voltage
Variable amplifier gain: 1
V
AIN
*
V
P-P
AIN
Operating Temperature
--
T
op
40 to +85
C
--
DV
DD
DV
DD
0.6 to 0.9
Variable amplifier gain: 1.5
0.4 to 0.6
Variable amplifier gain: 2
0.3 to 0.4
Variable amplifier gain: 3
0.2 to 0.3
*
Peak values (a total voltage of the following signals (a) to (c)) of composite signals including
multiplex signals.
(a) Voice signals (100% modulated: voice max.)
(b) Pilot signal
(c)
FM multiplex signals (10%: LMSK max.)
The maximum amplitude of an input signal is in the range of 0.9 V
P-P
in which the internal
IC circuit is not saturated.
Therefore, multiplex signals of up to 0.9 V
P-P
can be input if only multiplex signals (excluding
composite signals) are input from a signal generator.
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