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Электронный компонент: W110

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T
ECHNICAL
B
RIEF
July 1996
O
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P
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W110
100BASE-T + 10BASE-T
Dual-Speed Ethernet MAC
Mega Macrofunction
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Contents
Description ................................................................................................................................................................1
Features .....................................................................................................................................................................1
Signal Descriptions ..................................................................................................................................................4
Transmit Byte Stream Signals ..........................................................................................................................4
Receive Byte Stream Signals ............................................................................................................................5
Host Interface Lines ...........................................................................................................................................6
Auxiliary Outputs ..............................................................................................................................................6
MII Signals ..........................................................................................................................................................7
MII Management Signals ..................................................................................................................................8
Per-Packet Control .............................................................................................................................................8
Miscellaneous Signals .......................................................................................................................................8
Functional Description ..........................................................................................................................................10
Management Statistics ....................................................................................................................................10
Applications .....................................................................................................................................................11
Switch Building Blocks ..........................................................................................................................11
Network Interface Controllers .............................................................................................................11
Physical Layer Options ...................................................................................................................................12
Data Paths .........................................................................................................................................................12
The MII Interface .............................................................................................................................................13
Statistics Gathering and Vectors ..........................................................................................................14
Address Recognition .............................................................................................................................14
Host Interface Options ..........................................................................................................................15
Testing .....................................................................................................................................................15
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Oki Semiconductor
W110 Dual-Speed Ethernet Controller
100Mbps + 10Mbps Ethernet Media Access Controller Mega Macrofunction
DESCRIPTION
The W110 is a 100BASE-T Ethernet Media Access Controller (MAC) mega macrofunction for dual-speed
operation (100Mbps/10Mbps) and an MII interface. Implemented in 0.5m and 0.8m technologies, the
W110 supports a wide range of physical layer (PHY) devices, including both 100Mbps and 10Mbps
devices for wired, optical, and wireless networks, operating in half- or full-duplex mode.
The W110 mega macrofunction is available in various configurations, depending upon customer parti-
tioning requirements. The W110 contains two main submodules, called MAC110 and PCS110. The
MAC110 submodule contains the key transmit/receive functions and performs the CSMA/CD function
specified in ISO/IEC 8802-3: 1993 and the supplemental IEEE standard 802.3u-1995. The PCS110 submod-
ule contains various PHY support modules and MII support.
Potential applications include network interface controllers (NICs), multiport switches, switching rout-
ers, hubs, and test equipment.
The MAC110 submodule contains ~10.1k gates. The final top-level gate count is determined by which
particular PCS option is chosen by the user. The W110M option (transmit and receive function with MII
interface only) contains ~7.1k gates. A gate-level model of the mega macrofunction is available in Verilog
or VHDL.
FEATURES
Supported ASIC Families
Family Name
Technology
Family Type
MSM38S0000
0.8m
TLM Sea of Gates
MSM98S000
TLM Customer Structured Array
MSM12R/32R0000
0.5m
DLM Sea of Gates
MSM13R/30R0000
TLM Sea of Gates
MSM98R/92R000
TLM Customer Structured Array
Support for 10 or 100 Mbps MII-based PHY devices,
including:
- 100BASE-TX
- 100BASE-FX
- 100BASE-T4
Support for TP-PMD and fiber-PMD (FDDI) devices
Complies with ISO/IEC 802-3:1993 and IEEE std.
802.3u-1995
Generates transmit/receive statistics vectors
Autonegotiation support
Support for ENDEC devices
Full-duplex Ethernet support
PCS functions 4B/5B, and scrambling
Optimized for switching and multi-port applications
Generic interface supporting various buses, including
ISA, PCI, MCA, VLB, SBus, NuBus, SCSI, and
MULTIBUS
Additional submodules available for packet filtering,
statistics collection, and bus interface with FIFO
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W110 Dual-Speed Ethernet Controller
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Recommended Operating Conditions (V
SS
= 0 V)
Parameter
Symbol
Rated Values
Unit
Min.
Typ.
Max.
Power supply voltage (5V operation)
V
DD
4.75
5.0
5.25
V
Power supply voltage (3V operation)
V
DD
2.7
3.3
3.6
V
Operating temperature
T
j
-40
+25
+85
C
Mega Macrofunction Characteristics
Mega Macrofunction
Description
Logic Gate Count
Logic Pin Count
W110
Dual-Speed Ethernet MAC
~10,100
163
Figure 1. Logic Symbol
TX_CLK
TXCEN
TXD[3:0]
TX_EN
TX_ER
CRS
COL
PPADEN
PCRCEN
PHUGEN
OVERR
TPD[7:0]
TPSF
TPUR
TPEF
TPUD
TPDN
TPRT
TPAB
TSVP
TSV[25:0]
Transmit Signals
W110
RPD[7:0]
RPSF
RPDV
RPEF
RSVP
RSV[20:0]
HCLK
HCS_L
HRW
HA[8:1]
HDI[15:0]
TRST
HDO[15:0]
HRST_L
Receive Signals
Host Signals
RRST
RX_CLK
RXCEN
RXD[3:0]
RX_DV
RX_ER
MDC
MDO
MDOEN
MDI
SRXEN
CRCO[8:0]
CRCG
BCO
MCO
MII
Management
Per-Packet
Control
Miscellaneous
Signals
Auxiliary
Outputs
MII
Signals
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Oki Semiconductor
RFUN
TFUN
Transmit Status
Transmit Data
Receive Data
Receive Status
TXD[3:0], TX_EN, TX_ER
RX_CLK, RXD[3:0], RX_DV, RX_ER
TX_CLK, COL, CRS
PTXEN
MAC110
PCS110
100 Mb
Interface
10 Mb
Interface
MII Signals
MII
Management
Autonegotiation
PMA
PHY
User
Interface
Network
Interface
W110
Figure 2. W110 Block Diagram
Figure 3. Example of W110 Application:
PCI Ethernet Controller
Host Write
Host CPU Access
W110
Dual-Speed
MAC
Network Device
i.e., 10/100 MII
TP-PMD or
ENDEC
Communication
Signals
Management
Signals
Customer ASIC (including higher-level functions)
Host Read
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