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Электронный компонент: MC10H189FNR2

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Semiconductor Components Industries, LLC, 2000
March, 2000 Rev. 7
1
Publication Order Number:
MC10H189/D
MC10H189
Hex Inverter with Enable
The MC10H189 is a Hex Inverter with a common Enable input. The
hex inverting function is provided when Enable is in the lowstate.
When Enable is in the highstate, all outputs are low.
This MECL 10H part is a functional/pinout duplication of the
standard MECL 10K family part, with 100% improvement in
propagation delay and no increase in powersupply current.
Propagation Delay, 1.3 ns Typical DatatoOutput
Power Dissipation 180 mW Typ/Pkg (No Load)
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10KCompatible
LOGIC DIAGRAM
DIP
PIN ASSIGNMENT
12
11
10
7
6
5
9
2
3
4
13
14
15
X
Y
OUT
VCC1
AOUT
BOUT
COUT
AIN
BIN
CIN
VEE
VCC2
FOUT
EOUT
DOUT
FIN
EIN
DIN
COMMON
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
X
Y
OUT
Inputs
Output
VCC1 = Pin 1
VCC2 = Pin 16
VEE = Pin 8
TRUTH TABLE
L
L
H
H
L
H
L
H
H
L
L
L
Pin assignment is for DualinLine Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10H189L
CDIP16
25 Units/Rail
MC10H189P
PDIP16
25 Units/Rail
MC10H189FN
PLCC20
46 Units/Rail
MARKING
DIAGRAMS
1
16
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CDIP16
L SUFFIX
CASE 620
MC10H189L
AWLYYWW
PDIP16
P SUFFIX
CASE 648
PLCC20
FN SUFFIX
CASE 775
10H189
AWLYYWW
1
1
16
MC10H189P
AWLYYWW
MC10H189
http://onsemi.com
2
MAXIMUM RATINGS
Symbol
Characteristic
Rating
Unit
VEE
Power Supply (VCC = 0)
8.0 to 0
Vdc
VI
Input Voltage (VCC = 0)
0 to VEE
Vdc
Iout
Output Current Continuous
Surge
50
100
mA
TA
Operating Temperature Range
0 to +75
C
Tstg
Storage Temperature Range Plastic
Ceramic
55 to +150
55 to +165
C
C
ELECTRICAL CHARACTERISTICS (VEE = 5.2 V
5%) (See Note 1.)
0
25
75
Symbol
Characteristic
Min
Max
Min
Max
Min
Max
Unit
IE
Power Supply Current
46
42
46
mA
IinH
Input Current High
495
310
310
A
IinL
Input Current Low
0.5
0.5
0.3
A
VOH
High Output Voltage
1.02
0.84
0.98
0.81
0.92
0.735
Vdc
VOL
Low Output Voltage
1.95
1.63
1.95
1.63
1.95
1.60
Vdc
VIH
High Input Voltage
1.17
0.84
1.13
0.81
1.07
0.735
Vdc
VIL
Low Input Voltage
1.95
1.48
1.95
1.48
1.95
1.45
Vdc
AC PARAMETERS
tpd
Propagation Delay
Enable
Data
0.7
0.7
2.2
1.9
0.7
0.7
2.2
1.9
0.7
0.7
2.3
1.9
ns
tr
Rise Time
0.7
2.4
0.7
2.4
0.7
2.4
ns
tf
Fall Time
0.7
2.4
0.7
2.4
0.7
2.4
ns
1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 Ifpm is maintained.
Outputs are terminated through a 50ohm resistor to 2.0 volts.
MC10H189
http://onsemi.com
3
PACKAGE DIMENSIONS
PLCC20
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 77502
ISSUE C
NOTES:
1. DATUMS L, M, AND N DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS PLASTIC
BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM T, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE MOLD
FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250)
PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN THE
PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS,
GATE BURRS AND INTERLEAD FLASH, BUT
INCLUDING ANY MISMATCH BETWEEN THE TOP
AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037 (0.940).
THE DAMBAR INTRUSION(S) SHALL NOT CAUSE
THE H DIMENSION TO BE SMALLER THAN 0.025
(0.635).
M
N
L
Y BRK
W
V
D
D
S
LM
M
0.007 (0.180)
N
S
T
S
LM
M
0.007 (0.180)
N
S
T
S
LM
S
0.010 (0.250)
N
S
T
X
G1
B
U
Z
VIEW DD
20
1
S
LM
M
0.007 (0.180)
N
S
T
S
LM
M
0.007 (0.180)
N
S
T
S
LM
S
0.010 (0.250)
N
S
T
C
G
VIEW S
E
J
R
Z
A
0.004 (0.100)
T
SEATING
PLANE
S
LM
M
0.007 (0.180)
N
S
T
S
LM
M
0.007 (0.180)
N
S
T
H
VIEW S
K
K1
F
G1
DIM
MIN
MAX
MIN
MAX
MILLIMETERS
INCHES
A
0.385
0.395
9.78
10.03
B
0.385
0.395
9.78
10.03
C
0.165
0.180
4.20
4.57
E
0.090
0.110
2.29
2.79
F
0.013
0.019
0.33
0.48
G
0.050 BSC
1.27 BSC
H
0.026
0.032
0.66
0.81
J
0.020
0.51
K
0.025
0.64
R
0.350
0.356
8.89
9.04
U
0.350
0.356
8.89
9.04
V
0.042
0.048
1.07
1.21
W
0.042
0.048
1.07
1.21
X
0.042
0.056
1.07
1.42
Y
0.020
0.50
Z
2
10
2
10
G1
0.310
0.330
7.88
8.38
K1
0.040
1.02
_
_
_
_
MC10H189
http://onsemi.com
4
CDIP16
L SUFFIX
CERAMIC DIP PACKAGE
CASE 62010
ISSUE T
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
A
B
T
F
E
G
N
K
C
SEATING
PLANE
16 PL
D
S
A
M
0.25 (0.010)
T
16 PL
J
S
B
M
0.25 (0.010)
T
M
L
DIM
MIN
MAX
MIN
MAX
MILLIMETERS
INCHES
A
0.750
0.785
19.05
19.93
B
0.240
0.295
6.10
7.49
C
0.200
5.08
D
0.015
0.020
0.39
0.50
E
0.050 BSC
1.27 BSC
F
0.055
0.065
1.40
1.65
G
0.100 BSC
2.54 BSC
H
0.008
0.015
0.21
0.38
K
0.125
0.170
3.18
4.31
L
0.300 BSC
7.62 BSC
M
0
15
0
15
N
0.020
0.040
0.51
1.01
_
_
_
_
16
9
1
8
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
A
B
F
C
S
H
G
D
J
L
M
16 PL
SEATING
1
8
9
16
K
PLANE
T
M
A
M
0.25 (0.010)
T
DIM
MIN
MAX
MIN
MAX
MILLIMETERS
INCHES
A
0.740
0.770
18.80
19.55
B
0.250
0.270
6.35
6.85
C
0.145
0.175
3.69
4.44
D
0.015
0.021
0.39
0.53
F
0.040
0.70
1.02
1.77
G
0.100 BSC
2.54 BSC
H
0.050 BSC
1.27 BSC
J
0.008
0.015
0.21
0.38
K
0.110
0.130
2.80
3.30
L
0.295
0.305
7.50
7.74
M
0
10
0
10
S
0.020
0.040
0.51
1.01
_
_
_
_
PDIP16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 64808
ISSUE R
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MC10H189/D
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