Semiconductor Components Industries, LLC, 2000
March, 2000 Rev. 3
1
Publication Order Number:
MC14066B/D
MC14066B
Quad Analog Switch/Quad
Multiplexer
The MC14066B consists of four independent switches capable of
controlling either digital or analog signals. This quad bilateral switch
is useful in signal gating, chopper, modulator, demodulator and
CMOS logic implementation.
The MC14066B is designed to be pinforpin compatible with the
MC14016B, but has much lower ON resistance. Input voltage swings
as large as the full supply voltage can be controlled via each
independent control input.
Triple Diode Protection on All Control Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Linearized Transfer Characteristics
Low Noise -- 12 nV/
Cycle, f
1.0 kHz typical
PinforPin Replacement for CD4016, CD4016, MC14016B
For Lower R
ON
, Use The HC4066 HighSpeed CMOS Device
MAXIMUM RATINGS
(Voltages Referenced to V
SS
) (Note 2.)
Symbol
Parameter
Value
Unit
V
DD
DC Supply Voltage Range
0.5 to +18.0
V
V
in
, V
out
Input or Output Voltage Range
(DC or Transient)
0.5 to V
DD
+ 0.5
V
I
in
Input Current (DC or Transient)
per Control Pin
10
mA
I
SW
Switch Through Current
25
mA
P
D
Power Dissipation,
per Package (Note 3.)
500
mW
T
A
Ambient Temperature Range
55 to +125
C
T
stg
Storage Temperature Range
65 to +150
C
T
L
Lead Temperature
(8Second Soldering)
260
C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic "P and D/DW" Packages: 7.0 mW/
_
C From 65
_
C To 125
_
C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highimpedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
v
(V
in
or V
out
)
v
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
SS
or V
DD
). Unused outputs must be left open.
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A
= Assembly Location
WL or L
= Wafer Lot
YY or Y
= Year
WW or W = Work Week
Device
Package
Shipping
ORDERING INFORMATION
MC14066BCP
PDIP14
2000/Box
MC14066BD
SOIC14
55/Rail
MC14066BDR2
SOIC14
2500/Tape & Reel
MC14066BDT
TSSOP14
MC14066BF
SOEIAJ14
96/Rail
See Note 1.
MARKING
DIAGRAMS
1
14
PDIP14
P SUFFIX
CASE 646
MC14066BCP
AWLYYWW
SOIC14
D SUFFIX
CASE 751A
TSSOP14
DT SUFFIX
CASE 948G
1
14
14066B
AWLYWW
14
066B
ALYW
1
14
SOEIAJ14
F SUFFIX
CASE 965
1
14
MC14066B
AWLYWW
MC14066BFEL
SOEIAJ14
See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
MC14066BDTR2
TSSOP14 2500/Tape & Reel
MC14066BDTEL
TSSOP14 2000/Tape & Reel
MC14066B
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2
PIN ASSIGNMENT
11
12
13
14
8
9
10
5
4
3
2
1
7
6
OUT 4
IN 4
CONTROL 4
CONTROL 1
V
DD
IN 3
OUT 3
IN 2
OUT 2
OUT 1
IN 1
V
SS
CONTROL 3
CONTROL 2
LOGIC DIAGRAM AND TRUTH TABLE
(1/4 OF DEVICE SHOWN)
BLOCK DIAGRAM
IN/OUT
CONTROL
OUT/IN
IN 4
CONTROL 4
IN 3
CONTROL 3
IN 2
CONTROL 2
IN 1
CONTROL 1
OUT 1
OUT 2
OUT 3
OUT 4
13
1
5
4
6
8
12
11
2
3
9
10
V
DD
= PIN 14
V
SS
= PIN 7
Control
Switch
0 = V
SS
OFF
1 = V
DD
ON
Logic Diagram Restrictions
V
SS
V
in
V
DD
V
SS
V
out
V
DD
CIRCUIT SCHEMATIC
(1/4 OF CIRCUIT SHOWN)
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
SS
V
SS
V
SS
300
CMOS
INPUT
MC14066B
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3
ELECTRICAL CHARACTERISTICS
55
_
C
25
_
C
125
_
C
Characteristic
Symbol
V
DD
Test Conditions
Min
Max
Min
Typ
(4.)
Max
Min
Max
Unit
SUPPLY REQUIREMENTS (Voltages Referenced to V
EE
)
Power Supply Voltage
Range
V
DD
--
3.0
18
3.0
--
18
3.0
18
V
Quiescent Current Per
Package
I
DD
5.0
10
15
Control Inputs:
V
in
= V
SS
or V
DD
,
Switch I/O: V
SS
v
V
I/O
v
V
DD
, and
V
switch
v
500 mV
(5.)
--
--
--
0.25
0.5
1.0
--
--
--
0.005
0.010
0.015
0.25
0.5
1.0
--
--
--
7.5
15
30
A
Total Supply Current
(Dynamic Plus Quiescent,
Per Package
I
D(AV)
5.0
10
15
T
A
= 25
_
C only The
channel component,
(V
in
V
out
)/R
on
, is
not included.)
(0.07
A/kHz) f + I
DD
Typical
(0.20
A/kHz) f + I
DD
(0.36
A/kHz) f + I
DD
A
CONTROL INPUTS (Voltages Referenced to V
SS
)
LowLevel Input Voltage
V
IL
5.0
10
15
R
on
= per spec,
I
off
= per spec
--
--
--
1.5
3.0
4.0
--
--
--
2.25
4.50
6.75
1.5
3.0
4.0
--
--
--
1.5
3.0
4.0
V
HighLevel Input Voltage
V
IH
5.0
10
15
R
on
= per spec,
I
off
= per spec
3.5
7.0
11
--
--
--
3.5
7.0
11
2.75
5.50
8.25
--
--
--
3.5
7.0
11
--
--
--
V
Input Leakage Current
I
in
15
V
in
= 0 or V
DD
--
0.1
--
0.00001
0.1
--
1.0
A
Input Capacitance
C
in
--
--
--
--
5.0
7.5
--
--
pF
SWITCHES IN AND OUT (Voltages Referenced to V
SS
)
Recommended Peakto
Peak Voltage Into or Out
of the Switch
V
I/O
--
Channel On or Off
0
V
DD
0
--
V
DD
0
V
DD
V
pp
Recommended Static or
Dynamic Voltage Across
the Switch (5.) (Figure 1)
V
switch
--
Channel On
0
600
0
--
600
0
300
mV
Output Offset Voltage
V
OO
--
V
in
= 0 V, No Load
--
--
--
10
--
--
--
V
ON Resistance
R
on
5.0
10
15
V
switch
v
500 mV
(5.)
,
V
in
= V
IL
or V
IH
(Control), and V
in
=
0 to V
DD
(Switch)
--
--
--
800
400
220
--
--
--
250
120
80
1050
500
280
--
--
--
1200
520
300
ON Resistance Between
Any Two Channels
in the Same Package
R
on
5.0
10
15
--
--
--
70
50
45
--
--
--
25
10
10
70
50
45
--
--
--
135
95
65
OffChannel Leakage
Current (Figure 6)
I
off
15
V
in
= V
IL
or V
IH
(Control) Channel to
Channel or Any One
Channel
--
100
--
0.05
100
--
1000
nA
Capacitance, Switch I/O
C
I/O
--
Switch Off
--
--
--
10
15
--
--
pF
Capacitance, Feedthrough
(Switch Off)
C
I/O
--
--
--
--
--
0.47
--
--
--
pF
4. Data labeled "Typ" is not to be used for design purposes, but is intended as an indication of the IC's potential performance.
5. For voltage drops across the switch (
V
switch
) > 600 mV ( > 300 mV at high temperature), excessive V
DD
current may be drawn; i.e. the
current out of the switch may contain both V
DD
and switch input components. The reliability of the device will be unaffected unless the
Maximum Ratings are exceeded. (See first page of this data sheet.)
MC14066B
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4
ELECTRICAL CHARACTERISTICS
(6.)
(C
L
= 50 pF, T
A
= 25
_
C unless otherwise noted.)
Characteristic
Symbol
V
DD
Vdc
Min
Typ
(7.)
Max
Unit
Propagation Delay Times
V
SS
= 0 Vdc
Input to Output (R
L
= 10 k
)
t
PLH
, t
PHL
= (0.17 ns/pF) C
L
+ 15.5 ns
t
PLH
, t
PHL
= (0.08 ns/pF) C
L
+ 6.0 ns
t
PLH
, t
PHL
= (0.06 ns/pF) C
L
+ 4.0 ns
t
PLH
, t
PHL
5.0
10
15
--
--
--
20
10
7.0
40
20
15
ns
Control to Output (R
L
= 1 k
) (Figure 2)
Output "1" to High Impedance
t
PHZ
5.0
10
15
--
--
--
40
35
30
80
70
60
ns
Output "0" to High Impedance
t
PLZ
5.0
10
15
--
--
--
40
35
30
80
70
60
ns
High Impedance to Output "1"
t
PZH
5.0
10
15
--
--
--
60
20
15
120
40
30
ns
High Impedance to Output "0"
t
PZL
5.0
10
15
--
--
--
60
20
15
120
40
30
ns
Second Harmonic Distortion
V
SS
= 5 Vdc
(V
in
= 1.77 Vdc, RMS Centered @ 0.0 Vdc,
R
L
= 10 k
, f = 1.0 kHz)
--
5.0
--
0.1
--
%
Bandwidth (Switch ON) (Figure 3)
V
SS
= 5 Vdc
(R
L
= 1 k
, 20 Log (V
out
/V
in
) = 3 dB, C
L
= 50 pF,
V
in
= 5 V
pp
)
--
5.0
--
65
--
MHz
Feedthrough Attenuation (Switch OFF)
V
SS
= 5 Vdc
(V
in
= 5 V
pp
, R
L
= 1 k
, f
in
= 1.0 MHz) (Figure 3)
--
5.0
--
50
--
dB
Channel Separation (Figure 4)
V
SS
= 5 Vdc
(V
in
= 5 V
pp
, R
L
= 1 k
, f
in
= 8.0 MHz)
(Switch A ON, Switch B OFF)
--
5.0
--
50
--
dB
Crosstalk, Control Input to Signal Output (Figure 5)
V
SS
= 5 Vdc
(R
1
= 1 k
, R
L
= 10 k
, Control t
TLH
= t
THL
= 20 ns)
--
5.0
--
300
--
mV
pp
6. The formulas given are for the typical characteristics only at 25
_
C.
7. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance.
MC14066B
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5
TEST CIRCUITS
Figure 1.
V Across Switch
Figure 2. TurnOn Delay Time Test Circuit
and Waveforms
Figure 3. Bandwidth and
Feedthrough Attenuation
Figure 4. Channel Separation
Figure 5. Crosstalk,
Control to Output
Figure 6. Off Channel Leakage
CONTROL
SECTION
OF IC
SOURCE
V
LOAD
ON SWITCH
V
out
V
out
V
C
V
C
V
out
V
in
R
L
C
L
20 ns
V
DD
V
SS
90%
50%
10%
t
PZH
t
PHZ
t
PZL
t
PLZ
10%
90%
10%
V
x
V
out
C
L
R
L
V
DD
V
SS
V
C
V
in
V
DD
V
SS
2
V
DD
V
SS
2
V
in
V
DD
V
SS
R
L
C
L
R
L
C
L
V
in
1 k
V
out
R
L
C
L
= 50 pF
V
C
= 5.0 V TO + 5.0 V SWING
V
C
= V
DD
FOR BANDWIDTH TEST
V
C
= V
SS
FOR FEEDTHROUGH TEST
OFF CHANNEL UNDER TEST
V
DD
V
SS
V
SS
V
DD
A
CONTROL
SECTION
OF IC
90%
V
in
= V
DD
V
x
= V
SS
V
in
= V
SS
V
x
= V
DD
10 k
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