Semiconductor Components Industries, LLC, 2006

March, 2006 - Rev. 1

Publication Order Number:

NCN4555/D

NCN4555

1.8V / 3V SIM Card Power
Supply and Level Shifter

The NCN4555 is a level shifter analog circuit designed to translate

the voltages between a SIM Card and an external microcontroller or
MPU. A built-in LDO-type DC-DC converter makes the NCN4555
useable to drive 1.8 V and 3.0 V SIM card. The device fulfills the
ISO7816-3 smart card interface standard as well as GSM 11.11 and
related (11.12 and 11.18) and 3G mobile requirements (IMT-2000/3G
TS 31.101). With the STOP pin a low current shutdown mode can be
activated making the battery life longer. The Card power supply
voltage (SIM_V

) is selected using a single pin (MOD_V

Features

Supports 1.8 V or 3.0 V Operating SIM Card

The LDO is able to Supply More than 50 mA under 1.8 V and 3.0 V

Built-in Pullup Resistor for I/O Pin in Both Directions

All Pins are Fully ESD Protected According to ISO-7816

Specifications ESD Protection on SIM Pins in Excess of 7 kV
(Human Body Model)

Supports up to More than 5 MHz Clock

Low-Profile 3x3 QFN-16 Package

Pb-Free Packages are Available*

Typical Applications

SIM Card Interface Circuit for 2G, 2.5G and 3G Mobile Phones

Identification Module

Smart Card Readers

Wireless PC Cards

Figure 1. Typical Interface Application

RST
CLK
C4

GND

I/O

DET

GND

1.8 V to 5.5 V

2.7 V to 5.5 V

GND

1
2
3
4

5
6
7
8

MPU or Microcontroller

NCN4555

SIM_RST

SIM_CLK

SIM_I/O

RST

CLK

I/O

STOP

MOD_V

SIM_V

0.1

SIM Card

Detect

*For additional information on our Pb-Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.

QFN-16

MN SUFFIX

CASE 488AK

MARKING DIAGRAM

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ÇÇÇ

Device

Package

Shipping

ORDERING INFORMATION

NCN4555MN

QFN-16

123 Units / Rail

NCN4555MNR2

QFN-16

3000/Tape & Reel

NCN4555MNG

QFN-16

(Pb-Free)

123 Units / Rail

NCN4555MNR2G

QFN-16

(Pb-Free)

3000/Tape & Reel

For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb-Free Package

(Note: Microdot may be in either location)

NCN
4555

ALYW

NCN4555

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PIN DESCRIPTIONS

PIN

Name

Type

Description

STOP

INPUT

Power Down Mode pin:
STOP = Low

Low current shutdown mode activated

STOP = High

Normal Operation

A Low level on this pin resets the SIM interface, switching off the SIM_V

MOD_V

INPUT

The signal present on this pin programs the SIM_V

value:

MOD_V

= Low

SIM_V

= 1.8 V

MOD_V

= High

SIM_V

= 3 V

POWER

This pin is connected to the system controller power supply. It configures the level shifter input
stage to accept the signals coming from the microprocessor. A 0.1

F capacitor shall be used to

bypass the power supply voltage. When V

is below 1.1 V typical the SIM_V

is disabled. The

NCN4555 comes into a shutdown mode.

No Connect

BAT

POWER

DC-DC converter supply input. The input voltage ranges from 2.7V up to 5.5V. This pin has to be
bypass by a 0.1

F capacitor.

No Connect

SIM_V

POWER

This pin is connected to the SIM card power supply pin. An internal LDO converter is
programmable by the external MPU to supply either 1.8 V or 3.0 V output voltage. An external
1.0

F minimum ceramic capacitor recommended must be connected across SIM_V

and GND.

During a normal operation, the SIM_V

voltage can be set to 1.8 V followed by a 3.0 V value, or

can start directly to any of these two values.

SIM_I/O

INPUT/

OUTPUT

This pin handles the connection to the serial I/O of the card connector. A bidirectional level
translator adapts the serial I/O signal between the card and the micro controller. A 14 k

(typical)

pullup resistor provides a High impedance state for the SIM card I/O link.

SIM_RST

OUTPUT

This pin is connected to the RESET pin of the card connector. A level translator adapts the
external Reset (RST) signal to the SIM card.

GND

GROUND

This pin is the GROUND reference for the integrated circuit and associated signals. Care must be
taken to avoid voltage spikes when the device operates in a normal operation.

SIM_CLK

OUTPUT

This pin is connected to the CLOCK pin of the card connector. The CLOCK (CLK) signal comes
from the external clock generator, the internal level shifter being used to adapt the voltage defined
for the SIM_V

No Connect

CLK

INPUT

The clock signal, coming from the external controller, must have a Duty Cycle within the Min/Max
values defined by the specification (typically 50%). The built-in level shifter translates the input
signal to the external SIM card CLK input.

RST

INPUT

The RESET signal present at this pin is connected to the SIM card through the internal level
shifter which translates the level according to the SIM_V

programmed value.

I/O

INPUT/

OUTPUT

This pin is connected to an external microcontroller or cellular phone management unit. A
bidirectional level translator adapts the serial I/O signal between the smart card and the external
controller. A built-in constant 18 k

(typical) resistor provides a high impedance state when not

activated.

No Connect

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ATTRIBUTES

Characteristics

Values

ESD protection
HBM, SIM card pins (7, 8, 9, 10 & 11) (Note 1)
HBM, All other pins (Note 1)
MM, SIM card pins (7, 8, 9, 10 & 11) (Note 2)
MM, All other pins (Note 2)
CDM, SIM card pins (7, 8, 9, 10 & 11) (Note 3)
CDM , All other pins (Note 3)

> 7 kV
> 2 kV

> 600 V
> 200 V

> 2 kV

> 600 V

Moisture sensitivity (Note 4) QFN-16

Level 1

Flammability Rating

Oxygen Index: 28 to 34

UL 94 V-0 @ 0.125 in

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

1. Human Body Model, R =1500

, C = 100 pF.

2. Machine Model.
3. CDM, Charged Device Model.
4. For additional information, see Application Note AND8003/D.

MAXIMUM RATINGS

(Note 5)

Rating

Symbol

Value

Unit

LDO Power Supply Voltage

BAT

-0.5

BAT

Power Supply from Microcontroller Side

-0.5

External Card Power Supply

SIM_V

-0.5

SIM_V

Digital Input Pins

-0.5

+ 0.5

but < 6.0

Digital Output Pins

out

-0.5

out

+ 0.5

but < 6.0

SIM card Output Pins

out

-0.5

out

SIM_V

+ 0.5

but < 6.0

15 (internally limited)

QFN-16 Low Profile package
Power Dissipation @ T

= + 85

Thermal Resistance Junction-to-Air

440

C/W

Operating Ambient Temperature Range

-25 to +85

Operating Junction Temperature Range

-25 to +125

Maximum Junction Temperature

Jmax

+125

Storage Temperature Range

stg

-65 to + 150

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
5. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at T

= +25

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POWER SUPPLY SECTION

(-25

C to +85

Pin

Symbol

Rating

Min

Typ

Max

Unit

BAT

Power Supply

2.7

5.5

VBAT

Operating current I

= 0 mA (Note 6)

VBAT_SD

Shutdown current STOP= Low (Note 7)

3.0

Operating Voltage

1.8

5.5

VDD

Operating Current f

CLK

= 1 MHz (Note 8)

7.0

VDD_SD

Shutdown Current STOP = Low

1.0

Undervoltage Lockout

0.6

1.5

SIM_V

MOD_V

= High, V

BAT

= 3.0 V, I

SIM_VCC

= 50 mA

MOD_V

= High, V

BAT

= 3.3 V to 5.5 V, I

SIM_VCC

= 0 mA to 50 mA

MOD_V

= Low, V

BAT

= 2.7 V to 5.5 V, I

SIM_VCC

= 0 mA to 50 mA

2.8
1.7

2.8
3.0
1.8

3.2
1.9

V
V
V

SIM_VCC_SC

Short Circuit Current SIM_V

shorted to ground , T

=25

175

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.

6. As long as V

BAT

2.5 V. For V

BAT

> 2.5 V the maximum value increases up to 35

A (typical being in the +25

A range).

7. As long as V

BAT

2.5 V.

8. Guaranteed by design over the operating temperature range specified.

DIGITAL INPUT/OUTPUT SECTION CLOCK, RESET, I/O, STOP, MOD_V

Pin

Symbol

Rating

Min

Typ

Max

Unit

1,2, 13,

14, 15

& I

Input Voltage Range (STOP, MOD_V

, RST, CLK, I/O)

Input Current (STOP, MOD_V

, RST, CLK)

-100

100

13, 14

High Level Input Voltage (RST, CLK)
Low Level Input Voltage (RST, CLK)

0.7 * V

0.2 * V

V
V

1, 2

High Level Input Voltage (STOP, MOD_V

)

Low Level Input Voltage (STOP, MOD_V

)

0.7 * V

0.4

V
V

OH_I/O

OL_I/O

High Level Output Voltage (SIM_I/O = SIM_V

, I

OH_I/O

= -20

Low Level Output Voltage (SIM_I/O = 0 V, I

OH_I/O

= 200

High Level Input Current (I/O)
Low Level Input Current (I/O)

0.7 * V

-20

0.4

1.0

V
V

pu_I/O

I/0 Pullup Resistor

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

NCN4555

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SIM INTERFACE SECTION

(Note 9)

Pin

Symbol

Rating

Min

Typ

Max

Unit

SIM_RST

SIM_V

= +3.0 V (MOD_V

= High)

Output RESET V

@ I

sim_rst

= -20

Output RESET V

@ I

sim_rst

= +200

Output RESET Rise Time @ Cout = 30 pF
Output RESET Fall Time @ Cout = 30 pF

SIM_V

= +1.8 V (MOD_V

= Low)

Output RESET V

@ I

sim_rst

= -20

Output RESET V

@ I

sim_rst

= +200

Output RESET Rise Time @ Cout = 30 pF
Output RESET Fall Time @ Cout = 30 pF

0.9 * SIM_V

SIM_V

0.4

1
1

SIM_V

0.4

1
1

V
V

SIM_CLK

SIM_V

= +3.0 V (MOD_V

= High)

Output Duty Cycle
Max Output Frequency
Output V

@ I

sim_clk

= -20

Output V

@ I

sim_clk

= +200

Output SIM_CLK Rise Time @ Cout = 30 pF
Output SIM_CLK Fall Time @ Cout = 30 pF

SIM_V

= +1.8 V (MOD_V

= Low)

Output Duty Cycle
Max Output Frequency
Output V

@ I

sim_clk

= -20

Output V

@ I

sim_clk

= +200

Output SIM_CLK Rise Time @ Cout = 30 pF
Output SIM_CLK Fall Time @ Cout = 30 pF

0.9 * SIM_V

SIM_V

0.4

18
18

SIM_V

0.4

18
18

MHz

V
V

ns
ns

MHz

V
V

ns
ns

SIM_I/O

SIM_V

= +3.0 V (MOD_V

= High)

Output V

@ I

SIM_IO

= -20

A, V

I/O

= V

Output V

@ I

SIM_IO

= +1 mA, V

I/O

= 0 V

SIM_I/O Rise Time @ C

out

= 30 pF

SIM_I/O Fall Time @ C

out

= 30 pF

SIM_V

= +1.8 V (MOD_V

= High)

Output V

@ I

SIM_IO

= -20

A, V

I/O

Output V

@ I

SIM_IO

= +1.0 mA, V

I/O

= 0 V

SIM_I/O Rise Time @ C

out

= 30 pF

SIM_I/O Fall Time @ C

out

= 30 pF

0.8 * SIM_V

SIM_V

0.4

1
1

SIM_V

0.3

1
1

V
V

pu_SIM_I/O

Card I/O Pullup Resistor

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

9. All the dynamic specifications (AC specifications) are guaranteed by design over the operating temperature range.

NCN4555

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TYPICAL CHARACTERISTICS

100

-50

-30

-10

TEMPERATURE (

IVCC_SC_1.8 V (mA)

BAT

= 2.7 V

BAT

= 5.5 V

Figure 4. Short Circuit Current IV

_SC vs

Temperature at SIM_V

= 1.8 V (MOD_V

= LOW)

-50

-30

-10

TEMPERATURE (

IVCC_SC_3.0 V (

BAT

= 3.3 V

BAT

= 5.5 V

100

-50

-30

-10

BAT

= 3.3 V

BAT

= 5.5 V

TEMPERATURE (

IVCC_SC_3.0 V (mA)

Figure 5. Short Circuit Current IV

_SC vs

Temperature at SIM_V

= 3.0 V (MOD_V

= HIGH)

Figure 6. I

BAT

vs temperature at 3.0 V

-50

-30

-10

BAT

= 2.7 V

BAT

= 5.5 V

TEMPERATURE (

IVCC_SC_1.8 V (

Figure 7. IV

BAT

vs Temperature at 1.8 V

NCN4555

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APPLICATION INFORMATION

CARD SUPPLY CONVERTER

The NCN4555 interface DC-DC converter is a

Low Dropout Voltage Regulator capable of suppling a
current in excess of 50 mA under 1.8 V or 3.0 V. This device
features a very low quiescent current typically lower than
25

mA (Figure 6 and 7). MOD_V

is a select input

allowing a logic level signal to select a regulated voltage of
1.8 V (MOD_V

= LOW) or 3.0 V (MOD_V

= HIGH).

Additionally, the NCN4555 has a shutdown input allowing
it to turn off or turn on the regulator output. The shutdown
mode power consumption is typically in the range of a few
tens of nA (30 nA Typical). Figure 8 shows a simplified
view of the NCN4555 voltage regulator. The SIM_V

output is internally current limited and protected against
short circuits. The short-circuit current IV

is constant

over the temperature and SIM_V

. It varies with V

BAT

typically in the range of 60 mA to 90 mA (Figure 4 and 5).

In order to guarantee a stable and satisfying operating of

the LDO the SIM_V

output will be connected to a 1.0

bypass ceramic capacitor to the ground. At the input, V

BAT

will be bypassed to the ground with a 0.1

mF ceramic

capacitor.

LEVEL SHIFTERS

The level shifters accommodate the voltage difference

that might exist between the microcontroller and the smart
card. The RESET and CLOCK level shifters are
monodirectional and feature both the same architecture.

The bidirectional I/O line provides a way to automatically

adapt the voltage difference between the MCU and the SIM
card in both directions. In addition with the pullup resistor,
an active pullup circuit (Figure 8, Q1 and Q2) provides a fast
charge of the stray capacitance, yielding a rise time fully
within the ISO7816 specifications.

Figure 8. Simplified Block Diagram of the LDO Voltage Regulator

GND

REF

= 0.1

BAT

STOP

SIM_V

MOD_V

OUT

= 1.0

lim

Figure 9. Basic I/O Line Interface

LOGIC

IO/CONTROL

GND

SIM_I/O

I/O

200 ns

18 k

14 k

SIM_V

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The typical waveform provided in Figure 10 shows how

the accelerator operates. During the first 200 ns (typical),
the slope of the rise time is solely a function of the pullup
resistor associated with the stray capacitance. During this
period, the PMOS devices are not activated since the input
voltage is below their V

threshold. When the input slope

crosses the V

gsth

, the opposite one shot is activated,

providing a low impedance to charge the capacitance, thus
increasing the rise time as depicted in Figure 10. The same
mechanism applies for the opposite side of the line to make
sure the system is optimum.

INPUT SCHMITT TRIGGERS

All the Logic input pins (excepted I/O and SIM_I/O, See

Figure 3) have built-in Schmitt trigger circuits to prevent
the NCN4555 against uncontrolled operation. The typical
dynamic characteristics of the related pins are depicted
Figure 11.

The output signal is guaranteed to go High when the input

voltage is above 0.7 x V

, and will go Low when the input

voltage is below 0.2 x V

or 0.4 V depending on the input

considered (see the Digital Input Table on page 5).

SHUTDOWN OPERATING

In order to save power or for other purpose required by the

application it is possible to put the NCN4555 in a shutdown
mode by setting Low the pin STOP. On the other hand the
device enters automatically in a shutdown mode when V

becomes lower than 1.1 V typically.

ESD PROTECTION

The NCN4555 SIM interface features an HBM ESD

voltage protection in excess of 7 kV for all the SIM pins
(SIM_IO, SIM_CLK, SIM_RST, SIM_V

and GND). All

the other pins (microcontroller side) sustain at least 2 kV.
These values are guaranteed for the device in its full integrity
without considering the external capacitors added to the
circuit for a proper operating. Consequently in the operating
conditions it is able to sustain much more than 7 kV on its
SIM pins making it perfectly protected against electrostatic
discharge well over the HBM ESD voltages required by the
ISO7816 standard (4 kV).

PRINTED CIRCUIT BOARD LAYOUT

Careful layout routing will be applied to achieve a good

and efficient operating of the device in its mobile or portable
environment and fully exploit its performance.

The bypass capacitors have to be connected as close as

possible to the device pins (SIM_V

, V

or V

BAT

) in

order to reduce as much as possible parasitic behaviors
(ripple and noise). It is recommended to use
ceramic capacitors.

The exposed pad of the QFN-16 package will be

connected to the ground as well as the unconnected pins
(NC). A relatively large ground plane is recommended.

Figures 12 and 13 shows an example of PCB device

implementation in an evaluation environment.

Figure 10. SIM_IO Typical Rise and Fall Times with

Stray Capacitance > 30 pF

(33 pF Capacitor Connected on the Board)

OUTPUT

OFF

0.2 x V

or 0.4 V

0.7 x V

INPUT

Figure 11. Typical Schmitt Trigger Characteristics

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EVALUATION BOARD AND PCB GUIDELINES

12
11
10
9
8
7
6
5
4
3
2
1

Figure 12. NCN4555 engineering test board schematic diagram

GND

NC
NC

CLK

RST

I/O

GND

CLK

RST

I/O

SIM_CLK

SIM_RST

SIM_I/O

GND

GND_EXP

SIM_V

MOD_V

STOP

CLK

RST

I/O

STOP

MOD_V

GND

J10

CONTROL

& I/O

GND

CLK IP1

RST IP2

I/O IP3

IP4

IP5

MOD

IP10

IP6

SIM_CLK

IP7

SIM_RST

IP8

SIM_I/O

GND
GND

GND

IP9

CON2

GND

2N2222

SIM_CARD

2.2 k

SIM_RST

SIM_I/O

SIM_V

SIM_CLK

POI2

SENSE_SIM_V

100 nF

STOP

MBRA140T3

STOP

MOD_V

10 k

2.2 k

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PACKAGE DIMENSIONS

QFN-16 3*3*0.75 MM, 0.5 P

CASE 488AK-01

ISSUE O

16X

SEATING
PLANE

0.15 C

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED

TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.

4. COPLANARITY APPLIES TO THE EXPOSED

PAD AS WELL AS THE TERMINALS.

5. L

max

CONDITION CAN NOT VIOLATE 0.2 MM

SPACING BETWEEN LEAD TIP AND FLAG.

ÇÇÇ

0.15 C

TOP VIEW

SIDE VIEW

BOTTOM VIEW

PIN 1

LOCATION

0.10 C

0.08 C

(A3)

16 X

16X

NOTE 5

0.10 C
0.05 C

A B

NOTE 3

16X

EXPOSED PAD

DIM

MIN

MAX

MILLIMETERS

0.70

0.80

0.00

0.05

0.20 REF

0.18

0.30

3.00 BSC

1.65

1.85

3.00 BSC

1.65

1.85

0.50 BSC

0.20

---

0.30

0.50

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
"Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800-282-9855 Toll Free
USA/Canada

Japan: ON Semiconductor, Japan Customer Focus Center

2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051
Phone: 81-3-5773-3850

NCN4555/D

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