Semiconductor Components Industries, LLC, 2002

January, 2002 Rev. 3

Publication Order Number:

NCN6011/D

NCN6011

Low Power Level Shifter

The NCN6011 is a level shifter analog circuit designed to translate

the voltages between a SIM Card and an external microcontroller. The
device handles all the signals needed to control the data transaction
between the external Card and the MPU.

Features

2.7 to 6.0 V Input and/or Output Voltage Range

500 nA Quiescent Supply Current

All Pins are Fully ESD Protected

Supports 10 MHz Clock

Provides a Logic I/O Enable Function

Rx/Tx Communication Capability

Typical Applications

SIM/GSM/SMARTCARD Interface

Figure 1. Typical Interface Application

IRQ

MPU or GSM Controller

RESET

I/O

CLOCK

SIM_CLK

SIM_RST

supply

GND

POWER

MANAGEMENT

UNIT

I/O_ENABLE

SIM_IO

SIM_V

GND

CLK

RST

I/O

Swb

Swa

GND

NCN6011

GND

C3
4.7

C2
100
nF

GND

C1
6.8

GND

http://onsemi.com

TSSOP14

DTB SUFFIX

CASE 948G

MARKING

DIAGRAMS

= Assembly Location

WL, L

= Wafer Lot

= Year

WW, W = Work Week

PIN CONNECTIONS

(Top View

)

RESET

I/O

VDD

CLOCK

IO_ENABLE

SIM_IO

SIM_RST

GND

SIM_VCC

11 SIM_CLK

(Top View

)

IO_ENABLE

I/O

VDD

CLOCK

RESET

SIM_IO

SIM_VCC

GND

SIM_CLK

SIM_RST

Micro10

TSSOP14

See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.

ORDERING INFORMATION

Micro10

DM SUFFIX
CASE 846B

NCN
6011
ALYW

6011
AYW

NCN6011

http://onsemi.com

ABBREVIATIONS

CLOCK

Input Logic Clock

RESET

Input Logic Reset

VDD

Interface Power Supply Input

SIM_VCC

Interface IC Card Power Supply Output

SIM_CLK

Interface IC Card Clock Output

SIM_RST

Interface IC Card Reset Output

SIM_IO

Interface IC Card I/O Signal Line

Class A

5.0 V Smart Card

Class B

3.0 V Smart Card

PIN DESCRIPTIONS

(Pin numbers in parenthesis are related to the TSSOP14 package)
(Pin numbers in bold are related to the MIcro10 package)

Pin

Name

Type

Description

(1)

No Connection. (TSSOP14 Only)

(2)

I/O

INPUT

This pin is connected to an external microcontroller. A bidirectional level translator
adapts the serial I/O signal between the smart card and the external controller. A
builtin constant 20 k

typical resistor provides a high impedance state when not

activated.

(3)

POWER

This pin is connected to the system controller power supply and the input voltage
can range from 2.7 to 6.0 V.

(4)

CLOCK

INPUT

The clock signal, coming from the external controller, must have a Duty Cycle within
the Min/Max limits defined by the specification (typically 50%). The builtin level
shifter translates the input signal to the external SIM card voltage supply.

(5)

RESET

INPUT

The RESET signal present at this pin is provided by the MPU. The internal level
shifter translates the level according to the voltages applied to pin 3 and pin 12.

(6)

IO_ENABLE

INPUT

This logic input pin forces SIM_IO pin to Low when IO_ENABLE = Low, leaving this
signal High when IO_ENABLE = High. The signal is not latched and the SIM_IO pin is
released to a logic High when IO_ENABLE = High. When this condition is met, the
SIM_IO logic status depends upon the signal presence pin I/O. When the MPU uses
two different channels to exchange data with the SIM card, the IO_ENABLE pin can
be used to as a Write line to the external card, the I/O pin being used to Read data
from the SIM card.

(7)

No Connection. (TSSOP14 Only)

(8)

No Connection. (TSSOP14 Only)

(9)

GND

GROUND

This pin is the GROUND reference for the integrated circuit and associated signals.
High frequency layout techniques are requested to connect the GND pin to the
external functions.

(10)

SIM_RST

OUTPUT

This pin is connected to the RST pin of the card connector. A voltage level translator
adapts the external RESET signal (coming from the MPU) to the smart card.

(11)

SIM_CLK

OUTPUT

This pin is connected to the CLK pin of the card connector. The CLOCK signal
comes from the external clock generator. The internal voltage level shifter adapts the
clock signal flowing through this link. Care must be observed to prevent AC coupling
with adjacent lines and signals PCB tracks.

(12)

SIM_VCC

POWER

This pin is connected to the smart card VCC power supply pin. The voltage, provided
by an external power supply, can range from 2.7 V to 6.0 V. The NCN6011 does not
regulate or protect the voltage supply applied to the external card.

(13)

SIM_I/O

OUTPUT

This pin handles the connection to the serial I/O of the card connector. A
bidirectional voltage level translator adapts the serial I/O signal between the card
and the microcontroller. A 20 k

typical pull up resistor provides a High impedance

state for the SIM card I/O link.

(14)

No Connection. (TSSOP14 Only)

NCN6011

http://onsemi.com

MAXIMUM RATINGS

Rating

Symbol

Value

Unit

Power Supply

7.0 V

External Card and Level Shifter Power Supply

SIM_VCC

7.0 V

Digital Input Voltage
Digital Input Current

RESET,

IO_ENABLE

0.3

1.0

Digital Input Voltage
Digital Input Current

CLOCK

0.3

1.0

Digital Input Voltage
Digital Input Current

I/O

0.3

1.0

Digital Output Voltage
Digital Output Current

SIM_RST

0.3

SIM_VCC

Digital Output/Input Voltage
Digital Output/Input Current

SIM_I/O

0.3

SIM_VCC

Digital Output Voltage
Digital Output Current

SIM_CLK

0.3

SIM_VCC

Human Body Model: R = 1500

, C = 100 pF

SIM card side, pins 7, 8, 9, 10 (10, 11, 12, 13)
All other pins

ESD

4.0
2.0

kV
kV

Micro10 Package

Power Dissipation @ T

= +85

Thermal Resistance Junction to Air

THhja

200
200

C/W

TSSOP14 Package

Power Dissipation @ T

= +85

Thermal Resistance Junction to Air

THhja

320
125

C/W

Operating Ambient Temperature Range

25 to +85

Operating Junction Temperature Range

25 to +125

Maximum Junction Temperature

Jmax

+150

Storage Temperature Range

stg

65 to +150

Maximum electrical ratings define the values beyond which permanent damage(s) may occur internally to the chip regardless of the operating
temperature. Pin numbers in parenthesis are related to the TSSOP14 package.

NCN6011

http://onsemi.com

POWER SUPPLY SECTION

(25

C to +85

C ambient temperature, unless otherwise noted)

(Pin numbers in parenthesis are related to the TSSOP14 package)
(Pin numbers in bold are related to the MIcro10 package)

Rating

Symbol

Pin

Min

Typ

Max

Unit

Power Supply

(3)

2.7

6.0

Standby Supply Current, CLOCK = L, I/O = H,

SIM_VCC = 3.0 V, No SIM Card Inserted

VDD

(3)

0.5

2.0

Input External Power Supply

SIM_VCC

(12)

2.7

6.0

Standby Current, SIM_VCC = 3.0 V, I/O = H,

No SIM Card Inserted, CLOCK = L

VCC

(12)

0.2

0.5

Power Supply Normal Operating Current

@ VDD = +5.0 V, SIM_VCC = +5.0 V,
CLOCK = 5.0 MHz, RESET = H,
IO_ENABLE = H, I/O Data = 100 kHz

(3)

230

Power Supply Normal Operating Current

@ VDD = +5.0 V, SIM_VCC = +5.0 V,
CLOCK = 5.0 MHz, RESET = H,
IO_ENABLE = H, I/O Data = H

(3)

Card Level Shifter Operating Current

@ VDD = +5.0 V, SIM_VCC = +5.0 V,
CLOCK = 5.0 MHz, RESET = H,
IO_ENABLE = H, I/O Data = 100 kHz

(12)

1.50

Card Level Shifter Operating Current

@ VDD = +5.0 V, SIM_VCC = +5.0 V,
CLOCK = 5.0 MHz, RESET = H,
IO_ENABLE = H, I/O Data = H

(12)

1.30

DIGITAL INPUT SECTION: CLOCK, RESET, I/O, IO_ENABLE

(25

C to +85

C ambient temperature, unless otherwise noted) (Note 1)

Rating

Symbol

Pin

Min

Typ

Max

Unit

CLOCK, RESET, IO_ENABLE
High Level Input Voltage
Low Level Input Voltage
Input Rise Time
Input Fall Time
Input Capacitance

tr
tf

Cin

1, 3,

4, 5

(2, 4,

5, 6)

0.7 * V

0.3 * V

50
50
10

V
V

ns
ns

Input @ Duty Cycle = 50%

1% (Note 2)

Clock Rise Time
Clock Fall Time
Input Clock Capacitance

CLOCK

(4)

5.0

50
50
10

MHz

ns
ns

Input/Output Data Transfer Frequency
I/O Rise Time
I/O Fall Time
Input I/O Capacitance

I/O

(2)

160

0.8
0.8

kHz

1. Digital inputs undershoot

0.30 V, Digital inputs overshoot

0.30 V.

2. The SIM_CLK clock can operate up to 10 MHz, but, in this case, the rise and fall time are not guaranteed to be fully within the GSM

specification over the temperature range.

NCN6011

http://onsemi.com

SIM INTERFACE SECTION

(Note 3)

Rating

Symbol

Pin

Min

Typ

Max

Unit

SIM_VCC = +5.0 V

Output RESET V

@ Irst = +200

Output RESET V

@ Irst = 200

Output RESET Rise Time @ Cout = 30 pF
Output RESET Fall Time @ Cout = 30 pF

SIM_VCC = +3.0 V

Output RESET V

@ Irst = +200

Output RESET V

@ Irst = 200

Output RESET Rise Time @ Cout = 30 pF
Output RESET Fall Time @ Cout = 30 pF

SIM_RST

(10)

SIM_VCC 0.7 V

0.8 * SIM_VCC

SIM_VCC

0.6

100
100

SIM_VCC

0.2 * SIM_VCC

100
100

V
V

ns
ns

V
V

ns
ns

SIM_VCC = +5.0 V

Output Duty Cycle @ Fin = 5.0 MHz

DC = 50%

Output SIM_CLK Rise Time @ Cout = 30 pF
Output SIM_CLK Fall Time @ Cout = 30 pF
Output V

@ Iclk = +20

Output V

@ Iclk = 200

SIM_VCC = +3.0 V

Output Duty Cycle @ Fin = 5.0 MHz

DC = 50%

Output SIM_CLK Rise Time @ Cout = 30 pF
Output SIM_CLK Fall Time @ Cout = 30 pF
Output V

@ Iclk = +20

Output V

@ Iclk = 20

SIM_CLK

(11)

0.7 * SIM_VCC

18
18

SIM_VCC

+0.5

18
18

SIM_VCC

0.2 * SIM_VCC

ns
ns

V
V

ns
ns

V
V

SIM_VCC = +5.0 V @ IO_ENABLE = H

SIM_I/O Data Transfer Frequency
SIM_I/O Rise Time @ Cout = 30 pF
SIM_I/O Fall Time @ Cout = 30 pF
Output V

@ ISIM_IO = +20

A, V

= V

Output V

@ ISIM_IO = 1.0 mA, I/O V

= 0 V

SIM_VCC = +3.0 V @ IO_ENABLE = H

SIM_I/O Data Transfer Frequency
SIM_I/O Rise Time @ Cout = 30 pF
SIM_I/O Fall Time @ Cout = 30 pF
Output V

@ ISIM_IO = +20

A, V

= V

Output V

@ ISIM_IO = 1.0 mA, I/O V

= 0 V

SIM_VCC = +5.0 V @ IO_ENABLE = L

SIM_I/O Fall Time @ Cout = 30 pF
Output V

@ ISIM_IO = 1.0 mA, I/O V

= 0 V

SIM_VCC = +3.0 V @ IO_ENABLE = L

SIM_I/O Fall Time @ Cout = 30 pF
Output V

@ ISIM_IO = 1.0 mA, I/O V

= 0 V

SIM_VCC = +5.0 V @ I/O = H,

IO_ENABLE Returns to High
SIM_I/O Rise Time @ Cout = 30 pF

SIM_VCC = +3.0 V @ I/O = H,

IO_ENABLE Returns to High
SIM_I/O Rise Time @ Cout = 30 pF

SIM_I/O

(13)

0.7 * SIM_VCC

150

2.0

1.5

160

0.8
0.8

SIM_VCC

0.4

160

0.8
0.8

SIM_VCC

0.4

800

0.4

800

0.4

kHz

V
V

kHz

V
V

I/O Pull Up Resistor

I/O_

RPLD

(2)

Card I/O Pull Up Resistor

SIM_I/O_

RPLD

(13)

3. SIM logic input undershoot

0.30 V, SIM logic input overshoot

0.30 V.

NCN6011

http://onsemi.com

200

100

250

150

300

1200

(

(V)

Figure 3. SIM Supply Current as a Function of

the V

Voltage, I/O = High

Figure 4. SIM Supply Current as a Function of

the V

Voltage, I/O = 100 kHz Data Transfer

(

1600

1400

1200

1000

800

600

400

200

Figure 5. Power Supply Current as Function of

the V

Input Voltage, I/O = High

(V)

Figure 6. Power Supply Current as Function of

the V

Input Voltage, I/O = 100 kHz Data

Transfer

(V)

(

120

800

1400

600

1000

1600

1800

5 MHz

(V)

100

3 MHz

1 MHz

5 MHz

3 MHz

1 MHz

400

200

5 MHz

3 MHz

1 MHz

5 MHz

3 MHz

1 MHz

NCN6011

http://onsemi.com

Level Shifters

The builtin level shifters accommodate the differential

voltage between the external MPU and the SIM card.
Neither the logic nor the functions of the SIM signals are
affected by the interface.

The NCN6011 does not regulate the SIM_VCC, nor does

it detect the overload current.

Bidirectional Level Shifter

The NCN6011 carries out the voltage difference between

the MPU and the Smart Card I/O signals. When the start
sequence is completed, and if no failures have been detected,
the device becomes essentially transparent for the data
transferred on the I/O line. To fulfill the ISO78163
specification, both sides of the I/O line have builtin pulsed
circuitry to accelerate the signal rise transient. The I/O line
is connected on both sides of the interface by a NMOS
switch which provide the level shifter and, thanks to its
relative high internal impedance, protects the Smart Card in
the event of data collision. Such a situation could occur if
either the MPU of the smart card forces a signal in the
opposite logic level direction.

GND

I/O

200 ns

20 k

SIM_IO

LOGIC

I/O CONTROL

ENABLE

Figure 7. Basic Internal I/O Level Shifter

200 ns

GND

Figure 8. Typical I/O and SIM_IO Waveform,

= V

= 5.0 V, ENABLE = Low

Figure 9. Typical SIM_IO Activated by ENABLE

Pin, I/O = High (open drain)

I/O

SIM_IO

ENABLE

SIM_IO

NCN6011

http://onsemi.com

Input Schmitt Triggers

All the Logic Input pins have builtin Schmitt trigger

circuits to prevent the NCN6011 against uncontrolled
operation. The typical dynamic characteristics of the related
pins are depicted in Figure 10.

The output signal is guaranteed to go High when the input

voltage is above 0.70*Vbat, and will go Low when the input
voltage is below 0.30*Vbat.

Output

bat

OFF

bat

0.70

bat

Figure 10. Typical Schmitt Trigger Characteristic

Input

0.30

bat

ESD Protection

The NCN6011 includes silicon devices to protect the pins

against the ESD spikes voltages. To cope with the different
ESD voltages developed across these pins, the builtin
structures have been designed to handle either 2.0 kV, when
related to the microcontroller side, or 4.0 kV when
connected with the external contacts. Practically, the
SIM_RST, SIMD_CLK and SIM_IO pins can sustain
4.0 kV.

Printed Circuit Board Layout

Since the NCN6011 carries high speed currents together

with high frequency clock, the printed circuit board must be
carefully designed to avoid the risk of uncontrolled
operation of the interface.

Care must be observed to avoid common copper track

sharing small signal and high power with a relative high
impedance. On top of that, the clock signal (both input and
output) shall be properly shielding to minimize the high
frequency cross talk between this line and the rest of the
circuit. In particular, the SIM_RST signal shall be protected
from interference generated by the SIM_CLK line. Such
protection can be achieved by surrounding the SIM_CLK
track by a copper track connected to ground. Generally
speaking, the ground plane shall be as large as possible for
a given printed circuit board area.

Figure 11. Typical NCN6011/TSSOP14 Application

IRQ

MPU or GSM Controller

RESET

I/O

CLOCK

SIM_CLK

SIM_RST

supply

GND

POWER

MANAGEMENT

UNIT

I/O_ENABLE

SIM_IO

SIM_V

GND

CLK

RST

I/O

Swb

Swa

C1
6.8

GND

NCN6011

GND

C3
4.7

C2
100 nF

GND

NCN6011

http://onsemi.com

PACKAGE DIMENSIONS

TSSOP14

DTB SUFFIX

CASE 948G01

ISSUE O

DIM

MIN

MAX

MIN

MAX

INCHES

MILLIMETERS

4.90

5.10

0.193

0.200

4.30

4.50

0.169

0.177

---

1.20

---

0.047

0.05

0.15

0.002

0.006

0.50

0.75

0.020

0.030

0.65 BSC

0.026 BSC

0.50

0.60

0.020

0.024

0.09

0.20

0.004

0.008

0.09

0.16

0.004

0.006

0.19

0.30

0.007

0.012

0.19

0.25

0.007

0.010

6.40 BSC

0.252 BSC

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,

PROTRUSIONS OR GATE BURRS. MOLD FLASH

OR GATE BURRS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD

FLASH OR PROTRUSION. INTERLEAD FLASH OR

PROTRUSION SHALL NOT EXCEED

0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN

EXCESS OF THE K DIMENSION AT MAXIMUM

MATERIAL CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE DETERMINED

AT DATUM PLANE -W-.

0.15 (0.006) T

L/2

0.10 (0.004)

U

SEATING

PLANE

0.10 (0.004)

T

ÇÇ

SECTION NN

DETAIL E

J J1

ÉÉ

DETAIL E

W

0.25 (0.010)

PIN 1
IDENT.

0.15 (0.006) T

V

14X REF

Micro10

DM SUFFIX

CASE 846B02

ISSUE B

0.08 (0.003)

DIM

MIN

MAX

MIN

MAX

INCHES

MILLIMETERS

2.90

3.10

0.114

0.122

2.90

3.10

0.114

0.122

0.95

1.10

0.037

0.043

0.20

0.35

0.008

0.014

0.50 BSC

0.020 BSC

0.05

0.15

0.002

0.006

0.10

0.21

0.004

0.008

4.75

5.05

0.187

0.199

0.40

0.70

0.016

0.028

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A" DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS. MOLD

FLASH, PROTRUSIONS OR GATE BURRS SHALL

NOT EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B" DOES NOT INCLUDE INTERLEAD

FLASH OR PROTRUSION. INTERLEAD FLASH OR

PROTRUSION SHALL NOT EXCEED 0.25 (0.010)

PER SIDE.

5. 846B-01 OBSOLETE. NEW STANDARD 846B-02

B

A

PIN 1 ID

8 PL

0.038 (0.0015)

T

SEATING

PLANE

NCN6011

http://onsemi.com

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be
validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

PUBLICATION ORDERING INFORMATION

JAPAN: ON Semiconductor, Japan Customer Focus Center

4321 NishiGotanda, Shinagawaku, Tokyo, Japan 1410031
Phone: 81357402700
Email: r14525@onsemi.com

ON Semiconductor Website: http://onsemi.com

For additional information, please contact your local
Sales Representative.

NCN6011/D

Literature Fulfillment:

Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 3036752175 or 8003443860 Toll Free USA/Canada
Fax: 3036752176 or 8003443867 Toll Free USA/Canada
Email: ONlit@hibbertco.com

N. American Technical Support: 8002829855 Toll Free USA/Canada

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: NCN6011DTB

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: NCN6011DTB