Semiconductor Components Industries, LLC, 2005
October, 2005 - Rev. 0
1
Publication Order Number:
NCP2892/D
NCP2892
1.0 Watt Audio Power
Amplifier with Fast Turn On
Time
The NCP2892 is an audio power amplifier designed for portable
communication device applications such as mobile phone
applications. The NCP2892 is capable of delivering 1.0 W of
continuous average power to an 8.0
W BTL load from a 5.0 V power
supply, and 320 mW to a 4.0
W BTL load from a 2.6 V power supply.
The NCP2892 provides high quality audio while requiring few
external components and minimal power consumption. It features a
low-power consumption shutdown mode, which is achieved by
driving the SHUTDOWN pin with logic low.
The NCP2892 contains circuitry to prevent from "pop and click"
noise that would otherwise occur during turn-on and turn-off
transitions.
For maximum flexibility, the NCP2892 provides an externally
controlled gain (with resistors), as well as an externally controlled
turn-on time (with the bypass capacitor). When using a 1
mF bypass
capacitor, it offers 100 ms wake up time.
Due to its excellent PSRR, it can be directly connected to the
battery, saving the use of an LDO.
This device is available in a 9-Pin Flip-Chip CSP (Lead-Free).
Features
Pb-Free Packages are Available
1.0 W to an 8.0
W BTL Load from a 5.0 V Power Supply
Excellent PSRR: Direct Connection to the Battery
"Pop and Click" Noise Protection Circuit
Ultra Low Current Shutdown Mode: 10 nA
2.2 V-5.5 V Operation
External Gain Configuration Capability
External Turn-on Time Configuration Capability:
100 ms (1
mF Bypass Capacitor)
Up to 1.0 nF Capacitive Load Driving Capability
Thermal Overload Protection Circuitry
Typical Applications
Portable Electronic Devices
PDAs
Wireless Phones
9-Pin Flip-Chip CSP
FC SUFFIX
CASE 499E
PIN CONNECTIONS
MAX
= Specific Device Code
Z
= Assembly Location
Y
= Year
WW
= Work Week
MARKING
DIAGRAMS
A3
B3
C3
A2
B2
C2
A1
B1
C1
INM
OUTA
INP
VM_P
VM
V
p
BYPASS
OUTB SHUTDOWN
9-Pin Flip-Chip CSP
(Top View)
1
See detailed ordering and shipping information in the package
dimensions section on page 15 of this data sheet.
ORDERING INFORMATION
MAX
ZYWW
A1
A3
C1
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2
Figure 1. Typical Audio Amplifier Application Circuit with Single Ended Input
+
-
+
-
V
p
INM
V
p
V
p
300 k
W
300 k
W
8
W
OUTA
OUTB
R1
20 k
W
R2
20 k
W
INP
BYPASS
20 k
W
1
m
F
390 nF
VM
VM_P
SHUTDOWN
CONTROL
C
bypass
20 k
W
1
m
F
Cs
SHUTDOWN
Rf
Ri
Ci
AUDIO
INPUT
VIH
VIL
Figure 2. Typical Audio Amplifier Application Circuit with a Differential Input
+
-
+
-
V
p
INM
V
p
V
p
300 k
W
300 k
W
8
W
OUTA
OUTB
R1
20 k
W
R2
20 k
W
INP
BYPASS
20 k
W
1
m
F
390 nF
VM
VM_P
SHUTDOWN
CONTROL
C
bypass
20 k
W
1
m
F
Cs
SHUTDOWN
Rf
Ri
Ci
AUDIO
INPUT
VIH
VIL
20 k
W
390 nF
Ri
Ci
+
-
20 k
W
Rf
This device contains 671 active transistors and 1899 MOS gates.
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3
PIN DESCRIPTION
Pin
Type
Symbol
Description
A1
I
INM
Negative input of the first amplifier, receives the audio input signal. Connected to the
feedback resistor R
f
and to the input resistor R
in
.
A2
O
OUTA
Negative output of the NCP2892. Connected to the load and to the feedback resistor Rf.
A3
I
INP
Positive input of the first amplifier, receives the common mode voltage.
B1
I
VM_P
Power Analog Ground.
B2
I
VM
Core Analog Ground.
B3
I
V
p
Positive analog supply of the cell. Range: 2.2 V-5.5 V.
C1
I
BYPASS
Bypass capacitor pin which provides the common mode voltage (Vp/2).
C2
O
OUTB
Positive output of the NCP2892. Connected to the load.
C3
I
SHUTDOWN
The device enters in shutdown mode when a low level is applied on this pin.
MAXIMUM RATINGS
(Note 1)
Rating
Symbol
Value
Unit
Supply Voltage
V
p
6.0
V
Operating Supply Voltage
Op Vp
2.2 to 5.5 V
2.0 V = Functional Only
-
Input Voltage
V
in
-0.3 to Vcc +0.3
V
Max Output Current
Iout
500
mA
Power Dissipation (Note 2)
Pd
Internally Limited
-
Operating Ambient Temperature
T
A
-40 to +85
C
Max Junction Temperature
T
J
150
C
Storage Temperature Range
T
stg
-65 to +150
C
Thermal Resistance Junction-to-Air
R
q
JA
(Note 3)
C/W
ESD Protection
Human Body Model (HBM) (Note 4)
Machine Model (MM) (Note 5)
-
8000
>250
V
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values
(not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage
may occur and reliability may be affected.
1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at T
A
= +25
C.
2. The thermal shutdown set to 160
C (typical) avoids irreversible damage on the device due to power dissipation. For further information see
page 10.
3. The R
q
JA
is highly dependent of the PCB Heatsink area. For example, R
q
JA
can equal 195
C/W with 50 mm
2
total area and also 135
C/W with
500 mm
2
. For further information see page 10. The bumps have the same thermal resistance and all need to be connected to optimize the power
dissipation.
4. Human Body Model, 100 pF discharge through a 1.5 k
W
resistor following specification JESD22/A114.
5. Machine Model, 200 pF discharged through all pins following specification JESD22/A115.
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4
ELECTRICAL CHARACTERISTICS
Limits apply for T
A
between -40
C to +85
C (Unless otherwise noted).
Characteristic
Symbol
Conditions
Min
(Note 6)
Typ
Max
(Note 6)
Unit
Supply Quiescent Current
I
dd
V
p
= 2.6 V, No Load
V
p
= 5.0 V, No Load
-
-
1.5
1.7
4
mA
V
p
= 2.6 V, 8
W
V
p
= 5.0 V, 8
W
-
-
1.7
1.9
5.5
Common Mode Voltage
V
cm
-
-
V
p
/2
-
V
Shutdown Current
I
SD
T
A
= +25
C
T
A
= -40
C to +85
C
-
0.01
0.5
1.0
m
A
Shutdown Voltage High
V
SDIH
-
1.2
-
-
V
Shutdown Voltage Low
V
SDIL
-
-
-
0.4
V
Turning On Time (Note 8)
T
WU
C
by
= 1
m
F
-
90
-
ms
Output Swing
V
loadpeak
V
p
= 2.6 V, R
L
= 8.0
W
V
p
= 5.0 V, R
L
= 8.0
W
(Note 7)
T
A
= +25
C
T
A
= -40
C to +85
C
1.6
4.0
3.85
2.12
4.15
-
-
V
Rms Output Power
P
O
V
p
= 2.6 V, R
L
= 4.0
W
THD + N < 0.1%
V
p
= 2.6 V, R
L
= 8.0
W
THD + N < 0.1%
V
p
= 5.0 V, R
L
= 8.0
W
THD + N < 0.1%
-
-
0.36
0.28
1.08
-
-
W
Maximum Power Dissipation (Note 8)
P
Dmax
V
p
= 5.0 V, R
L
= 8.0
W
-
-
0.65
W
Output Offset Voltage
V
OS
V
p
= 2.6 V
V
p
= 5.0 V
-30
30
mV
Signal-to-Noise Ratio
SNR
V
p
= 2.6 V, G = 2.0
10 Hz < F < 20 kHz
V
p
= 5.0 V, G = 10
10 Hz < F < 20 kHz
-
-
84
77
-
-
dB
Positive Supply Rejection Ratio
PSRR V+
G = 2.0, R
L
= 8.0
W
Vp
ripple_pp
= 200 mV
C
by
= 1.0
m
F
Input Terminated with 10
W
F = 217 Hz
V
p
= 5.0 V
V
p
= 3.0 V
V
p
= 2.6 V
F = 1.0 kHz
V
p
= 5.0 V
V
p
= 3.0 V
V
p
= 2.6 V
-
-
-
-
-
-
-64
-72
-73
-64
-74
-75
-
-
-
-
-
-
dB
Efficiency
h
V
p
= 2.6 V, P
orms
= 320 mW
V
p
= 5.0 V, P
orms
= 1.0 W
-
-
48
63
-
-
%
Thermal Shutdown Temperature (Note 9)
T
sd
140
160
180
C
Total Harmonic Distortion
THD
V
p
= 2.6, F = 1.0 kHz
R
L
= 4.0
W,
A
V
= 2.0
P
O
= 0.32 W
V
p
= 5.0 V, F = 1.0 kHz
R
L
= 8.0
W,
A
V
= 2.0
P
O
= 1.0 W
-
-
-
-
-
-
-
0.04
-
-
0.02
-
-
-
-
-
-
-
%
6. Min/Max limits are guaranteed by design, test or statistical analysis.
7. This parameter is guaranteed but not tested in production in case of a 5.0 V power supply.
8. See page 12 for a theoretical approach of this parameter.
9. For this parameter, the Min/Max values are given for information.
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5
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 1. THD + N versus Frequency
10
100
1000
10,000
100,000
1
0.001
0.1
T
H
D
+ N (%)
FREQUENCY (Hz)
Figure 2. THD + N versus Frequency
10
100
1000
10,000
100,000
1
0.001
0.1
THD + N (%)
FREQUENCY (Hz)
V
p
= 5 V
R
L
= 8
W
P
out
= 250 mW
A
V
= 2
V
p
= 3.3 V
R
L
= 8
W
P
out
= 150 mW
A
V
= 2
Figure 3. THD + N versus Frequency
10
100
1000
10,000
100,000
1
0.001
0.1
THD + N (%)
FREQUENCY (Hz)
Figure 4. THD + N versus Frequency
10
100
1000
10,000
100,000
1
0.001
0.1
THD + N (%)
FREQUENCY (Hz)
V
p
= 3 V
R
L
= 8
W
P
out
= 250 mW
A
V
= 2
V
p
= 2.6 V
R
L
= 8
W
P
out
= 100 mW
A
V
= 2
Figure 5. THD + N versus Frequency
10
100
1000
10,000
100,000
1
0.001
0.1
THD + N (%)
FREQUENCY (Hz)
Figure 6. THD + N versus Power Out
0
200
400
1000
1400
10
0.001
0.1
THD + N (%)
P
out
, POWER OUT (mW)
V
p
= 2.6 V
R
L
= 4
W
P
out
= 100 mW
A
V
= 2
V
p
= 5 V
R
L
= 8
W
1 kHz
A
V
= 2
1
600
800
1200
0.01
0.01
0.01
0.01
0.01
0.01
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TYPICAL PERFORMANCE CHARACTERISTICS
Figure 7. THD + N versus Power Out
0
100
10
0.001
0.1
T
H
D
+ N (%)
P
out
, POWER OUT (mW)
Figure 8. THD + N versus Power Out
0
100
200
300
10
0.001
0.1
THD + N (%)
P
out
, POWER OUT (mW)
V
p
= 3.3 V
R
L
= 8
W
1 kHz
A
V
= 2
V
p
= 3 V
R
L
= 8
W
1 kHz
A
V
= 2
Figure 9. THD + N versus Power Out
0
100
200
300
400
10
0.001
0.1
THD + N (%)
P
out
, POWER OUT (mW)
Figure 10. THD + N versus Power Out
0
100
200
300
500
10
0.01
0.1
THD + N (%)
P
out
, POWER OUT (mW)
V
p
= 2.6 V
R
L
= 8
W
1 kHz
A
V
= 2
V
p
= 2.6 V
R
L
= 4
W
1 kHz
A
V
= 2
Figure 11. Output Power versus Power Supply
2.0
3.5
4.0
4.5
5.0
1700
100
700
OUTPUT POWER (mW)
POWER SUPPLY (V)
1
200
300
400
500
600
1
400
500
1
1
300
500
1100
1500
0.01
0.01
0.01
400
Figure 12. P
SRR
@ V
p
= 5 V
10
100
1000
10,000
100,000
-30
-70
-50
P
SR
R
(dB)
FREQUENCY (Hz)
-65
-60
-55
-45
-40
-35
V
p
= 5 V
R
L
= 8
W
R
in
= 10
W
A
V
= 2
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
THD+N = 10%
THD+N = 1%
f = 1 kHz
R
L
= 8
W
900
1300
3.0
2.5
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TYPICAL PERFORMANCE CHARACTERISTICS
10
100
-25
-55
P
SR
R
(dB)
FREQUENCY (Hz)
10
100
1000
-10
-100
-90
P
SR
R
(dB)
FREQUENCY (Hz)
10
100
1000
10,000
100,000
-30
-80
-75
P
SR
R
(dB)
FREQUENCY (Hz)
10
100
1000
10,000
100,000
-25
-70
-50
P
SR
R
(dB)
FREQUENCY (Hz)
-35
1000
10,000
100,000
-50
10,000
100,000
-55
-65
-60
-55
-45
-40
-35
V
p
= 3 V
R
L
= 8
W
R
in
= 10
W
A
V
= 4
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
-65
-60
-50
-45
-40
V
p
= 5 V
R
L
= 8
W
R
in
= 10
W
A
V
= 4
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
-80
-70
-60
-30
-40
V
p
= 5 V
R
L
= 8
W
R
in
= Float
A
V
= 4
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
-70
-65
-60
-50
-45
-40
-35
V
p
= 3 V
R
L
= 8
W
R
in
= 10
W
A
V
= 2
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
10
100
1000
-20
-90
P
SR
R
(dB)
FREQUENCY (Hz)
-50
10,000
100,000
-80
-70
-60
-30
-40
V
p
= 3 V
R
L
= 8
W
R
in
= Float
A
V
= 2
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
-100
-30
-20
-30
Figure 13. P
SRR
@ V
p
= 5 V
10
100
10,000
100,000
-20
-100
-90
P
SR
R
(dB)
FREQUENCY (Hz)
-50
1000
-80
-70
-60
-30
-40
V
p
= 5 V
R
L
= 8
W
R
in
= Float
A
V
= 2
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
Figure 14. P
SRR
@ V
p
= 5 V
Figure 15. P
SRR
@ V
p
= 5 V
Figure 16. P
SRR
@ V
p
= 3 V
Figure 17. P
SRR
@ V
p
= 3 V
Figure 18. P
SRR
@ V
p
= 3 V
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TYPICAL PERFORMANCE CHARACTERISTICS
10
100
-30
-75
-55
P
SR
R
(dB)
FREQUENCY (Hz)
10
100
1000
-20
-100
-90
P
SR
R
(dB)
FREQUENCY (Hz)
10
100
1000
10,000
100,000
-30
-80
-75
P
SR
R
(dB)
FREQUENCY (Hz)
10
100
1000
10,000
100,000
-30
-70
-50
P
SR
R
(dB)
FREQUENCY (Hz)
-35
1000
10,000
100,000
-50
10,000
100,000
-55
-65
-60
-55
-45
-40
-35
V
p
= 5 V
R
L
= 8
W
R
in
= 10
W
A
V
= 2
V
ripple
= 200 mV
pk-pk
-70
-65
-60
-50
-45
-40
V
p
= 3.3 V
R
L
= 8
W
R
in
= 10
W
A
V
= 2
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
-80
-70
-60
-30
-40
V
p
= 3.3 V
R
L
= 8
W
R
in
= Float
A
V
= 2
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
-70
-65
-60
-50
-45
-40
-35
V
p
= 2.6 V
R
L
= 8
W
R
in
= 10
W
A
V
= 2
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
10
100
1000
-20
-90
P
SR
R
(dB)
FREQUENCY (Hz)
-50
10,000
100,000
-80
-70
-60
-30
-40
V
p
= 2.6 V
R
L
= 8
W
R
in
= Float
A
V
= 2
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
-100
1
m
F
2.2
m
F
Figure 19. P
SRR
@ V
p
= 3 V
10
100
1000
10,000
100,000
-100
-90
P
SR
R
(dB)
FREQUENCY (Hz)
-80
-70
-60
-50
-40
-30
-20
V
p
= 3 V
R
L
= 8
W
R
in
= Float
A
V
= 4
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
-10
Figure 20. P
SRR
@ V
p
= 3.3 V
Figure 21. P
SRR
@ V
p
= 3.3 V
Figure 22. P
SRR
@ V
p
= 2.6 V
Figure 23. P
SRR
@ V
p
= 2.6 V
Figure 24. P
SRR
versus C
bypass
@ V
p
= 5 V
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TYPICAL PERFORMANCE CHARACTERISTICS
DC OUTPUT VOLTAGE (V)
DC OUTPUT VOLTAGE (V)
-2.5
-1.5
-1
0.5
2.5
0
-80
-60
P
SR
R
(dB)
DC OUTPUT VOLTAGE (V)
-20
-2
-0.5
0
1
1.5
2
-70
-50
-30
-40
-10
V
p
= 2.6 V
R
L
= 8
W
F = 217 Hz
A
V
= 2
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
-5
-3
-2
1
5
0
-80
-60
P
SR
R
(dB)
-20
-4
-1
0
2
3
4
-70
-50
-30
-40
-10
V
p
= 5 V
R
L
= 8
W
F = 217 Hz
A
V
= 2
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
-2.5
-1.5
-1
0.5
2.5
0
-90
-60
P
SR
R
(dB)
-20
-2
-0.5
0
1
1.5
2
-70
-50
-30
-40
-10
V
p
= 3 V
R
L
= 8
W
F = 217 Hz
A
V
= 2
V
ripple
= 200 mV
pk-pk
C
bypass
= 1
m
F
-80
Figure 25. P
SRR
versus C
bypass
@ V
p
= 3 V
10
100
1000
10,000
100,000
-30
-80
-75
P
SR
R
(dB)
FREQUENCY (Hz)
-55
-70
-65
-60
-50
-45
-40
-35
V
p
= 3 V
R
L
= 8
W
R
in
= 10
W
A
V
= 2
V
ripple
= 200 mV
pk-pk
1
m
F
2.2
m
F
Figure 26. P
SRR
@ DC Output Voltage
Figure 27. P
SRR
@ DC Output Voltage
Figure 28. P
SRR
@ DC Output Voltage
Figure 29. T
ON
versus C
bypass
@ V
bat
= 3.6 V,
T
A
= +25
5
C
Figure 30. T
ON
versus Temperature @ V
bat
= 3.6 V,
C
bypass
= 1
m
F
C
bypass
(nF)
400
800
1600
180
0
60
T
urn ON (ms)
140
1200
2000
40
80
120
100
160
20
0
TEMPERATURE (
C)
-25
25
75
50
70
T
urn ON (ms)
0
50
100
125
90
80
120
100
60
-50
110
V
bat
= 5.5 V
V
bat
= 3.6 V
V
bat
= 2.5 V
NCP2892
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10
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 31. T
ON
vs. V
bat
@ C
bypass
= 1
m
F,
T
A
= +25
5
C
2.5
3.0
96
76
78
T
urn
ON (ms)
V
bat
, (V)
Figure 32. Power Dissipation versus Output
Power
0
0.1
0.2
0.3
0.3
0
0.1
P
D
, POWER DISSIP
A
TION (W)
P
out
, OUTPUT POWER (W)
V
p
= 3.3 V
R
L
= 8
W
F = 1 kHz
THD + N < 0.1%
Figure 33. Power Dissipation versus Output
Power
0
0.1
0.2
0.3
0.4
0.25
0
0.05
P
D
, POWER DISSIP
A
TION (W)
P
out
, OUTPUT POWER (W)
Figure 34. Power Dissipation versus Output
Power
0
0.05
0.1
0.15
0.4
0.4
0
0.1
P
D
, POWER DISSIP
A
TION (W)
P
out
, OUTPUT POWER (W)
V
p
= 3 V
R
L
= 8
W
F = 1 kHz
THD + N < 0.1%
Figure 35. Power Dissipation versus Output
Power
0
20
160
700
0
P
D
, POWER DISSIP
A
TION (mW)
T
A
, AMBIENT TEMPERATURE (
C)
Figure 36. Power Derating - 9-Pin Flip-Chip CSP
86
3.5
4.0
4.5
5.0
5.5
0.2
0.4
0.5
0.1
100
200
300
400
500
600
P
Dmax
= 633 mW
for V
p
= 5 V,
R
L
= 8
W
80
82
84
88
0.05
0.15
0.25
0.15
0.2
0.2
0.25
0.3
0.35
0.05
0.2
0.15
0.3
0.25
0.35
V
p
= 2.6 V
F = 1 kHz
THD + N < 0.1%
R
L
= 8
W
R
L
= 4
W
40
60
80
100
120
140
PCB Heatsink Area
500 mm
2
50 mm
2
200 mm
2
90
92
94
0
0.2
0.7
0
0.1
P
D
, POWER DISSIP
A
TION (W)
P
out
, OUTPUT POWER (W)
V
p
= 5 V
R
L
= 8
W
F = 1 kHz
THD + N < 0.1%
0.5
0.4
0.6
0.8
1
1.2
0.2
0.3
0.4
0.6
NCP2892
http://onsemi.com
11
Figure 37. Maximum Die Temperature versus
PCB Heatsink Area
50
100
250
180
40
60
D
I
E
TEMPERA
TURE (
C) @
AMBIENT TEMPERA
TURE 25
C
PCB HEATSINK AREA (mm
2
)
120
150
200
80
100
160
140
300
Maximum Die Temperature 150
C
V
p
= 2.6 V
V
p
= 5 V
V
p
= 3.3 V
V
p
= 4.2 V
R
L
= 8
W
NCP2892
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12
APPLICATION INFORMATION
Detailed Description
The NCP2892 audio amplifier can operate under 2.6 V
until 5.5 V power supply. It delivers 320 mW rms output
power to 4.0
W load (V
p
= 2.6 V) and 1.0 W rms output
power to 8.0
W load (V
p
= 5.0 V).
The structure of the NCP2892 is basically composed of
two identical internal power amplifiers; the first one is
externally configurable with gain-setting resistors R
in
and
R
f
(the closed-loop gain is fixed by the ratios of these
resistors) and the second is internally fixed in an inverting
unity-gain configuration by two resistors of 20 k
W. So the
load is driven differentially through OUTA and OUTB
outputs. This configuration eliminates the need for an
output coupling capacitor.
Internal Power Amplifier
The output PMOS and NMOS transistors of the amplifier
were designed to deliver the output power of the
specifications without clipping. The channel resistance
(R
on
) of the NMOS and PMOS transistors does not exceed
0.6
W when they drive current.
The structure of the internal power amplifier is
composed of three symmetrical gain stages, first and
medium gain stages are transconductance gain stages to
obtain maximum bandwidth and DC gain.
Turn-On and Turn-Off Transitions
A cycle with a turn-on and turn-off transition is
illustrated with plots that show both single ended signals on
the previous page.
In order to eliminate "pop and click" noises during
transitions, output power in the load must be slowly
established or cut. When logic high is applied to the
shutdown pin, the bypass voltage begins to rise
exponentially and once the output DC level is around the
common mode voltage, the gain is established slowly
(50 ms). This way to turn-on the device is optimized in
terms of rejection of "pop and click" noises.
The device has the same behavior when it is turned-off
by a logic low on the shutdown pin. During the shutdown
mode, amplifier outputs are connected to the ground.
When a shutdown low level is applied, it takes 350 ms
before the DC output level is tied to Ground. However, as
shown on Figure 30, the turn off time of the audio signal is
40 ms.
With 1
mF bypass capacitor, turn on time is set to 90 ms.
Refer to Figures 29 through 31 for a complete study of this
parameter. This fast turn on time added to a very low
shutdown current saves battery life and brings flexibility
when designing the audio section of the final application.
Shutdown Function
The device enters shutdown mode when shutdown signal
is low. During the shutdown mode, the DC quiescent
current of the circuit does not exceed 100 nA.
Current Limit Circuit
The maximum output power of the circuit (Porms =
1.0 W,
V
p
= 5.0 V, R
L
= 8.0
W) requires a peak current in
the load of 500 mA.
In order to limit the excessive power dissipation in the
load when a short-circuit occurs, the current limit in the
load is fixed to 800 mA. The current in the four output MOS
transistors are real-time controlled, and when one current
exceeds 800 mA, the gate voltage of the MOS transistor is
clipped and no more current can be delivered.
Thermal Overload Protection
Internal amplifiers are switched off when the
temperature exceeds 160
C, and will be switched on again
only when the temperature decreases fewer than 140
C.
The NCP2892 is unity-gain stable and requires no
external components besides gain-setting resistors, an
input coupling capacitor and a proper bypassing capacitor
in the typical application.
The first amplifier is externally configurable (R
f
and
R
in
), while the second is fixed in an inverting unity gain
configuration.
The differential-ended amplifier presents two major
advantages:
- The possible output power is four times larger (the
output swing is doubled) as compared to a single-ended
amplifier under the same conditions.
- Output pins (OUTA and OUTB) are biased at the same
potential V
p
/2, this eliminates the need for an output
coupling capacitor required with a single-ended
amplifier configuration.
The differential closed loop-gain of the amplifier is
given by
Avd
+
2 *
Rf
Rin
+
Vorms
Vinrms
.
Output power delivered to the load is given by
Porms
+
(Vopeak)2
2 * RL
(Vopeak is the peak differential
output voltage).
When choosing gain configuration to obtain the desired
output power, check that the amplifier is not current limited
or clipped.
The maximum current which can be delivered to the load
is 500 mA
Iopeak
+
Vopeak
RL
.
NCP2892
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13
Gain-Setting Resistor Selection (R
in
and R
f
)
R
in
and R
f
set the closed-loop gain of the amplifier.
In order to optimize device and system performance, the
NCP2892 should be used in low gain configurations.
The low gain configuration minimizes THD + noise
values and maximizes the signal to noise ratio, and the
amplifier can still be used without running into the
bandwidth limitations.
A closed loop gain in the range from 2 to 5 is
recommended to optimize overall system performance.
An input resistor (R
in
) value of 22 k
W is realistic in most
of applications, and doesn't require the use of a too large
capacitor C
in
.
Input Capacitor Selection (C
in
)
The input coupling capacitor blocks the DC voltage at
the amplifier input terminal. This capacitor creates a
high-pass filter with R
in
, the cut-off frequency is given by
fc
+
1
2 *
P
* Rin * Cin
.
The size of the capacitor must be large enough to couple
in low frequencies without severe attenuation. However a
large input coupling capacitor requires more time to reach
its quiescent DC voltage (V
p
/2) and can increase the
turn-on pops.
An input capacitor value between 0.1
m and 0.39 mF
performs well in many applications (With R
in
= 22 K
W).
Bypass Capacitor Selection (Cby)
The bypass capacitor Cby provides half-supply filtering
and determines how fast the NCP2892 turns on.
This capacitor is a critical component to minimize the
turn-on pop. A 1.0
mF bypass capacitor value
(C
in
= < 0.39
mF) should produce clickless and popless
shutdown transitions. The amplifier is still functional with
a 0.1
mF capacitor value but is more susceptible to "pop and
click" noises.
Thus, a 1.0
mF bypassing capacitor is recommended.
Figure 38. Schematic of the Demonstration Board of the 9-Pin Flip-Chip CSP Device
+
-
+
-
V
p
INM
V
p
V
p
300 k
W
300 k
W
8
W
OUTA
OUTB
20 k
W
20 k
W
INP
BYPASS
20 k
W
1
m
F
390 nF
VM
VM_P
SHUTDOWN
CONTROL
C3
1
m
F
C1
SHUTDOWN
R2
C2
AUDIO
INPUT
V
p
R3
20 k
W
R4*
R1
100 k
W
C4*
* R4, C4: Not Mounted
NCP2892
http://onsemi.com
14
Figure 39. Demonstration Board for 9-Pin Flip-Chip CSP Device - PCB Layers
Silkscreen Layer
Top Layer
Bottom Layer
NCP2892
http://onsemi.com
15
BILL OF MATERIAL
Item
Part Description
Ref.
PCB
Footprint
Manufacturer
Manufacturer
Reference
1
NCP2892 Audio Amplifier
-
-
ON Semiconductor
NCP2892
2
SMD Resistor 100 K
W
R1
0805
Vishay-Draloric
D12CRCW Series
3
SMD Resistor 20 K
W
R2, R3
0805
Vishay-Draloric
CRCW0805 Series
4
Ceramic Capacitor 1.0
m
F 16 V X7R
C1
1206
Murata
GRM42-6X7R105K16
5
Ceramic Capacitor 390 nF 50 V Z5U
C2
1812
Kemet
C1812C394M5UAC
6
Ceramic Capacitor 1.0
m
F 16 V X7R
C3
1206
Murata
GRM42-6X7R105K16
7
Not Mounted
R4, C4
-
-
-
8
BNC Connector
J3
-
Telegartner
JO1001A1948
9
I/O Connector. It can be plugged by BLZ5.08/2
(Weidmller Reference)
J4, J5
-
Weidmller
SL5.08/2/90B
ORDERING INFORMATION
Device
Marking
Package
Shipping
NCP2892AFCT2G
MAX
9-Pin Flip-Chip CSP
(Pb-Free)
3000/Tape and Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NOTE: The NCP2892AFCT2G version requires a lead-free solder paste and should not be used with a SnPb solder paste.
NCP2892
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16
PACKAGE DIMENSIONS
DIM
MIN
MAX
MILLIMETERS
A
0.540
0.660
A1
0.210
0.270
A2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
E
D
-A-
-B-
0.10 C
A2
A
A1
-C-
0.05 C
0.10 C
4 X
SEATING
PLANE
D1
e
E1
e
0.05 C
0.03 C
A B
9 X
b
C
B
A
1
2
3
D
1.450 BSC
E
0.330
0.390
b
0.290
0.340
e
0.500 BSC
D1
1.000 BSC
E1
1.000 BSC
1.450 BSC
9-PIN FLIP-CHIP CSP
FC SUFFIX
CASE 499E-01
ISSUE O
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
mm
inches
SCALE 20:1
0.265
0.01
0.50
0.0197
0.50
0.0197
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 800-282-9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051
Phone: 81-3-5773-3850
NCP2892/D
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082-1312 USA
Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada
Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
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