Semiconductor Components Industries, LLC, 2004
August, 2004 - Rev. 8
1
Publication Order Number:
NCV4275/D
NCV4275
5.0 V Low-Drop Voltage
Regulator
This industry standard linear regulator has the capability to drive
loads up to 450 mA at 5.0 V. It is available in DPAK and D
2
PAK.
This device is pin-for-pin compatible with Infineon part number
TLE4275.
Features
5.0 V,
2%, 450 mA Output Voltage
Very Low Current Consumption
Active RESET
Reset Low Down to V
Q
= 1.0 V
500 mV (max) Dropout Voltage
Fault Protection
+45 V Peak Transient Voltage
-42 V Reverse Voltage
Short Circuit
Thermal Overload
NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
+
-
I
D
Q
GND
RO
Current Limit and
Saturation Sense
Bandgap
Reference
Thermal
Shutdown
Reset
Generator
Figure 1. Block Diagram
Error
Amplifier
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D
2
PAK
5-PIN
DS SUFFIX
CASE 936A
1
5
DPAK
5-PIN
DT SUFFIX
CASE 175AA
Pin 1. I
2. RO
Tab, 3. GND*
4. D
5. Q
* Tab is connected to
Pin 3 on all packages
Device
Package
Shipping
ORDERING INFORMATION
NCV4275DT
DPAK
75 Units/Rail
NCV4275DTRK
DPAK
2500 Tape & Reel
NCV4275DS
D
2
PAK
50 Units/Rail
NCV4275DSR4
D
2
PAK
800 Tape & Reel
1
5
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
MARKING
DIAGRAMS
NCV4275
AWLYYWW
1
4275
ALYWW
x
1
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW
= Work Week
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2
PIN FUNCTION DESCRIPTION
Pin No.
Symbol
Description
1
I
Input; Battery Supply Input Voltage. Bypass to ground with a ceramic capacitor.
2
RO
Reset Output; Open Collector Active Reset (accurate when I > 1.0 V).
3
GND
Ground; Pin 3 internally connected to tab.
4
D
Reset Delay; timing capacitor to GND for Reset Delay function.
5
Q
Output;
2.0%, 450 mA output. Use 22
m
F, ESR < 5.0
to ground.
MAXIMUM RATINGS
Rating
Min
Max
Unit
Input [I (DC)]
-42
45
V
Input [I (Peak Transient Voltage)]
-
45
V
Output (Q)
-1.0
16
V
Reset Output (RO)
-0.3
25
V
Reset Output (RO)
-5.0
5.0
mA
Reset Delay (D)
-0.3
7.0
V
Reset Delay (D)
-2.0
2.0
mA
Operating Range (I)
5.5
42
V
ESD Susceptibility (Human Body Model)
2.0
-
kV
Junction Temperature
-40
150
C
Storage Temperature
-55
150
C
Lead Temperature Soldering
Reflow (SMD styles only) Note 1
Wave Solder (through hole styles only) Note 2
-
-
240 Peak
(Note 3)
260 Peak
C
C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values
(not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage
may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Parameter
Test Conditions (Typical Value)
Unit
DPAK 5-PIN PACKAGE
Min Pad Board (Note 4)
1
Pad Board (Note 5)
Junction-to-Tab (psi-JLx,
y
JLx
)
4.2
4.7
C/W
Junction-to-Ambient (R
q
JA
,
q
JA
)
100.9
46.8
C/W
D
2
PAK 5-PIN PACKAGE
0.4 sq. in. Spreader Board (Note 6)
1.2 sq. in. Spreader Board (Note 7)
Junction-to-Tab (psi-JLx,
y
JLx
)
3.8
4.0
C/W
Junction-to-Ambient (R
q
JA
,
q
JA
)
74.8
41.6
C/W
1. 60 seconds max above 183
C.
2. 10 seconds max.
3. -5
C/+0
C allowable conditions.
4. 1 oz. copper, 0.26 inch
2
(168 mm
2
) copper area, 0.62
thick FR4.
5. 1 oz. copper, 1.14 inch
2
(736 mm
2
) copper area, 0.62
thick FR4.
6. 1 oz. copper, 0.373 inch
2
(241 mm
2
) copper area, 0.62
thick FR4.
7. 1 oz. copper, 1.222 inch
2
(788 mm
2
) copper area, 0.62
thick FR4.
During the voltage range which exceeds the maximum tested voltage of I, operation is assured, but not specified. Wider limits may apply. Thermal
dissipation must be observed closely.
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3
ELECTRICAL CHARACTERISTICS
(I = 13.5 V; -40
C < T
J
< 150
C; unless otherwise noted)
Characteristic
Test Conditions
Min
Typ
Max
Unit
Output
Output Voltage
5.0 mA < I
Q
< 400 mA, 6.0 V < V
I
< 28 V
4.9
5.0
5.1
V
Output Voltage
5.0 mA < I
Q
< 200 mA, 6.0 V < V
I
< 40 V
4.9
5.0
5.1
V
Output Current Limitation
-
450
700
-
mA
Quiescent Current, I
q
= I
I
- I
Q
I
Q
= 1.0 mA
-
150
200
m
A
Quiescent Current, I
q
= I
I
- I
Q
I
Q
= 250 mA
-
10
15
mA
Quiescent Current, I
q
= I
I
- I
Q
I
Q
= 400 mA
-
23
35
mA
Dropout Voltage
I
Q
= 300 mA, V
dr
= V
I
- V
Q
-
250
500
mV
Load Regulation
I
Q
= 5.0 mA to 400 mA
-30
15
30
mV
Line Regulation
V = 8.0 V to 32 V, I
Q
= 5.0 mA
-25
5.0
25
mV
Power Supply Ripple Rejection
f
r
= 100 Hz, V
r
= 0.5 V
pp
-
60
-
dB
Temperature Output Voltage Drift
-
-
0.5
-
mV/k
Reset Timing D and Output RO
Reset Switching Threshold
-
4.5
4.65
4.8
V
Reset Output Low Voltage
R
ext
> 5.0 k, V
Q
> 1.0 V
-
0.2
0.4
V
Reset Output Leakage Current
V
ROH
= 5.0 V
-
0
10
m
A
Reset Charging Current
V
D
= 1.0 V
3.0
5.5
9.0
m
A
Upper Timing Threshold
-
1.5
1.8
2.2
V
Lower Timing Threshold
-
0.2
0.4
0.7
V
Reset Delay Time
C
D
= 47 nF
10
16
22
ms
Reset Reaction Time
C
D
= 47 nF
-
1.5
4.0
m
s
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 2. Output Stability with Output
Capacitor ESR
0.01
0.1
1
10
100
1000
OUTPUT CURRENT (mA)
ESR (
W
)
Minimum ESR for
C
Vout
= 1
m
F
Unstable ESR Region for
C
Vout
= 1
m
F - 22
m
F
Stable ESR Region
0
100
200
300
400
500
Unstable Region for C
Vout
= 1
m
F
Maximum ESR for
C
Vout
= 1
m
F - 22
m
F
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4
APPLICATION INFORMATION
V
I
C
I1
1000
F
C
I2
100 nF
C
D
47 nF
I
I
I
D
I
D
1
4
5
2
3
GND
C
Q
22
F
I
RO
I
Q
Q
RO
R
ext
5.0 k
V
Q
V
RO
Figure 3. Test Circuit
NCV4275
Circuit Description
The error amplifier compares a temperature-stable
reference voltage to a voltage that is proportional to the
output voltage (Q) (generated from a resistor divider) and
drives the base of a series transistor via a buffer. Saturation
control as a function of the load current prevents
oversaturation of the output power device, thus preventing
excessive substrate current (quiescent current).
Typical drop out voltage at 300 mA load is 250 mV,
500 mV maximum. Test voltage for drop out is 5.0 V input.
Stability Considerations
The input capacitors (C
I1
and C
I2
) are necessary to
control line influences. Using a resistor of approximately
1.0
in series with C
I2
can solve potential oscillations due
to stray inductance and capacitance.
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: start-up
delay, load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum
or aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause
instability. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low
temperatures (-25
C to -40
C), both the value and ESR of
the capacitor will vary considerably. The capacitor
manufacturers data sheet usually provides this
information.
The value for the output capacitor C
Q
shown in Figure 3
should work for most applications, however it is not
necessarily the optimized solution. Stability is guaranteed for
C
Q
> 22
mF and an ESR
5.0
.
Calculating Power Dissipation
in a Single Output Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 4) is:
PD(max)
+
[VI(max)
*
VQ(min)] IQ(max)
(1)
)
VI(max)Iq
where
V
I(max)
is the maximum input voltage,
V
Q(min)
is the minimum output voltage,
I
Q(max)
is the maximum output current for the
application,
I
q
is the quiescent current the regulator
consumes at I
Q(max)
.
Once the value of P
D(max)
is known, the maximum
permissible value of R
qJA
can be calculated:
R
q
JA
+
150
C
*
TA
PD
(2)
The value of R
qJA
can then be compared with those in the
package section of the data sheet. Those packages with
R
qJA
's less than the calculated value in Equation 2 will keep
the die temperature below 150
C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
SMART
REGULATOR
Iq
Control
Features
I
Q
I
I
Figure 4. Single Output Regulator with Key
Performance Parameters Labeled
V
I
V
Q
}
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5
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and
the outside environment will have a thermal resistance.
Like series electrical resistances, these resistances are
summed to determine the value of R
qJA
:
R
q
JA
+
R
q
JC
)
R
q
CS
)
R
q
SA
(3)
where
R
qJC
is the junction-to-case thermal resistance,
R
qCS
is the case-to-heatsink thermal resistance,
R
qSA
is the heatsink-to-ambient thermal
resistance.
R
qJC
appears in the package section of the data sheet.
Like R
qJA
, it too is a function of package type. R
qCS
and
R
qSA
are functions of the package type, heatsink and the
interface between them. These values appear in heat sink
data sheets of heat sink manufacturers.
Thermal, mounting, and heatsinking considerations are
discussed in the ON Semiconductor application note
AN1040/D.
V
I
V
Q
V
D
V
RO
Reset
Delay Time
Reset
Reaction Time
Power-on-Reset
Thermal
Shutdown
Voltage Dip
at Input
Undervoltage
Secondary
Spike
Overload
at Output
< Reset Reaction Time
t
t
t
t
V
Q,rt
Upper Timing Threshold
Lower Timing Threshold
dVD
dt
+
Reset Charge Current
CD
Figure 5. Reset Timing
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