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Электронный компонент: NTD40N03R

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Semiconductor Components Industries, LLC, 2004
April, 2004 - Rev. 5
1
Publication Order Number:
NTD40N03R/D
NTD40N03R
Power MOSFET
45 Amps, 25 Volts
N-Channel DPAK
Features
Planar HD3e Process for Fast Switching Performance
Low R
DS(on)
to Minimize Conduction Loss
Low C
iss
to Minimize Driver Loss
Low Gate Charge
Optimized for High Side Switching Requirements in
High-Efficiency DC-DC Converters
Pb-Free Packages are Available
MAXIMUM RATINGS
(T
J
= 25
C unless otherwise specified)
Parameter
Symbol
Value
Unit
Drain-to-Source Voltage
V
DSS
25
Vdc
Gate-to-Source Voltage - Continuous
V
GS
20
Vdc
Thermal Resistance - Junction-to-Case
Total Power Dissipation @ T
C
= 25
C
Drain Current
- Continuous @ T
C
= 25
C, Chip
- Continuous @ T
A
= 25
C, Limited by Wires
- Single Pulse (tp
10
m
s)
R
q
JC
P
D
I
D
I
D
I
D
3.0
50
45
32
100
C/W
W
A
A
A
Thermal Resistance - Junction-to-Ambient
(Note 1)
Total Power Dissipation @ T
A
= 25
C
Drain Current - Continuous @ T
A
= 25
C
R
q
JA
P
D
I
D
71.4
2.1
9.2
C/W
W
A
Thermal Resistance - Junction-to-Ambient
(Note 2)
Total Power Dissipation @ T
A
= 25
C
Drain Current - Continuous @ T
A
= 25
C
R
q
JA
P
D
I
D
100
1.5
7.8
C/W
W
A
Operating and Storage Temperature Range
T
J
, T
stg
-55 to
175
C
Maximum Lead Temperature for Soldering
Purposes, 1/8
from case for 10 seconds
T
L
260
C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
1. When surface mounted to an FR4 board using 0.5 sq. in pad size.
2. When surface mounted to an FR4 board using minimum recommended
pad size.
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45 AMPERES, 25 VOLTS
R
DS(on)
= 12.6 m
W
(Typ)
MARKING DIAGRAM
& PIN ASSIGNMENTS
40N03= Device Code
Y
= Year
WW
= Work Week
CASE 369AA
D
S
G
YWW
T40
N03
4 Drain
3
Source
1
Gate
2
Drain
N-CHANNEL
DPAK
(Surface Mount)
STYLE 2
CASE 369D
DPAK
(Straight Lead)
STYLE 2
1 2
3
4
4 Drain
1
Gate
2
Drain
3
Source
YWW
T40
N03
4
1
2
3
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
NTD40N03R
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2
ELECTRICAL CHARACTERISTICS
(T
J
= 25
C unless otherwise specified)
Characteristics
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage (Note 3)
(V
GS
= 0 Vdc, I
D
= 250
m
Adc)
Temperature Coefficient (Positive)
V(br)
DSS
25
-
28
-
-
-
Vdc
mV/
C
Zero Gate Voltage Drain Current
(V
DS
= 20 Vdc, V
GS
= 0 Vdc)
(V
DS
= 20 Vdc, V
GS
= 0 Vdc, T
J
= 150
C)
I
DSS
-
-
-
-
1.0
10
m
Adc
Gate-Body Leakage Current
(V
GS
=
20 Vdc, V
DS
= 0 Vdc)
I
GSS
-
-
100
nAdc
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage (Note 3)
(V
DS
= V
GS
, I
D
= 250
m
Adc)
Threshold Temperature Coefficient (Negative)
V
GS(th)
1.0
-
1.7
-
2.0
-
Vdc
mV/
C
Static Drain-to-Source On-Resistance (Note 3)
(V
GS
= 4.5 Vdc, I
D
= 10 Adc)
(V
GS
= 10 Vdc, I
D
= 10 Adc)
R
DS(on)
-
-
18.6
12.6
23
16.5
m
W
Forward Transconductance (Note 3)
(V
DS
= 10 Vdc, I
D
= 10 Adc)
g
FS
-
20
-
Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
C
iss
-
584
-
pF
Output Capacitance
(V
DS
= 20 Vdc, V
GS
= 0 V, f = 1 MHz)
C
oss
-
254
-
Transfer Capacitance
(
DS
,
GS
,
)
C
rss
-
99
-
SWITCHING CHARACTERISTICS (Note 4)
Turn-On Delay Time
t
d(on)
-
4.5
-
ns
Rise Time
(V
GS
= 10 Vdc, V
DD
= 10 Vdc,
t
r
-
19.5
-
Turn-Off Delay Time
(V
GS
= 10 Vdc, V
DD
= 10 Vdc,
I
D
= 10 Adc, R
G
= 3
W
)
t
d(off)
-
16.7
-
Fall Time
t
f
-
3.5
-
Gate Charge
Q
T
-
5.78
-
nC
(V
GS
= 4.5 Vdc, I
D
= 10 Adc,
V
DS
= 10 Vdc) (Note 3)
Q
1
-
2.1
-
V
DS
= 10 Vdc) (Note 3)
Q
2
-
2.5
-
SOURCE-DRAIN DIODE CHARACTERISTICS
Forward On-Voltage
(I
S
= 10 Adc, V
GS
= 0 Vdc) (Note 3)
V
SD
0 85
1 2
Vdc
(I
S
= 10 Adc, V
GS
= 0 Vdc) (Note 3)
(I
S
= 10 Adc, V
GS
= 0 Vdc, T
J
= 125
C)
-
-
0.85
0.71
1.2
-
dc
Reverse Recovery Time
t
rr
-
20.4
-
ns
(I
S
= 10 Adc, V
GS
= 0 Vdc,
t
a
-
8.25
-
(I
S
= 10 Adc, V
GS
= 0 Vdc,
dI
S
/dt = 100 A/
m
s) (Note 3)
t
b
-
12.1
-
Reverse Recovery Stored Charge
Q
RR
-
0.007
-
m
C
3. Pulse Test: Pulse Width
300
m
s, Duty Cycle
2%.
4. Switching characteristics are independent of operating junction temperatures.
NTD40N03R
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3
1.8
1.6
1.2
1.4
1
0.8
0.6
1000
100
10,000
8
4
12
0
20
0.016
0
10
4
4
2
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
I
D
, DRAIN CURRENT (AMPS)
0
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
I
D
, DRAIN CURRENT (AMPS)
0
0.032
0.040
12
8
4
0.024
0.016
0.008
0
16
Figure 3. On-Resistance versus Drain Current
and Temperature
I
D
, DRAIN CURRENT (AMPS)
Figure 4. On-Resistance versus Drain Current
and Temperature
I
D
, DRAIN CURRENT (AMPS)
R
DS(on)
, DRAIN-T
O-SOURCE RESIST
ANCE (
W
)
R
DS(on)
, DRAIN-T
O-SOURCE RESIST
ANCE (
W
)
Figure 5. On-Resistance Variation with
Temperature
T
J
, JUNCTION TEMPERATURE (
C)
Figure 6. Drain-to-Source Leakage Current
versus Voltage
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
R
DS(on)
, DRAIN-T
O-SOURCE RESIST
ANCE
(NORMALIZED)
I
DSS
, LEAKAGE (nA)
20
-50
50
25
0
-25
75
125
100
0
3
4
2
1
5
0
12
16
8
20
4
0
0.008
0.024
0.040
0
20
25
15
10
5
V
GS
= 2.6 V
6
8
12
V
DS
10 V
T
J
= 25
C
T
J
= -55
C
T
J
= 125
C
T
J
= 25
C
T
J
= -55
C
T
J
= 125
C
V
GS
= 10 V
V
GS
= 4.5 V
150
V
GS
= 0 V
T
J
= 150
C
T
J
= 125
C
I
D
= 10 A
V
GS
= 10 V
0.032
T
J
= 25
C
T
J
= -55
C
T
J
= 125
C
20
16
8
16
8 V
4 V
2.8 V
3 V
3.2 V
6 V
T
J
= 150
C
T
J
= 150
C
3.4 V
3.5 V
10 V
NTD40N03R
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4
100
10
1
8
6
4
2
0
20
18
16
10
6
0
10
10
1000
15
5
0
20
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE
(VOLTS)
C, CAP
ACIT
ANCE (pF)
800
600
400
200
0
5
Q
g
, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate-to-Source and
Drain-to-Source Voltage versus Total Charge
V
GS
, GA
TE-T
O-SOURCE VOL
T
AGE (VOL
TS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
R
G
, GATE RESISTANCE (
W
)
Figure 10. Diode Forward Voltage versus
Current
V
SD
, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
I
S
, SOURCE CURRENT (AMPS)
t, TIME (ns)
0
8
6
4
2
1
10
100
0
0.4
0.2
0.8
1.0
I
D
= 10 A
T
J
= 25
C
V
GS
V
GS
= 0 V
V
DS
= 0 V
T
J
= 25
C
C
rss
C
iss
C
oss
C
rss
4
2
0.6
Q
2
C
iss
V
DS
= 10 V
I
D
= 10 A
V
GS
= 10 V
V
GS
= 0 V
t
r
t
d(off)
t
d(on)
t
f
V
GS
V
DS
Q
1
Q
T
T
J
= 25
C
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
0.1
1
100
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
1
100
I D
, DRAIN CURRENT
(AMPS)
R
DS(on)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
10
10
SINGLE PULSE
V
GS
= 20 V
T
C
= 25
C
1 ms
100
m
s
10 ms
dc
8
14
12
10
m
s
NTD40N03R
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5
Figure 12. Thermal Response
r(t)
, EFFECTIVE
TRANSIENT

THERMAL
RESIST
ANCE
(NORMALIZED)
t, TIME (s)
0.1
1.0
0.01
1
10
0.1
0.01
0.001
0.0001
0.00001
0.2
D = 0.5
0.1
R
qJC
(t) = r(t) R
qJC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
1
T
J(pk)
- T
C
= P
(pk)
R
qJC
(t)
P
(pk)
t
1
t
2
DUTY CYCLE, D = t
1
/t
2
0.05
0.01
SINGLE PULSE
0.02
NTD40N03R
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6
ORDERING INFORMATION
Device
Package
Shipping
NTD40N03R
DPAK
75 Units/Rail
NTD40N03RG
DPAK (Pb-Free)
75 Units/Rail
NTD40N03R-1
DPAK (Straight Lead)
75 Units/Rail
NTD40N03R-1G
DPAK (Straight Lead, Pb-Free)
75 Units/Rail
NTD40N03RT4
DPAK
2500 Tape & Reel
NTD40N03RT4G
DPAK (Pb-Free)
2500 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NTD40N03R
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7
PACKAGE DIMENSIONS
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
D
A
B
R
V
S
F
L
2 PL
M
0.13 (0.005)
T
E
C
U
J
-T-
SEATING
PLANE
Z
DIM
MIN
MAX
MIN
MAX
MILLIMETERS
INCHES
A
0.235
0.245
5.97
6.22
B
0.250
0.265
6.35
6.73
C
0.086
0.094
2.19
2.38
D
0.025
0.035
0.63
0.88
E
0.018
0.024
0.46
0.61
F
0.033
0.045
0.83
1.14
J
0.018
0.023
0.46
0.58
L
0.090 BSC
2.29 BSC
R
0.180
0.215
4.57
5.45
S
0.025
0.040
0.63
1.01
U
0.020
---
0.51
---
V
0.035
0.050
0.89
1.27
Z
0.155
---
3.93
---
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
1
2
3
4
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
DPAK (SINGLE GAUGE)
CASE 369AA-01
ISSUE O
5.80
0.228
2.58
0.101
1.6
0.063
6.20
0.244
3.0
0.118
6.172
0.243
mm
inches
SCALE 3:1
NTD40N03R
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8
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369D-01
ISSUE B
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
1
2
3
4
V
S
A
K
-T-
SEATING
PLANE
R
B
F
G
D
3 PL
M
0.13 (0.005)
T
C
E
J
H
DIM
MIN
MAX
MIN
MAX
MILLIMETERS
INCHES
A
0.235
0.245
5.97
6.35
B
0.250
0.265
6.35
6.73
C
0.086
0.094
2.19
2.38
D
0.027
0.035
0.69
0.88
E
0.018
0.023
0.46
0.58
F
0.037
0.045
0.94
1.14
G
0.090 BSC
2.29 BSC
H
0.034
0.040
0.87
1.01
J
0.018
0.023
0.46
0.58
K
0.350
0.380
8.89
9.65
R
0.180
0.215
4.45
5.45
S
0.025
0.040
0.63
1.01
V
0.035
0.050
0.89
1.27
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
Z
Z
0.155
---
3.93
---
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
"Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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PUBLICATION ORDERING INFORMATION
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USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051
Phone: 81-3-5773-3850
NTD40N03R/D
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Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada
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For additional information, please contact your
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