www.docs.chipfind.ru
Semiconductor Components Industries, LLC, 2004
December, 2004 - Rev. 10
1
Publication Order Number:
NTD60N02R/D
NTD60N02R
Power MOSFET
62 A, 24 V, N-Channel, DPAK
Features
Planar HD3e Process for Fast Switching Performance
Low R
DS(on)
to Minimize Conduction Loss
Low C
iss
to Minimize Driver Loss
Low Gate Charge
Optimized for High Side Switching Requirements in
High-Efficiency DC-DC Converters
Pb-Free Packages are Available
MAXIMUM RATINGS
(T
J
= 25
C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain-to-Source Voltage
V
DSS
24
Vdc
Gate-to-Source Voltage - Continuous
V
GS
20
Vdc
Thermal Resistance
Junction-to-Case
Total Power Dissipation @ T
C
= 25
C
Drain Current
Continuous @ T
C
= 25
C, Chip
Continuous @ T
C
= 25
C, Limited by Package
Continuous @ T
A
= 25
C, Limited by Wires
R
q
JC
P
D
I
D
I
D
I
D
2.6
58
62
50
32
C/W
W
A
A
A
Thermal Resistance
Junction-to-Ambient (Note 1)
Total Power Dissipation @ T
A
= 25
C
Drain Current - Continuous @ T
A
= 25
C
R
q
JA
P
D
I
D
80
1.87
10.5
C/W
W
A
Thermal Resistance
Junction-to-Ambient (Note 2)
Total Power Dissipation @ T
A
= 25
C
Drain Current - Continuous @ T
A
= 25
C
R
q
JA
P
D
I
D
120
1.25
8.5
C/W
W
A
Operating and Storage Temperature
T
J
, and
T
stg
- 55 to
175
C
Single Pulse Drain-to-Source Avalanche Energy
- Starting T
J
= 25
C
(V
DD
= 50 Vdc, V
GS
= 10.0 Vdc,
I
L
= 11 Apk, L = 1.0 mH, R
G
= 25
W
)
E
AS
60
mJ
Maximum Lead Temperature for Soldering
Purposes, 1/8
from case for 10 seconds
T
L
260
C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. When surface mounted to an FR4 board using 0.5 in sq drain pad size.
2. When surface mounted to an FR4 board using the minimum recommended
pad size.
MARKING DIAGRAM
& PIN ASSIGNMENTS
http://onsemi.com
Y
= Year
WW
= Work Week
60N02R = Device Code
24 V
8.4 m
W
@ 10 V
R
DS(on)
TYP
62 A
I
D
MAX
V
(BR)DSS
CASE 369D
DPAK
(Straight Lead)
STYLE 2
1
Gate
3
Source
2
Drain
4
Drain
YWW
T60
N02R
YWW
T60
N02R
1
Gate
3
Source
2
Drain
4
Drain
1
2
3
4
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
N-Channel
D
S
G
CASE 369AA
DPAK
(Surface Mount)
STYLE 2
1
2
3
4
1 2
3
4
CASE 369C
DPAK
(Surface Mount)
STYLE 2
NTD60N02R
http://onsemi.com
2
ELECTRICAL CHARACTERISTICS
(T
J
= 25
C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage (Note 3)
(V
GS
= 0 Vdc, I
D
= 250
m
Adc)
Temperature Coefficient (Positive)
V
(BR)DSS
24
-
27.5
25.5
-
-
Vdc
mV/
C
Zero Gate Voltage Drain Current
(V
DS
= 20 Vdc, V
GS
= 0 Vdc)
(V
DS
= 20 Vdc, V
GS
= 0 Vdc, T
J
= 150
C)
I
DSS
-
-
-
-
1.5
10
m
Adc
Gate-Body Leakage Current (V
GS
=
20 Vdc, V
DS
= 0 Vdc)
I
GSS
-
-
100
nAdc
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage (Note 3)
(V
DS
= V
GS
, I
D
= 250
m
Adc)
Threshold Temperature Coefficient (Negative)
V
GS(th)
1.0
-
1.5
4.1
2.0
-
Vdc
mV/
C
Static Drain-to-Source On-Resistance (Note 3)
(V
GS
= 4.5 Vdc, I
D
= 15 Adc)
(V
GS
= 10 Vdc, I
D
= 20 Adc)
(V
GS
= 10 Vdc, I
D
= 31 Adc)
R
DS(on)
-
-
-
11.2
8.4
8.2
12.5
10.5
-
m
W
Forward Transconductance (V
DS
= 10 Vdc, I
D
= 15 Adc) (Note 3)
g
FS
-
27
-
Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
C
iss
-
1000
1330
pF
Output Capacitance
(V
DS
= 20 Vdc, V
GS
= 0 Vdc,
f = 1.0 MHz)
C
oss
-
480
640
Transfer Capacitance
f = 1.0 MHz)
C
rss
-
180
225
SWITCHING CHARACTERISTICS (Note 4)
Turn-On Delay Time
t
d(on)
-
7.0
-
ns
Rise Time
(V
GS
= 10 Vdc, V
DD
= 10 Vdc,
t
r
-
33
-
Turn-Off Delay Time
(V
GS
= 10 Vdc, V
DD
= 10 Vdc,
I
D
= 31 Adc, R
G
= 3.0
W
)
t
d(off)
-
19
-
Fall Time
t
f
-
9.0
-
Gate Charge
Q
T
-
9.5
-
nC
(V
GS
= 4.5 Vdc, I
D
= 31 Adc,
V
DS
= 10 Vdc) (Note 3)
Q
GS
-
2.2
-
V
DS
= 10 Vdc) (Note 3)
Q
GD
-
5.0
-
SOURCE-DRAIN DIODE CHARACTERISTICS
Forward On-Voltage
(I
S
= 20 Adc, V
GS
= 0 Vdc) (Note 3)
V
SD
-
0.88
1.2
Vdc
Forward On-Voltage
(I
S
= 20 Adc, V
GS
= 0 Vdc) (Note 3)
(I
S
= 31 Adc, V
GS
= 0 Vdc)
(I
15 Ad
V
0 Vd
T
125 C)
V
SD
-
-
0.88
1.15
0 80
1.2
-
Vdc
(I
S
31 Adc, V
GS
0 Vdc)
(I
S
= 15 Adc, V
GS
= 0 Vdc, T
J
= 125
C)
-
0.80
-
Reverse Recovery Time
t
rr
-
29.1
-
ns
(I
S
= 31 Adc, V
GS
= 0 Vdc,
dI
S
/dt = 100 A/
m
s) (Note 3)
t
a
-
13.6
-
dI
S
/dt = 100 A/
m
s) (Note 3)
t
b
-
15.5
-
Reverse Recovery Stored Charge
Q
rr
-
0.02
-
m
C
3. Pulse Test: Pulse Width
v
300
m
s, Duty Cycle
v
2%.
4. Switching characteristics are independent of operating junction temperatures.
NTD60N02R
http://onsemi.com
3
TYPICAL CHARACTERISTICS
10
100
1000
10000
0
6
12
18
24
V
DS
, DRAIN-TO-SOURCE VOLTAGE (V)
T
J
= 100
C
T
J
= 175
C
V
GS
= 0 V
100000
0
20
40
60
80
100
120
0
2
4
6
8
10
V
DS
, DRAIN-TO-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
V
GS
= 10 V
140
4.5 V
5.0 V
4.0 V
3.8 V
3.6 V
3.4 V
3.2 V
3.0 V
2.8 V
2.8 V
4.2 V
2.4 V
8.0 V
6.0 V
2.6 V
T
J
= 25
C
Figure 1. On-Region Characteristics
0.05
2
4
6
8
10
R
DS(on)
, DRAIN-T
O-SOURCE RESIST
ANCE (
W
)
Figure 2. Transfer Characteristics
Figure 3. On-Resistance versus
Gate-to-Source Voltage
V
GS
, GATE-TO-SOURCE VOLTAGE (V)
V
GS
, GATE-TO-SOURCE VOLTAGE (V)
I
D
= 62 A
T
J
= 25
C
0
0.01
0.02
0.03
0.04
0.05
20
40
60
80
100
120
T
J
= 25
C
V
GS
= 4.5 V
Figure 4. On-Resistance versus Drain Current
and Gate Voltage
I
D
, DRAIN CURRENT (A)
R
DS(on)
, DRAIN-T
O-SOURCE RESIST
ANCE (
W
)
0.6
0.8
1.0
1.2
1.4
1.6
1.8
-50
-25
0
25
50
75
100
125
150
Figure 5. On-Resistance Variation with
Temperature
T
J
, JUNCTION TEMPERATURE (
C)
R
DS(on)
, DRAIN-T
O-SOURCE RESIST
ANCE
(NORMALIZED)
Figure 6. Drain-to-Source Leakage Current
versus Voltage
I
DSS
, LEAKAGE (nA)
0
20
40
60
80
100
120
0
2
4
6
8
T
J
= -55
C
T
J
= 25
C
T
J
= 175
C
V
DS
w
10 V
I
D
= 31 A
V
GS
= 10 V
0.04
0.03
0.02
0.01
0
I
D
, DRAIN CURRENT (A)
V
GS
= 10 V
140
2.0
175
NTD60N02R
http://onsemi.com
4
2000
10
5
0
5
10
15
20
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (V)
C, CAP
ACIT
ANCE (pF)
T
J
= 25
C
V
GS
= 0 V
C
iss
C
oss
C
rss
C
iss
V
DS
= 0 V
C
rss
V
GS
V
DS
1500
1000
500
0
Figure 7. Capacitance Variation
Q
g
, TOTAL GATE CHARGE (nC)
Figure 8. Gate-to-Source and Drain-to-Source
Voltage versus Total Charge
1
10
100
1000
1
10
100
R
G
, GATE RESISTANCE (
W
)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
t, TIME (ns)
V
DD
= 10 V
I
D
= 31 A
V
GS
= 10 V
1
10
100
0.1
1
10
100
R
DS(ON)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
10
ms
100
ms
1 ms
10 ms
dc
V
GS
= 20 V
SINGLE PULSE
T
C
= 25
C
V
DS
, DRAIN-TO-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
80
0.2
0.4
0.6
0.8
1.0
1.2
Figure 10. Diode Forward Voltage versus
Current
V
SD
, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased Safe Operating Area
I
S
, SOURCE CURRENT (A)
V
GS
= 0 V
T
J
= 25
C
t
r
t
d(off)
t
f
t
d(on)
0
1
2
3
4
5
0
4
6
10
Q
GS
Q
DS
V
GS
I
D
= 31 A
T
J
= 25
C
2
8
V
DS
, DRAIN-T
O-SOURCE VOL
T
AGE (V)
V
DS
Q
T
0
4
8
12
16
20
V
GS
, GA
TE-T
O-SOURCE VOL
T
AGE (V)
70
60
50
40
30
20
10
0
1.4
1.6
1.8
NTD60N02R
http://onsemi.com
5
Figure 12. Thermal Response
r(t)
, EFFECTIVE
TRANSIENT
THERMAL
RESIST
ANCE
(NORMALIZED)
t, TIME (s)
0.1
1.0
0.01
0.1
0.2
0.02
D = 0.5
0.05
0.01
SINGLE PULSE
R
q
JC
(t) = r(t) R
q
JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
1
T
J(pk)
- T
C
= P
(pk)
R
q
JC
(t)
P
(pk)
t
1
t
2
DUTY CYCLE, D = t
1
/t
2
1
10
0.1
0.01
0.001
0.0001
0.00001
ORDERING INFORMATION
Order Number
Package
Shipping
NTD60N02R
DPAK-3
75 Units / Rail
NTD60N02RG
DPAK-3
(Pb-Free)
75 Units / Rail
NTD60N02RT4
DPAK-3
2500 / Tape & Reel
NTD60N02RT4G
DPAK-3
(Pb-Free)
2500 / Tape & Reel
NTD60N02R-001
DPAK-3 Straight Lead
75 Units / Rail
NTD60N02R-1G
DPAK-3 Straight Lead
(Pb-Free)
75 Units / Rail
NTD60N02R-032
DPAK-3 Straight Lead
(3.2
0.5 mm)
75 Units / Rail
NTD60N02R-032G
DPAK-3 Straight Lead
(3.2
0.5 mm)
(Pb-Free)
75 Units / Rail
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifi-
cations Brochure, BRD8011/D.
NTD60N02R
http://onsemi.com
6
PACKAGE DIMENSIONS
DPAK
CASE 369C-01
ISSUE O
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
D
A
K
B
R
V
S
F
L
G
2 PL
M
0.13 (0.005)
T
E
C
U
J
H
-T-
SEATING
PLANE
Z
DIM
MIN
MAX
MIN
MAX
MILLIMETERS
INCHES
A
0.235
0.245
5.97
6.22
B
0.250
0.265
6.35
6.73
C
0.086
0.094
2.19
2.38
D
0.027
0.035
0.69
0.88
E
0.018
0.023
0.46
0.58
F
0.037
0.045
0.94
1.14
G
0.180 BSC
4.58 BSC
H
0.034
0.040
0.87
1.01
J
0.018
0.023
0.46
0.58
K
0.102
0.114
2.60
2.89
L
0.090 BSC
2.29 BSC
R
0.180
0.215
4.57
5.45
S
0.025
0.040
0.63
1.01
U
0.020
---
0.51
---
V
0.035
0.050
0.89
1.27
Z
0.155
---
3.93
---
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
1
2
3
4
5.80
0.228
2.58
0.101
1.6
0.063
6.20
0.244
3.0
0.118
6.172
0.243
mm
inches
SCALE 3:1
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
NTD60N02R
http://onsemi.com
7
PACKAGE DIMENSIONS
D
A
B
R
V
S
F
L
2 PL
M
0.13 (0.005)
T
E
C
U
J
-T-
SEATING
PLANE
Z
DIM
MIN
MAX
MIN
MAX
MILLIMETERS
INCHES
A
0.235
0.245
5.97
6.22
B
0.250
0.265
6.35
6.73
C
0.086
0.094
2.19
2.38
D
0.025
0.035
0.63
0.88
E
0.018
0.024
0.46
0.61
F
0.033
0.045
0.83
1.14
J
0.018
0.023
0.46
0.58
L
0.090 BSC
2.29 BSC
R
0.180
0.215
4.57
5.45
S
0.025
0.040
0.63
1.01
U
0.020
---
0.51
---
V
0.035
0.050
0.89
1.27
Z
0.155
---
3.93
---
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
1
2
3
4
DPAK
CASE 369AA-01
ISSUE O
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
5.80
0.228
2.58
0.101
1.6
0.063
6.20
0.244
3.0
0.118
6.172
0.243
mm
inches
SCALE 3:1
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
NTD60N02R
http://onsemi.com
8
PACKAGE DIMENSIONS
DPAK
CASE 369D-01
ISSUE B
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
1
2
3
4
V
S
A
K
-T-
SEATING
PLANE
R
B
F
G
D
3 PL
M
0.13 (0.005)
T
C
E
J
H
DIM
MIN
MAX
MIN
MAX
MILLIMETERS
INCHES
A
0.235
0.245
5.97
6.35
B
0.250
0.265
6.35
6.73
C
0.086
0.094
2.19
2.38
D
0.027
0.035
0.69
0.88
E
0.018
0.023
0.46
0.58
F
0.037
0.045
0.94
1.14
G
0.090 BSC
2.29 BSC
H
0.034
0.040
0.87
1.01
J
0.018
0.023
0.46
0.58
K
0.350
0.380
8.89
9.65
R
0.180
0.215
4.45
5.45
S
0.025
0.040
0.63
1.01
V
0.035
0.050
0.89
1.27
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
Z
Z
0.155
---
3.93
---
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
"Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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NTD60N02R/D
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