Semiconductor Components Industries, LLC, 2001
October, 2001 Rev. 7
1
Publication Order Number:
SN74LS164/D
SN74LS164
Serial-In Parallel-Out
Shift Register
The SN74LS164 is a high speed 8-Bit Serial-In Parallel-Out Shift
Register. Serial data is entered through a 2-Input AND gate
synchronous with the LOW to HIGH transition of the clock. The
device features an asynchronous Master Reset which clears the
register setting all outputs LOW independent of the clock. It utilizes
the Schottky diode clamped process to achieve high speeds and is fully
compatible with all ON Semiconductor TTL products.
Typical Shift Frequency of 35 MHz
Asynchronous Master Reset
Gated Serial Data Input
Fully Synchronous Data Transfers
Input Clamp Diodes Limit High Speed Termination Effects
ESD > 3500 Volts
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
4.75
5.0
5.25
V
TA
Operating Ambient
Temperature Range
0
25
70
C
IOH
Output Current High
0.4
mA
IOL
Output Current Low
8.0
mA
LOW
POWER
SCHOTTKY
SOIC
D SUFFIX
CASE 751A
PLASTIC
N SUFFIX
CASE 646
14
1
14
1
SOEIAJ
M SUFFIX
CASE 965
14
1
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
SN74LS164N
14 Pin DIP
2000 Units/Box
SN74LS164D
SOIC14
55 Units/Rail
SN74LS164DR2
SOIC14
2500/Tape & Reel
SN74LS164M
SOEIAJ14
See Note 1
SN74LS164MEL
SOEIAJ14
1. For ordering information on the EIAJ version of
the SOIC package, please contact your local
ON Semiconductor representative.
See Note 1
SN74LS164
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2
CONNECTION DIAGRAM DIP (TOP VIEW)
Data Inputs
Clock (Active HIGH Going Edge) Input
Master Reset (Active LOW) Input
Outputs
A, B
CP
MR
Q0 - Q7
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.
HIGH
LOW
(Note a)
LOADING
PIN NAMES
VCC = PIN 14
GND = PIN 7
LOGIC SYMBOL
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual In Line Package.
1
2
8
9 3 4 5 6 10 11 12 13
A
B
CP
LS164
8 BIT SHIFT REGISTER
MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
14
13
12
11
10
9
1
2
3
4
5
6
8
7
VCC Q7
Q6
Q5
Q4
MR
CP
A
B
Q0
Q1
Q2
Q3
GND
SN74LS164
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3
LOGIC DIAGRAM
Q6
Q7
A
B
Q0
Q1
Q3
Q2
Q5
Q4
MR
CP
D
Q
CD
D
Q
CD
D
Q
CD
D
Q
CD
D
Q
CD
D
Q
CD
D
Q
CD
D
Q
CD
6
3
4
5
11
12
10
13
VCC = PIN 14
GND = PIN 7
= PIN NUMBERS
1
2
8
9
FUNCTIONAL DESCRIPTION
The LS164 is an edge-triggered 8-bit shift register with
serial data entry and an output from each of the eight stages.
Data is entered serially through one of two inputs (A or B);
either of these inputs can be used as an active HIGH Enable
for data entry through the other input. An unused input must
be tied HIGH, or both inputs connected together.
Each LOW-to-HIGH transition on the Clock (CP) input
shifts data one place to the right and enters into Q0 the logical
AND of the two data inputs (A
B) that existed before the
rising clock edge. A LOW level on the Master Reset (MR)
input overrides all other inputs and clears the register
asynchronously, forcing all Q outputs LOW.
MODE SELECT -- TRUTH TABLE
OPERATING
MODE
INPUTS
OUTPUTS
MODE
MR
A
B
Q0
Q1Q7
Reset (Clear)
L
X
X
L
L L
H
I
I
L
q0 q6
Shift
H
I
h
L
q0 q6
H
h
I
L
q0 q6
H
h
h
H
q0 q6
L (l) = LOW Voltage Levels
H (h) = HIGH Voltage Levels
X = Don't Care
qn = Lower case letters indicate the state of the referenced input or output one
qn =
set-up time prior to the LOW to HIGH clock transition.
SN74LS164
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4
DC CHARACTERISTICS OVER OPERATING
TEMPERATURE RANGE
(unless otherwise specified)
Limits
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
VIH
Input HIGH Voltage
2.0
V
Guaranteed Input HIGH Voltage for
All Inputs
VIL
Input LOW Voltage
0.8
V
Guaranteed Input LOW Voltage for
All Inputs
VIK
Input Clamp Diode Voltage
0.65
1.5
V
VCC = MIN, IIN = 18 mA
VOH
Output HIGH Voltage
2.7
3.5
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOL
Output LOW Voltage
0.25
0.4
V
IOL = 4.0 mA
VCC = VCC MIN,
VIN VIH or VIL
VOL
Output LOW Voltage
0.35
0.5
V
IOL = 8.0 mA
VIN = VIH or VIL
per Truth Table
IIH
Input HIGH Current
20
A
VCC = MAX, VIN = 2.7 V
IIH
Input HIGH Current
0.1
mA
VCC = MAX, VIN = 7.0 V
IIL
Input LOW Current
0.4
mA
VCC = MAX, VIN = 0.4 V
IOS
Short Circuit Current (Note 2)
20
100
mA
VCC = MAX
ICC
Power Supply Current
27
mA
VCC = MAX
2. Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
(TA = 25
C)
Limits
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
fMAX
Maximum Clock Frequency
25
36
MHz
tPHL
Propagation Delay
MR to Output Q
24
36
ns
VCC = 5.0 V
CL = 15 pF
tPLH
tPHL
Propagation Delay
Clock to Output Q
17
21
27
32
ns
CL = 15 pF
AC SETUP REQUIREMENTS
(TA = 25
C)
Limits
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
tW
CP, MR Pulse Width
20
ns
ts
Data Setup Time
15
ns
VCC = 5 0 V
th
Data Hold Time
5.0
ns
VCC = 5.0 V
trec
MR to Clock Recovery Time
20
ns
SN74LS164
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5
AC WAVEFORMS
*The shaded areas indicate when the input is permitted to change for predictable output performance.
Figure 1. Clock to Output Delays
and Clock Pulse Width
Figure 2. Master Reset Pulse Width,
Master Reset to Output Delay and
Master Reset to Clock Recovery Time
Figure 3. Data Setup and Hold Times
CONDITIONS: MR = H
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
tPHL
tPLH
CP
Q
CP
Q
MR
trec
tW
t
PHL
tW
I/fmax
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
CP
D
Q
ts(H)
th(H)
ts(L)
th(L)
tW
1/fmax
1.3 V
1.3 V
*
1.3V
SN74LS164
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6
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 64606
ISSUE M
1
7
14
8
B
A
DIM
MIN
MAX
MIN
MAX
MILLIMETERS
INCHES
A
0.715
0.770
18.16
18.80
B
0.240
0.260
6.10
6.60
C
0.145
0.185
3.69
4.69
D
0.015
0.021
0.38
0.53
F
0.040
0.070
1.02
1.78
G
0.100 BSC
2.54 BSC
H
0.052
0.095
1.32
2.41
J
0.008
0.015
0.20
0.38
K
0.115
0.135
2.92
3.43
L
M
---
10 ---
10
N
0.015
0.039
0.38
1.01
_
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
F
H
G
D
K
C
SEATING
PLANE
N
T
14 PL
M
0.13 (0.005)
L
M
J
0.290
0.310
7.37
7.87
SN74LS164
http://onsemi.com
7
PACKAGE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
A
B
G
P
7 PL
14
8
7
1
M
0.25 (0.010)
B
M
S
B
M
0.25 (0.010)
A
S
T
T
F
R
X 45
SEATING
PLANE
D
14 PL
K
C
J
M
_
DIM
MIN
MAX
MIN
MAX
INCHES
MILLIMETERS
A
8.55
8.75
0.337
0.344
B
3.80
4.00
0.150
0.157
C
1.35
1.75
0.054
0.068
D
0.35
0.49
0.014
0.019
F
0.40
1.25
0.016
0.049
G
1.27 BSC
0.050 BSC
J
0.19
0.25
0.008
0.009
K
0.10
0.25
0.004
0.009
M
0
7
0
7
P
5.80
6.20
0.228
0.244
R
0.25
0.50
0.010
0.019
_
_
_
_
SN74LS164
http://onsemi.com
8
PACKAGE DIMENSIONS
HE
A1
DIM
MIN
MAX
MIN
MAX
INCHES
---
2.05
---
0.081
MILLIMETERS
0.05
0.20
0.002
0.008
0.35
0.50
0.014
0.020
0.18
0.27
0.007
0.011
9.90
10.50
0.390
0.413
5.10
5.45
0.201
0.215
1.27 BSC
0.050 BSC
7.40
8.20
0.291
0.323
0.50
0.85
0.020
0.033
1.10
1.50
0.043
0.059
0
0.70
0.90
0.028
0.035
---
1.42
---
0.056
A1
HE
Q1
LE
_
10
_
0
_
10
_
LE
Q1
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
0.13 (0.005)
M
0.10 (0.004)
D
Z
E
1
14
8
7
e
A
b
VIEW P
c
L
DETAIL P
M
A
b
c
D
E
e
0.50
M
Z
M SUFFIX
SOEIAJ PACKAGE
CASE 96501
ISSUE O
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without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or
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PUBLICATION ORDERING INFORMATION
JAPAN: ON Semiconductor, Japan Customer Focus Center
4321 NishiGotanda, Shinagawaku, Tokyo, Japan 1410031
Phone: 81357402700
Email: r14525@onsemi.com
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
SN74LS164/D
Literature Fulfillment:
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P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 3036752175 or 8003443860 Toll Free USA/Canada
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