Semiconductor Components Industries, LLC, 2004

September, 2004 - Rev. 3

Publication Order Number:

UC3844B/D

UC3844B, UC3845B,
UC2844B, UC2845B

High Performance
Current Mode Controllers

The UC3844B, UC3845B series are high performance fixed

frequency current mode controllers. They are specifically designed for
Off-Line and dc-dc converter applications offering the designer a
cost-effective solution with minimal external components. These
integrated circuits feature an oscillator, a temperature compensated
reference, high gain error amplifier, current sensing comparator, and a
high current totem pole output ideally suited for driving a power
MOSFET.

Also included are protective features consisting of input and

reference undervoltage lockouts each with hysteresis, cycle-by-cycle
current limiting, a latch for single pulse metering, and a flip-flop
which blanks the output off every other oscillator cycle, allowing
output deadtimes to be programmed from 50% to 70%.

These devices are available in an 8-pin dual-in-line and surface

mount (SOIC-8) plastic package as well as the 14-pin plastic surface
mount (SOIC-14). The SOIC-14 package has separate power and
ground pins for the totem pole output stage.

The UCX844B has UVLO thresholds of 16 V (on) and 10 V (off),

ideally suited for off-line converters. The UCX845B is tailored for
lower voltage applications having UVLO thresholds of 8.5 V (on) and
7.6 V (off).

Features

Pb-Free Packages are Available

Trimmed Oscillator for Precise Frequency Control

Oscillator Frequency Guaranteed at 250 kHz

Current Mode Operation to 500 kHz Output Switching Frequency

Output Deadtime Adjustable from 50% to 70%

Automatic Feed Forward Compensation

Latching PWM for Cycle-By-Cycle Current Limiting

Internally Trimmed Reference with Undervoltage Lockout

High Current Totem Pole Output

Undervoltage Lockout with Hysteresis

Low Startup and Operating Current

SOIC-14

D SUFFIX

CASE 751A

See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.

ORDERING INFORMATION

See general marking information in the device marking
section on page 16 of this data sheet.

DEVICE MARKING INFORMATION

PDIP-8

N SUFFIX

CASE 626

PIN CONNECTIONS

Compensation

Voltage Feedback

Current Sense

Compensation

Voltage Feedback

Current Sense

ref

NC
V

Output
GND
Power Ground

Output
GN
D

(Top View)

SOIC-8

D1 SUFFIX

CASE 751

http://onsemi.com

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

Pin numbers in parenthesis are for the D suffix SOIC-14 package.

Output

ref

Undervoltage

Lockout

GND

5.0V

Reference

ref

Undervoltage

Lockout

Latching

PWM

Oscillator

Error

Amplifier

5(9)

3(5)

5(8)

6(10)

7(11)

Power
Ground

Current
Sense Input

1(1)

2(3)

4(7)

8(14)

Output/

Compensation

Voltage

Feedback

Input

7(12)

Figure 1. Simplified Block Diagram

ORDERING INFORMATION

Device

Operating

Temperature Range

Package

Shipping

UC384xBD

SOIC-14

55 Units/Rail

UC384xBDR2

SOIC-14

2500 Tape & Reel

UC3844BDR2G

SOIC-14

(Pb-Free)

2500 Tape & Reel

UC384xBD1

SOIC-8

98 Units/Rail

UC3844BD1G

= 0

to +70

SOIC-8

(Pb-Free)

98 Units/Rail

UC384xBD1R2

SOIC-8

2500 Tape & Reel

UC384xBD1R2G

SOIC-8

(Pb-Free)

2500 Tape & Reel

UC384xBN

PDIP-8

50 Units/Rail

UC384xBNG

PDIP-8

(Pb-Free)

50 Units/Rail

UC2845BD

SOIC-14

55 Units/Rail

UC284xBDR2

SOIC-14

2500 Tape & Reel

UC2845BDR2G

SOIC-14

(Pb-Free)

2500 Tape & Reel

UC2845BD1

= -25

to +85

SOIC-8

98 Units/Rail

UC284xBD1R2

SOIC-8

2500 Tape & Reel

UC284xBD1R2G

SOIC-8

(Pb-Free)

2500 Tape & Reel

UC2844BN

PDIP-8

50 Units/Rail

UC384xBVD

SOIC-14

55 Units/Rail

UC3844BVDR2

SOIC-14

2500 Tape & Reel

UC384xBVD1

= -40

to +105

SOIC-8

98 Units/Rail

UC384xBVD1R2

SOIC-8

2500 Tape & Reel

UC384xBVN

PDIP-8

50 Units/Rail

For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

x indicates either a 4 or 5 to define specific device part numbers.

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

MAXIMUM RATINGS

Rating

Symbol

Value

Unit

Total Power Supply and Zener Current

+ I

)

Output Current, Source or Sink (Note 1)

1.0

Output Energy (Capacitive Load per Cycle)

5.0

Current Sense and Voltage Feedback Inputs

- 0.3 to + 5.5

Error Amp Output Sink Current

Power Dissipation and Thermal Characteristics
D Suffix, Plastic Package, SOIC-14 Case 751A

Maximum Power Dissipation @ T

= 25

Thermal Resistance, Junction-to-Air

D1 Suffix, Plastic Package, SOIC-8 Case 751

Maximum Power Dissipation @ T

= 25

Thermal Resistance, Junction-to-Air

N Suffix, Plastic Package, Case 626

Maximum Power Dissipation @ T

= 25

Thermal Resistance, Junction-to-Air

862
145

702
178

1.25

100

C/W

Operating Junction Temperature

+150

Operating Ambient Temperature

UC3844B, UC3845B
UC2844B, UC2845B

0 to + 70

- 25 to + 85

Storage Temperature Range

stg

- 65 to +150

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Maximum package power dissipation limits must be observed.

ELECTRICAL CHARACTERISTICS

= 15 V [Note 2], R

= 10 k, C

= 3.3 nF. For typical values T

= 25

C, for min/max values

is the operating ambient temperature range that applies [Note 3], unless otherwise noted.)

UC284XB

UC384XB, XBV

Characteristic

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

REFERENCE SECTION

Reference Output Voltage (I

= 1.0 mA, T

= 25

ref

4.95

5.0

5.05

4.9

5.0

5.1

Line Regulation (V

= 12 V to 25 V)

Reg

line

2.0

Load Regulation (I

= 1.0 mA to 20 mA)

Reg

load

3.0

Temperature Stability

0.2

mV/

Total Output Variation over Line, Load, and Temperature

ref

4.9

5.1

4.82

5.18

Output Noise Voltage (f = 10 Hz to 10 kHz, T

= 25

Long Term Stability (T

= 125

C for 1000 Hours)

5.0

Output Short Circuit Current

- 30

- 85

-180

- 30

- 85

-180

OSCILLATOR SECTION

Frequency

= 25

= T

low

to T

high

= 25

C (R

= 6.2 k, C

= 1.0 nF)

OSC

49
48

225

250

55
56

275

49
48

225

250

55
56

275

kHz

Frequency Change with Voltage (V

= 12 V to 25 V)

OSC

0.2

1.0

0.2

1.0

Frequency Change with Temperature (T

= T

low

to T

high

)

OSC

1.0

0.5

Oscillator Voltage Swing (Peak-to-Peak)

OSC

1.6

Discharge Current (V

OSC

= 2.0 V)

= 25

= T

low

to T

high

(UC284XB, UC384XB)

= T

low

to T

high

(UC384XBV)

dischg

7.8
7.5

8.3

-
-

8.8
8.8

7.8
7.6
7.2

8.3

-
-

8.8
8.8
8.8

2. Adjust V

above the Startup threshold before setting to 15 V.

3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.

low

= 0

C for UC3844B, UC3845B

high

= + 70

C for UC3844B, UC3845B

= - 25

C for UC2844B, UC2845B

= + 85

C for UC2844B, UC2845B

= - 40

C for UC3844BV, UC3845BV

= +105

C for UC3844BV, UC3845BV

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

ELECTRICAL CHARACTERISTICS

= 15 V [Note 4], R

= 10 k, C

= 3.3 nF. For typical values T

= 25

C, for min/max values

is the operating ambient temperature range that applies [Note 5], unless otherwise noted.)

UC284XB

UC384XB, XBV

Characteristic

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

ERROR AMPLIFIER SECTION

Voltage Feedback Input (V

= 2.5 V)

2.45

2.5

2.55

2.42

2.5

2.58

Input Bias Current (V

= 5.0 V)

- 0.1

-1.0

- 0.1

- 2.0

Open Loop Voltage Gain (V

= 2.0 V to 4.0 V)

VOL

Unity Gain Bandwidth (T

= 25

0.7

1.0

0.7

1.0

MHz

Power Supply Rejection Ratio (V

= 12 V to 25 V)

PSRR

Output Current

Sink (V

= 1.1 V, V

= 2.7 V)

Source (V

= 5.0 V, V

= 2.3 V)

Sink

Source

2.0

- 0.5

-1.0

-
-

2.0

- 0.5

-1.0

-
-

Output Voltage Swing

High State (R

= 15 k to ground, V

= 2.3 V)

Low State (R

= 15 k to V

ref

, V

= 2.7 V)

(UC284XB, UC384XB)
(UC384XBV)

5.0

-
-

6.2

0.8

1.1

5.0

-
-

6.2

0.8
0.8

1.1
1.2

CURRENT SENSE SECTION

Current Sense Input Voltage Gain (Notes 6 & 7)

(UC284XB, UC384XB)
(UC384XBV)

2.85

3.0

3.15

2.85
2.85

3.0
3.0

3.15
3.25

V/V

Maximum Current Sense Input Threshold (Note 6)

(UC284XB, UC384XB)
(UC384XBV)

0.9

1.0

1.1

0.9

0.85

1.0
1.0

1.1
1.1

Power Supply Rejection Ratio

= 12 V to 25 V) (Note 6)

PSRR

Input Bias Current

- 2.0

-10

- 2.0

-10

Propagation Delay (Current Sense Input to Output)

PLH(In/Out)

150

300

150

300

OUTPUT SECTION

Output Voltage

Low State

Sink

= 20 mA)

Sink

= 200 mA, UC284XB, UC384XB)

Sink

= 200 mA, UC384XBV)

High State (I

Source

= 20 mA, UC284XB, UC384XB)

Source

= 20 mA, UC384XBV)

Source

= 200 mA)

-
-
-

0.1
1.6

13.5

13.4

0.4
2.2

-
-
-
-

-
-
-

12.9

0.1
1.6
1.6

13.5

13.4

0.4
2.2
2.3

-
-
-

Output Voltage with UVLO Activated (V

= 6.0 V, I

Sink

= 1.0 mA)

OL(UVLO)

0.1

1.1

0.1

1.1

Output Voltage Rise Time (C

= 1.0 nF, T

= 25

150

Output Voltage Fall Time (C

= 1.0 nF, T

= 25

150

UNDERVOLTAGE LOCKOUT SECTION

Startup Threshold

UCX844B, BV
UCX845B, BV

7.8

8.4

9.0

14.5

7.8

8.4

17.5

9.0

Minimum Operating Voltage After Turn-On

UCX844B, BV
UCX845B, BV

CC(min)

9.0
7.0

7.6

8.2

8.5
7.0

7.6

11.5

8.2

4. Adjust V

above the Startup threshold before setting to 15 V.

5. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.

low

= 0

C for UC3844B, UC3845B

high

= + 70

C for UC3844B, UC3845B

= - 25

C for UC2844B, UC2845B

= + 85

C for UC2844B, UC2845B

= - 40

C for UC3844BV, UC3845BV

= +105

C for UC3844BV, UC3845BV

6. This parameter is measured at the latch trip point with V

= 0 V.

7. Comparator gain is defined as: A

V Output/Compensation

V Current Sense Input

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

ELECTRICAL CHARACTERISTICS

= 15 V [Note 8], R

= 10 k, C

= 3.3 nF. For typical values T

= 25

C, for min/max values

is the operating ambient temperature range that applies [Note 9], unless otherwise noted.)

UC284XB

UC384XB, XBV

Characteristic

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

PWM SECTION

Duty Cycle

Maximum (UC284XB, UC384XB)

Maximum

(UC384XBV)

Minimum

(max)

(min)

-
-

-
0

47
46

48
48

50
50

TOTAL DEVICE

Power Supply Current

Startup (V

= 6.5 V for UCX845B,

Startup (V

14 V for UCX844B, BV)

Operating (Note 8)

0.3

0.5

0.3

0.5

Power Supply Zener Voltage (I

= 25 mA)

8. Adjust V

above the Startup threshold before setting to 15 V.

9. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.

low

= 0

C for UC3844B, UC3845B

high

= + 70

C for UC3844B, UC3845B

= - 25

C for UC2844B, UC2845B

= + 85

C for UC2844B, UC2845B

= - 40

C for UC3844BV, UC3845BV

= +105

C for UC3844BV, UC3845BV

0.8

2.0

5.0

8.0

,
TIMING RESIST

OR (k

)

1.0 M

500 k

200 k

100 k

50 k

20 k

10 k

OSC

, OSCILLATOR FREQUENCY (kHz)

Figure 2. Timing Resistor

versus Oscillator Frequency

Figure 3. Output Deadtime

versus Oscillator Frequency

1.0 M

100 k

10 k

OSC

, OSCILLATOR FREQUENCY (kHz)

% DT

, PERCENT

OUTPUT

DEADTIME

ÄÄÄÄÄ

1. C

= 10 nF

2. C

= 5.0 nF

3. C

= 2.0 nF

4. C

= 1.0 nF

5. C

= 500 pF

6. C

= 200 pF

7. C

= 100 pF

20 k

50 k

200 k

500 k

NOTE: Output switches at
1/2 the oscillator frequency

= 15 V

= 25

0.5

ms/DIV

20 mV/DIV

2.55 V

2.5 V

2.45 V

= 15 V

= -1.0

= 25

= 15 V

= -1.0

= 25

1.0

ms/DIV

200 mV/DIV

2.5 V

3.0 V

2.0 V

Figure 4. Error Amp Small Signal

Transient Response

Figure 5. Error Amp Large Signal

Transient Response

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

, OUTPUT

VOL

T
AGE CHANGE (2.0 mV/DIV)

- 20

VOL

, OPEN LOOP

VOL

T
AGE GAIN (dB)

10 M

f, FREQUENCY (Hz)

Gain

Phase

120

150

180

100

1.0 k

10 k

100 k

1.0 M

100

, EXCESS PHASE (DEGREES)

, ERROR AMP OUTPUT VOLTAGE (V

)

, CURRENT

SENSE INPUT

THRESHOLD (V

)

0.2

0.4

0.6

0.8

1.0

1.2

2.0

4.0

6.0

8.0

= - 55

ÄÄÄÄ

= 15 V

0.1

Figure 6. Error Amp Open Loop Gain and

Phase versus Frequency

Figure 7. Current Sense Input Threshold

versus Error Amp Output Voltage

Figure 8. Reference Voltage Change

versus Source Current

Figure 9. Reference Short Circuit Current

versus Temperature

, REFERENCE VOL

T
AGE CHANGE (mV)

- 16

ref

, REFERENCE SOURCE CURRENT (mA)

100

120

ref

- 12

- 8.0

- 4.0

, REFERENCE SHOR

CIRCUIT

CURRENT

(mA)

SCI

- 55

, AMBIENT TEMPERATURE (

- 25

100

125

110

- 20

- 24

= 125

= 15 V

= 2.0 V to 4.0 V

= 100 k

= 25

= 15 V

= 25

, OUTPUT

VOL

T
AGE CHANGE (2.0 mV/DIV)

2.0 ms/DIV

= 12 V to 25 V

= 25

= 15 V

= 1.0 mA to 20 mA

= 25

Figure 10. Reference Load Regulation

Figure 11. Reference Line Regulation

= 15 V

= 125

= 25

= -55

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

ÄÄÄÄÄ

Sink Saturation

(Load to V

)

ÄÄÄÄ

= 10 k

= 3.3 nF

= 0 V

Sense

= 0 V

= 25

, SUPPL

CURRENT

(mA)

CCI

, SUPPLY VOLTAGE (V)

UCX845B

UCX844B

Figure 12. Output Saturation Voltage

versus Load Current

Figure 13. Output Waveform

ÄÄÄ

= 25

ÄÄÄÄ

= - 55

ÄÄ

ÄÄÄÄÄ

= 15 V

ms Pulsed Load

120 Hz Rate

ÄÄÄÄ

= - 55

ÄÄÄÄ

= 25

V sat

,
O

UTPUT

TURA

N V

E (V)

800

, OUTPUT LOAD CURRENT (mA)

200

400

600

1.0

2.0

3.0

- 2.0

-1.0

ÄÄÄÄÄ

Source Saturation

(Load to Ground)

ÄÄÄ

GND

50 ns/DIV

= 15 V

= 1.0 nF

= 25

100 ns/DIV

= 30 V

= 15 pF

= 25

, SUPPL

CURRENT

100 mA/DIV

20 V/DIV

, OUTPUT

VOL

T
AGE

Figure 14. Output Cross Conduction

Figure 15. Supply Current versus Supply Voltage

PIN FUNCTION DESCRIPTION

Pin

8-Pin

14-Pin

Function

Description

Compensation

This pin is the Error Amplifier output and is made available for loop compensation.

Voltage

Feedback

This is the inverting input of the Error Amplifier. It is normally connected to the switching power
supply output through a resistor divider.

Current Sense

A voltage proportional to inductor current is connected to this input. The PWM uses this
information to terminate the output switch conduction.

The Oscillator frequency and maximum Output duty cycle are programmed by connecting resistor
R

to V

ref

and capacitor C

to ground. Oscillator operation to 1.0 kHz is possible.

GND

This pin is the combined control circuitry and power ground.

Output

This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A are sourced
and sunk by this pin. The output switches at one-half the oscillator frequency.

This pin is the positive supply of the control IC.

ref

This is the reference output. It provides charging current for capacitor C

through resistor R

Power

Ground

This pin is a separate power ground return that is connected back to the power source. It is used
to reduce the effects of switching transient noise on the control circuitry.

The Output high state (V

) is set by the voltage applied to this pin. With a separate power source

connection, it can reduce the effects of switching transient noise on the control circuitry.

GND

This pin is the control circuitry ground return and is connected back to the powersource ground.

2,4,6,13

No connection. These pins are not internally connected.

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

OPERATING DESCRIPTION

The UC3844B, UC3845B series are high performance,

fixed frequency, current mode controllers. They are
specifically designed for Off-Line and dc-dc converter
applications offering the designer a cost-effective solution
with minimal external components. A representative block
diagram is shown in Figure 16.

Oscillator

The oscillator frequency is programmed by the values

selected for the timing components R

and C

. Capacitor C

is charged from the 5.0 V reference through resistor R

approximately 2.8 V and discharged to 1.2 V by an internal
current sink. During the discharge of C

, the oscillator

generates an internal blanking pulse that holds the center
input of the NOR gate high. This causes the Output to be in
a low state, thus producing a controlled amount of output
deadtime. An internal flip-flop has been incorporated in the
UCX844/5B which blanks the output off every other clock
cycle by holding one of the inputs of the NOR gate high. This
in combination with the C

discharge period yields output

deadtimes programmable from 50% to 70%. Figure 2 shows
R

versus Oscillator Frequency and Figure 3, Output

Deadtime versus Frequency, both for given values of C

Note that many values of R

and C

will give the same

oscillator frequency but only one combination will yield a
specific output deadtime at a given frequency. The oscillator
thresholds are temperature compensated to within

6% at

50 kHz. Also, because of industry trends moving the
UC384X into higher and higher frequency applications, the
UC384XB is guaranteed to within

10% at 250 kHz.

In many noise-sensitive applications it may be desirable

to frequency-lock the converter to an external system clock.
This can be accomplished by applying a clock signal to the
circuit shown in Figure 18. For reliable locking, the
free-running oscillator frequency should be set about 10%
less than the clock frequency. A method for multi-unit
synchronization is shown in Figure 19. By tailoring the
clock waveform, accurate Output duty cycle clamping can
be achieved to realize output deadtimes of greater than 70%.

Error Amplifier

A fully compensated Error Amplifier with access to the

inverting input and output is provided. It features a typical
dc voltage gain of 90 dB, and a unity gain bandwidth of
1.0 MHz with 57 degrees of phase margin (Figure 6). The
non-inverting input is internally biased at 2.5 V and is not
pinned out. The converter output voltage is typically divided
down and monitored by the inverting input. The maximum
input bias current is -2.0

mA which can cause an output

voltage error that is equal to the product of the input bias
current and the equivalent input divider source resistance.

The Error Amp Output (Pin 1) is provided for external

loop compensation (Figure 29). The output voltage is offset
by two diode drops (

1.4 V) and divided by three before it

connects to the inverting input of the Current Sense

Comparator. This guarantees that no drive pulses appear at
the Output (Pin 6) when Pin 1 is at its lowest state (V

This occurs when the power supply is operating and the load
is removed, or at the beginning of a soft-start interval
(Figures 21, 22). The Error Amp minimum feedback
resistance is limited by the amplifier's source current
(0.5 mA) and the required output voltage (V

) to reach the

comparator's 1.0 V clamp level:

f(min)

3.0 (1.0 V) + 1.4 V

0.5 mA

= 8800

Current Sense Comparator and PWM Latch

The UC3844B, UC3845B operate as a current mode

controller, whereby output switch conduction is initiated by
the oscillator and terminated when the peak inductor current
reaches the threshold level established by the Error
Amplifier Output/Compensation (Pin 1). Thus the error
signal controls the peak inductor current on a
cycle-by-cycle

basis. The Current Sense Comparator PWM

Latch configuration used ensures that only a single pulse
appears at the Output during any given oscillator cycle. The
inductor current is converted to a voltage by inserting the
ground-referenced sense resistor R

in series with the

source of output switch Q1. This voltage is monitored by the
Current Sense Input (Pin 3) and compared to a level derived
from the Error Amp Output. The peak inductor current under
normal operating conditions is controlled by the voltage at
Pin 1 where:

(Pin 1)

- 1.4 V

3 R

Abnormal operating conditions occur when the power

supply output is overloaded or if output voltage sensing is
lost. Under these conditions, the Current Sense Comparator
threshold will be internally clamped to 1.0 V. Therefore the
maximum peak switch current is:

pk(max)

1.0 V

When designing a high power switching regulator it

becomes desirable to reduce the internal clamp voltage in order
to keep the power dissipation of R

to a reasonable level. A

simple method to adjust this voltage is shown in Figure 20. The
two external diodes are used to compensate the internal diodes,
yielding a constant clamp voltage over temperature. Erratic
operation due to noise pickup can result if there is an excessive
reduction of the I

pk(max)

clamp voltage.

A narrow spike on the leading edge of the current

waveform can usually be observed and may cause the power
supply to exhibit an instability when the output is lightly
loaded. This spike is due to the power transformer
interwinding capacitance and output rectifier recovery time.
The addition of an RC filter on the Current Sense Input with
a time constant that approximates the spike duration will
usually eliminate the instability (refer to Figure 24).

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

Undervoltage Lockout

Two undervoltage lockout comparators have been

incorporated to guarantee that the IC is fully functional
before the output stage is enabled. The positive power
supply terminal (V

) and the reference output (V

ref

) are

each monitored by separate comparators. Each has built-in
hysteresis to prevent erratic output behavior as their
respective thresholds are crossed. The V

comparator

upper and lower thresholds are 16 V/10 V for the UCX844B,
and 8.4 V/7.6 V for the UCX845B. The V

ref

comparator

upper and lower thresholds are 3.6 V/3.4 V. The large
hysteresis and low startup current of the UCX844B makes
it ideally suited in off-line converter applications where
efficient bootstrap startup techniques are required
(Figure 30). The UCX845B is intended for lower voltage
dc-dc converter applications. A 36 V Zener is connected as
a shunt regulator from V

to ground. Its purpose is to

protect the IC from excessive voltage that can occur during
system startup. The minimum operating voltage for the
UCX844B is 11 V and 8.2 V for the UCX845B.

Output

These devices contain a single totem pole output stage that

was specifically designed for direct drive of power
MOSFETs. It is capable of up to

1.0 A peak drive current

and has a typical rise and fall time of 50 ns with a 1.0 nF load.
Additional internal circuitry has been added to keep the
Output in a sinking mode whenever an undervoltage lockout
is active. This characteristic eliminates the need for an
external pulldown resistor.

The SOIC-14 surface mount package provides separate

pins for V

(output supply) and Power Ground. Proper

implementation will significantly reduce the level of
switching transient noise imposed on the control circuitry.
This becomes particularly useful when reducing the I

pk(max)

clamp level. The separate V

supply input allows the

designer added flexibility in tailoring the drive voltage
independent of V

. A Zener clamp is typically connected

to this input when driving power MOSFETs in systems
where V

is greater than 20 V. Figure 23 shows proper

power and control ground connections in a current-sensing
power MOSFET application.

Reference

The 5.0 V bandgap reference is trimmed to

1.0%

tolerance at T

= 25

C on the UC284XB, and

2.0% on the

UC384XB. Its primary purpose is to supply charging current
to the oscillator timing capacitor. The reference has
short-circuit protection and is capable of providing in
excess of 20 mA for powering additional control system
circuitry.

Design Considerations

Do not attempt to construct the converter on

wire-wrap or plug-in prototype boards. High frequency
circuit layout techniques are imperative to prevent
pulse-width jitter. This is usually caused by excessive noise
pick-up imposed on the Current Sense or Voltage Feedback
inputs. Noise immunity can be improved by lowering circuit
impedances at these points. The printed circuit layout should
contain a ground plane with low-current signal and
high-current switch and output grounds returning on
separate paths back to the input filter capacitor. Ceramic
bypass capacitors (0.1

mF) connected directly to V

, V

and V

ref

may be required depending upon circuit layout.

This provides a low impedance path for filtering the high
frequency noise. All high current loops should be kept as
short as possible using heavy copper runs to minimize
radiated EMI. The Error Amp compensation circuitry and
the converter output voltage divider should be located close
to the IC and as far as possible from the power switch and
other noise-generating components.

Bias

Osc

5(9)

1(1)

2(3)

4(7)

8(14)

ref

Figure 18. External Clock Synchronization

Figure 19. External Duty Cycle Clamp and

Multi-Unit Synchronization

0.01

The diode clamp is required if the Sync amplitude is large enough to cause
the bottom side of C

to go more than 300 mV below ground.

External

Sync
Input

Bias

Osc

5(9)

1(1)

2(3)

4(7)

8(14)

To Additional
UCX84XBs

5.0k

MC1455

1.44

(RA ) 2RB)C

D(max) +

RA ) 2RB

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

If: SENSEFET = MTP10N10M

= 200

Figure 20. Adjustable Reduction of Clamp Level

Figure 21. Soft-Start Circuit

Figure 22. Adjustable Buffered Reduction of

Clamp Level with Soft-Start

5.0V Ref

Bias

Osc

1.0V

5(9)

7(11)

6(10)

5(8)

3(5)

1(1)

2(3)

4(7)

8(14)

Clamp

Ipk(max) [

VClamp

Where: 0

Clamp

1.0 V

5.0V Ref

Bias

1.0mA

Osc

1.0V

5(9)

1(1)

2(3)

4(7)

8(14)

1.0M

Soft-Start

3600C in

Ipk(max) [

VClamp

Figure 23. Current Sensing Power MOSFET

5.0V Ref

Bias

Osc

1.0V

5(9)

7(11)

6(10)

5(8)

3(5)

1(1)

2(3)

4(7)

8(14)

Where: 0

Clamp

1.0 V

MPSA63

5.0V Ref

(11)

(10)

(8)

Comp/Latch

(5)

1/4 W

D SENSEFET

Power Ground:

To Input Source

Return

Control Circuitry Ground:

To Pin (9)

Virtually lossless current sensing can be achieved with the implementation
of a SENSEFET

t power switch. For proper operation during over-current

conditions, a reduction of the I

pk(max)

clamp level must be implemented.

Refer to Figures 20 and 22.

VPin 5 [

RS Ipk rDS(on)

rDM(on) ) RS

Then : VPin 5 [ 0.075 Ipk

7(12)

1.0 mA

Comp/Latch

1.0 mA

(12)

Clamp

1.67

R2
R1

) 1

+ 0.33x10

-3

R1R2

R1 ) R2

Clamp

1.67

R2
R1

) 1

tSoft-Start + * In 1 *

3VClamp

C R1 R2

R1 ) R2

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

1.0mA

2(3)

5(9)

2.5V

1(1)

From V

Error Amp compensation circuit for stabilizing current mode boost
and flyback topologies operating with continuous inductor current.

Figure 27. Isolated MOSFET Drive

Figure 28. Latched Shutdown

Figure 29. Error Amplifier Compensation

5.0V Ref

7(11)

6(10)

5(8)

3(5)

Isolation

Boundary

Waveforms

50% DC

25% DC

Bias

Osc

5(9)

1(1)

2(3)

4(7)

8(14)

The MCR101 SCR must be selected for a holding of < 0.5 mA @ T

A(min)

. The

simple two transistor circuit can be used in place of the SCR as shown. All
resistors are 10 k.

MCR

101

3905

3903

1.0mA

2(3)

5(9)

2.5V

1(1)

From V

Error Amp compensation circuit for stabilizing any current mode topology except
for boost and flyback converters operating with continuous inductor current.

8.8k

Comp/Latch

7(12)

1.0 mA

(Pin 1)

- 1.4

3 R

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

MUR110

5.0V Ref

Bias

5(9)

7(11)

6(10)

5(8)

3(5)

0.5

MTP

4N50

1(1)

2(3)

4(7)

8(14)

33k

1.0nF

470pF

150k

100

18k

4.7k

Figure 30. 7 W Off-Line Flyback Regulator

0.01

100

1.0k

115 Vac

4.7

MDA

202

250

56k

4.7k

3300

1N4935

1N4937

680pF 2.7k

1000

2200

1000

5.0V/4.0A

5.0V RTN

12V/0.3A

12V RTN

-12V/0.3A

Primary: 45 Turns #26 AWG
Secondary

12 V: 9 Turns #30 AWG (2 Strands) Bifiliar Wound

Secondary 5.0 V: 4 Turns (six strands) #26 Hexfiliar Wound
Secondary Feedback: 10 Turns #30 AWG (2 strands) Bifiliar Wound
Core: Ferroxcube EC35-3C8
Bobbin: Ferroxcube EC35PCB1
Gap:

0.10" for a primary inductance of 1.0 mH

MUR110

MBR1635

Osc

T1 -

7(12)

Comp/Latch

L2, L3

- 15

mH at 5.0 A, Coilcraft Z7156

- 25

mH at 5.0 A, Coilcraft Z7157

1N5819

Test

Conditions

Results

Line Regulation:

5.0 V

12 V

= 95 Vac to 130 Vac

= 50 mV or

0.5%

= 24 mV or

0.1%

Load Regulation: 5.0 V

12 V

= 115 Vac, I

out

= 1.0 A to 4.0 A

= 115 Vac, I

out

= 100 mA to 300 mA

= 300 mV or

3.0%

= 60 mV or

0.25%

Output Ripple:

5.0 V

12 V

= 115 Vac

40 mV

80 mV

Efficiency

= 115 Vac

70%

All outputs are at nominal load currents unless otherwise noted.

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

Osc

Reference

Regulator

34V

Internal

Bias

0.5mA

Osc

Error

Amplifier

1.0V

7(12)

7(11)

6(10)

5(8)

3(5)

= 15V

1(1)

2(3)

4(7)

8(14)

10k

1.0nF

The capacitor's equivalent series resistance must limit the Drive Output current to 1.0 A. An additional series resistor
may be required when using tantalum or other low ESR capacitors. The converter's output can provide excellent line
and load regulation by connecting the R2/R1 resistor divider as shown.

Figure 31. Step-Up Charge Pump Converter

5(9)

PWM

Latch

Current Sense

Comparator

2.5V

3.6V

UVLO

ref

UVLO

UC3845B

1N5819

Connect to
Pin 2 for
closed loop
operation.

R2
R1

) 1

2 (V

)

Output Load Regulation

(Open Loop Configuration)

(mA)

(V)

0
2
9

18
36

29.9
28.8
28.3
27.4
24.4

5(9)

PWM

Latch

Current Sense

Comparator

1N5819

Reference

Regulator

34V

Internal

Bias

0.5mA

Error

Amplifier

1.0V

7(12)

7(11)

6(10)

5(8)

3(5)

= 15V

1(1)

2(3)

4(7)

8(14)

10k

1.0nF

The capacitor's equivalent series resistance must limit the Drive Output current to 1.0 A.
An additional series resistor may be required when using tantalum or other low ESR capacitors.

Figure 32. Voltage-Inverting Charge Pump Converter

2.5V

3.6V

UVLO

ref

UVLO

UC3845B

-V

Output Load Regulation

(mA)

(V)

0
2
9

18
32

-14.4
-13.2
-12.5

-11.7

-10.6

1N5819

= 2.5

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

PACKAGE DIMENSIONS

SOIC-8

D1 SUFFIX

CASE 751-07

ISSUE AC

SEATING
PLANE

X 45

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE

MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

6. 751-01 THRU 751-06 ARE OBSOLETE. NEW

STANDARD IS 751-07.

0.10 (0.004)

DIM

MIN

MAX

MIN

MAX

INCHES

4.80

5.00

0.189

0.197

MILLIMETERS

3.80

4.00

0.150

0.157

1.35

1.75

0.053

0.069

0.33

0.51

0.013

0.020

1.27 BSC

0.050 BSC

0.10

0.25

0.004

0.010

0.19

0.25

0.007

0.010

0.40

1.27

0.016

0.050

0.25

0.50

0.010

0.020

5.80

6.20

0.228

0.244

-X-

-Y-

0.25 (0.010)

-Z-

0.25 (0.010)

1.52

0.060

7.0

0.275

0.6

0.024

1.270
0.050

4.0

0.155

inches

SCALE 6:1

*For additional information on our Pb-Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

UC3844B, UC3845B, UC2844B, UC2845B

http://onsemi.com

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
"Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800-282-9855 Toll Free
USA/Canada

Japan: ON Semiconductor, Japan Customer Focus Center

2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051
Phone: 81-3-5773-3850

UC3844B/D

SENSEFET is a trademark of Semiconductor Components Industries, LLC.

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082-1312 USA
Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada
Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada
Email: orderlit@onsemi.com

ON Semiconductor Website: http://onsemi.com

Order Literature: http://www.onsemi.com/litorder

For additional information, please contact your
local Sales Representative.

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: UC2844BD1R2

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: UC2844BD1R2