Document No. 70-0196-03
www.psemi.com
Contact sales@psemi.com for full version of datasheet
Page 1 of 4
2005-2006 Peregrine Semiconductor Corp. All rights reserved.
RX1
RX2
RX3
TRX2 (WCDMA, RX)
TX1 (GSM/PCS)
TX2 (GSM/PCS)
CMOS
Control/Driver
and ESD
V1
V2
V3
TRX1 (WCDMA, RX)
The PE42671 is a HaRPTM-enhanced SP7T
RF Switch developed on the UltraCMOSTM
process technology. It addresses the specific
design needs of the Quad-Band GSM Handset
Antenna Switch Module Market for use in
GSM/PCS/EDGE/WCDMA handsets. The
switch is comprised of two transmit ports that
can be used for GSM/PCS/EDGE, two
transmit/receive ports (TRX1 and TRX2) that
can be used for either WCDMA or as receive
ports, and three symmetric receive ports. On-
chip CMOS decode logic facilitates three-pin
low voltage CMOS control, while high ESD
tolerance of 1500 V at all ports, no blocking
capacitor requirements, and on-chip SAW filter
over-voltage protection devices make this the
ultimate in integration and ruggedness.
Peregrine's HaRPTM technology
enhancements deliver high linearity and
exceptional harmonics performance. It is an
innovative feature of the UltraCMOSTM
process, providing performance superior to
GaAs with the economy and integration of
conventional CMOS.
Preliminary Specification
SP7T UltraCMOSTM 2.75 V Switch
100 3000 MHz, +68 dBm IIP3
Product Description
Figure 1. Functional Diagram
PE42671 DIE
Features
2 TX, 2 TRX, 3 RX ports
Three pin CMOS logic control with
integral decoder/driver
Exceptional harmonic performance:
2f
o
= -83 dBc and 3f
o
= -78 dBc
Low TX insertion loss: 0.65 dB at
900 MHz, 0.75 dB at 1900 MHz
TX RX Isolation of 47 dB at 900 MHz,
40 dB at 1900 MHz
1500 V HBM ESD tolerance all ports
+68 dBm IIP3 @ 50
-111 dBm IMD3
No blocking capacitors required
* Dimensions shown are drawn die size.
Figure 2. Die Top View*
1156
m
15
76
m
GND V
DD
GND
V1
GND
TX2
GND
TRX1
TX1
GND
V3
ANT
RX1
GND
RX2
GND
RX3
GND
GND
TRX2
GND
ANT
GND
V2
Preliminary Specification
PE42671
Page 2 of 4
2005-2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0196-03
UltraCMOSTM RFIC Solutions
Contact sales@psemi.com for full version of datasheet
Table 1. Target Electrical Specifications @ 25 C, V
DD
= 2.75 V
Table 2. Operating Ranges
Table 3. Absolute Maximum Ratings
Part performance is not guaranteed under these
conditions. Exposure to absolute maximum conditions
for extended periods of time may adversely affect
reliability. Stresses in excess of absolute maximum
ratings may cause permanent damage.
Note: 2. Assumes RF input period of 4620
s and duty cycle of 50%.
Note: 3. Assumes RF input period of 4620
s and duty cycle of 50%.
4. V
DD
within operating range specified in Table 2.
Table 1. Target Electrical Specifications @ 25 C, V
DD
= 2.75 V
Note: 1. Insertion loss specified with optimal impedance matching.
Parameter
Symbol Min Typ Max Units
Temperature range
T
OP
-40
+85
C
V
DD
Supply Voltage
V
DD
2.65 2.75 2.85
V
I
DD
Power Supply Current
(V
DD
= 2.75 V)
I
DD
13 50 A
TX input power
2
(VSWR
3:1)
824-915 MHz
+35
dBm
+33
RX input power
2
(VSWR
=
1:1)
P
IN
+20
dBm
Control Voltage High
V
IH
1.4
V
Control Voltage Low
V
IL
0.4
V
P
IN
TX input power
2
(VSWR
3:1)
1710-1910 MHz
TRX input power (VSWR
3:1)
824 - 2170 MHz
+31
Symbol
Parameter/Conditions
Min
Max Units
V
DD
Power supply voltage
-0.3
4.0
V
V
I
Voltage on any input
-0.3 V
DD
+ 0.3
V
T
ST
Storage temperature range
-65
+150
C
P
IN
(50
)
TX input power (50
)
3,4
824-915 MHz
+38
dBm
TX input power (50
)
3,4
1710-1910 MHz
+36
RX input power (50
)
3,4
+23
P
IN
(
:1)
TX input power (VSWR = (
:1
)
3,4
824-915 MHz
+35
dBm
TX input power (VSWR = (
:1
)
3,4
1710-1910 MHz
+33
V
ESD
ESD Voltage (HBM, MIL_STD 883
Method 3015.7)
1500
V
TRX input power (VSWR = (
:1
)
824 - 2170 MHz
+31
TRX input power (50
)
824 - 2170 MHz
+34
Parameter Condition
Typ
Units
Insertion loss
1
TX - ANT (850 / 900)
TX - ANT (1800 / 1900)
TRX - ANT ( 850 WCDMA )
TRX - ANT ( 2100 WCDMA )
RX - ANT (850 / 900)
RX - ANT (1800 / 1900)
0.65
0.75
0.6
0.75
0.95
1.0
dB
dB
dB
dB
dB
dB
Return Loss
Port under test in on state (850 / 900)
(1800 / 1900 / 2100)
20
15
dB
dB
Isolation
TX - RX (850 / 900)
TX - RX (1800 / 1900)
TX - TX (850 / 900)
TX - TX (1800 / 1900)
TX - TRX (850 / 900)
TX - TRX (1800 / 1900)
TRX - RX ( 850 WCDMA)
TRX - RX (2100 WCDMA)
47
40
33
27
36
29
40
31
dB
dB
dB
dB
dB
dB
dB
dB
2nd Harmonic
TX 850 / 900 MHz, +35 dBm output power, 50
TX 1800 / 1900 MHz, +33 dBm output power, 50
-83
-82
dBc
dBc
3rd Harmonic
TX 850 / 900 MHz, +35 dBm output power, 50
TX 1800 / 1900 MHz, +33 dBm output power, 50
-78
-78
dBc
dBc
WCDMA 2100 IMD3
TRX1 / TRX2: Measured at 2.14 GHz at ANT port, input +20 dBm CW
signal at 1.95 GHz and -15 dBm CW signal at 1.76 GHz
-111 dBm
WCDMA 2100 IIP3
TRX1 / TRX2: Measured at 2.14 GHz at ANT port, input +20 dBm CW
signal at 1.95 GHz and -15 dBm CW signal at 1.76 GHz
+68 dBm
Preliminary Specification
PE42671
Page 3 of 4
Document No. 70-0196-03
www.psemi.com
2005-2006 Peregrine Semiconductor Corp. All rights reserved.
Contact sales@psemi.com for full version of datasheet
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOSTM device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOSTM
devices are immune to latch-up.
Table 5. Truth Table
Table 6. Ordering Information
Table 4. Pin Descriptions
Figure 3. Pad Configuration (Top View)
TX1
PE42671
Die
AN
T
TX2
RX1
RX2
V
DD
V3
V2
V1
GND
GND
6
GND
GND
RX3
GN
D
GND
TRX2
GND
1
2
4
5
9
10
11
12
13
14 15
16
17
18
19
20
3
7
GND
8
GND
GN
D
21
24
22
23
TRX1
ANT
GND
Notes: 5. Bond wires
should be physically short and connected to
ground plane for best performance.
6. Blocking capacitors needed only when non-zero DC
voltage present.
Pin No.
Pin Name
Description
1 ANT
RF Common Antenna
Redundant ANT pins for flexible bonding
2 RX1
6
RF I/O RX1
3 GND
5
Ground
4 TRX1
6
RF I/O TRX1
5 GND
5
Ground
6 ANT
RF Common Antenna
Redundant ANT pins for flexible bonding
7 GND
5
Ground
8 TX1
6
RF I/O - TX1
9 GND
5
Ground
10 GND
5
Ground
11 V
DD
Supply
12
V1
Switch control input, CMOS logic level
13 GND
5
Ground
14
V2
Switch control input, CMOS logic level
15
V3
Switch control input, CMOS logic level
16 GND
5
Ground
17 GND
5
Ground
18 TX2
6
RF I/O TX2
19 GND
5
Ground
20 TRX2
6
RF I/O TRX2
21 GND
5
Ground
22 RX3
6
RF I/O RX3
23 GND
5
Ground
24 RX2
6
RF I/O RX2
Order Code
Description
Package
Shipping Method
42671-90 PE42671-DIE-D
Film Frame
Wafer (Gross Die / Wafer Quantity)
42671-99
PE42671-DIE-400G
Waffle Pack
400 Dice / Waffle Pack
42671-00
PE42671-DIE-1H
Evaluation Kit
1/ box
Path V3
V2
V1
TX1 - ANT
0
0
0
TX2 - ANT
0
0
1
TRX1 - ANT
0
1
0
TRX2 - ANT
1
1
0
RX1 - ANT
0
1
1
RX2 - ANT
1
0
0
RX3 - ANT
1
0
1
Preliminary Specification
PE42671
Page 4 of 4
2005-2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0196-03
UltraCMOSTM RFIC Solutions
Contact sales@psemi.com for full version of datasheet
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The Americas
Peregrine Semiconductor Corporation
9450 Carroll Park Drive
San Diego, CA 92121
Tel: 858-731-9400
Fax: 858-731-9499
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Peregrine Semiconductor K.K.
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1-1-1 Uchisaiwai-cho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
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#B-2402, Kolon Tripolis, #210
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Tel: +82-31-728-4300
Fax: +82-31-728-4305
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Tel: +33-1-47-41-91-73
Fax : +33-1-47-41-91-73
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
Preliminary Specification
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a DCN
(Document Change Notice).
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user's own risk.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Peregrine's products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS and HaRP are trademarks of Peregrine
Semiconductor Corp.
South Asia Pacific
Peregrine Semiconductor, China
Shanghai, 200040, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
Space and Defense Products
Americas:
Tel: 858-731-9453
Europe, Asia Pacific:
180 Rue Jean de Guiramand
13852 Aix-En-Provence Cedex 3, France
Tel: +33(0) 4 4239 3361
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