PEREGRINE SEMICONDUCTOR CORP.
|
http://www.peregrine-semi.com
Copyright
Peregrine Semiconductor Corp. 2003
Page 1 of 8
Product Description
Product Benefits
SEL Immune UTSi CMOS-on-sapphire
SEU <10
-10
errors / bit-day
300 Krad Total Dose
Figure 1. Package Drawing
ADVANCE INFORMATION
PE26C31
Quad RS-422 Differential Line
Driver Radiation Hardened
Features
High-speed operation: < 10 nS
Low power: < 150 uA typical
(unloaded)
3.3 V operation
Standard packaging: 16-lead
DIP and flat pack
The PE26C31 is a high performance monolithic CMOS
RS-422 line driver. Its operating supply range is 3.0 to
3.6 V, with an output signal overvoltage range of 0 6 V.
The PE26C31 offers higher speed and lower power than
other RS-422 driver types. It is packaged in standard DIP
and flat pack options and is ideal for space applications.
The PE26C31 is manufactured in Peregrine's patented
Ultra Thin Silicon (UTSi) CMOS process, offering the
performance of GaAs with the low power, economy and
integration of conventional CMOS.
PE26C31
Preliminary Specification
Copyright
Peregrine Semiconductor Corp. 2003
File No. 70/0100~00A
|
UTSi CMOS RFIC SOLUTIONS
Page 2 of 8
Figure 2. Pin Configuration
Table 1. Pin Descriptions
Pin
No.
Pin
Name
Description
1
A
Channel A Input
2
AQ+
Channel A Noninverting Ouput
3
AQ-
Channel A Inverting Output
4
E+
Enable, active high
5
BQ-
Channel B Inverting Output
6
BQ+
Channel B Noninverting Output
7
B
Channel B Input
8 V-
Ground
Pin
9
C
Channel C Input
10
CQ+
Channel C Noninverting Output
11
CQ-
Channel C Inverting Ouput
12
E-
Enable, active low
13
DQ-
Channel D Inverting Output
14
DQ+
Channel D Noninverting Output
15
D
Channel D Input
16 V+
Supply
Pin
Table 2. Recommended Operating Conditions
Symbol Parameter/Conditions Min Max Units
V+ Supply
voltage
3.0
3.6 V
T
OP
Operating
temperature
range
-55 125
C
VIN
Maximum input voltage
0
(V+)
V
VOUT Maximum
output
voltage 0 (V+) V
IOUT Maximum
output
current -50 50 mA
Electrostatic Discharge (ESD) Precautions
When handling this UTSi device, observe the same
precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
rating specified in Table 2.
Latch-Up Avoidance
Unlike conventional CMOS devices, UTSi CMOS
devices are immune to latch-up.
Device Functional Considerations
The PE26C31 operates at high switching speeds.
In order to obtain maximum performance, it is
crucial that pin 16 be supplied with a bypass
capacitor to ground (pin 8).
Table 3. Truth Table
E+ E- Data
Q+ Q-
L H X Z Z
H X
X L
L L H
H X
X L
H H L
1
A
PE26C31
2
AQ+
3
AQ-
4
E+
5
BQ-
6
BQ+
7
B
8
V-
16
15
14
13
12
11
10
9
V+
D
DQ+
DQ-
E-
CQ-
C
CQ+
PE26C31
Advance Information
PEREGRINE SEMICONDUCTOR CORP.
|
http://www.peregrine-semi.com
Copyright
Peregrine Semiconductor Corp. 2003
Page 3 of 8
Table 4. Electrical Specifications
-55 C < Tcase < 125 C, 3.0 V < V+ < 3.6 V, PreRad,
unless otherwise specified
Param Description
Conditions
Pin(s)
Min Typ Max Units
VD1
Output Differential Voltage
No load
3.0
3.6
V
VD2 Output
Differential
Voltage
RL=100
, Fig DC1
1.9
2.3
V
DVD2
Output Differential Voltage Change
IOUT 0 20mA, Fig DC1
-0.4
0
0.4
V
VCM Common
Mode
Voltage
RL=100
, Fig DC1
1.5
2.0
V
DVCM
Common Mode Voltage Change
RL=100 , Fig DC1
-0.4
0
0.4
V
IOZH
Tristate Output Leakage (H)
VOUT = V+, disabled
-20
-1
uA
IOZL
Tristate Output Leakage (L)
VOUT = 0.0 V, disabled
1
20
uA
IOSC
Output Short Circuit Current
VOUT = 0.0 V, Enabled Q=H
-30
-70
-160
mA
IOFFH
Output Leakage Current (H)
VOUT=6.0V,V+ and all inputs
= 0.0V
1 100
uA
IOFFL
Output Leakage Current (L)
VOUT=-0.25V,V+ and all
inputs = 0.0V
AQ+, AQ-, BQ+, BQ-,
CQ+, CQ-, DQ+, DQ-
-100 -1
uA
VIH
Input threshold H
A, B, C, D, E+, E-
2.0
V
VIL
Input Threshold L
A, B, C, D, E+, E-
0.8
V
IIH
Input Lkg Current
A, B, C, D, E+, E-
-5
5
uA
IIL
Input Lkg Current
A, B, C, D, E+, E-
-5
5
uA
VIKL
Input Clamp Diode Voltage
IIN=-20 mA
A, B, C, D, E+, E-
-1.5
VIKH
Input Clamp Diode Voltage
IIN=20 mA
A, B, C, D, E+, E-
(V+) +
1.5 V
ICC
Supply Current
No load, Inputs = 0 V or V+
V+
150 uA
250 uA
Notes:
(1) "Line" pins refer to AQ-, AQ+, BQ-, BQ+, CQ-, CQ+, DQ-, DQ+, differential outputs
(2) "Digital Input" or "Enable" pins refer to E+, E-
(3) "Digital Input" pins refer to A, B, C, D
(4) Output Short Circuit not intended to imply continuous operation
PE26C31
Preliminary Specification
Copyright
Peregrine Semiconductor Corp. 2003
File No. 70/0100~00A
|
UTSi CMOS RFIC SOLUTIONS
Page 4 of 8
Table 5. Post-Irradiation DC Electrical Specifications
Tcase = 25 C, 3.0 V < V+ < 3.6 V, 300 KRad,
unless otherwise specified
Param Description
Conditions
Pin(s)
Min Typ Max Units
VD1
Output Differential Voltage
No load
3.0
3.6
V
VD2 Output
Differential
Voltage
RL=100
, Fig DC1
2.0
2.3
V
DVD2
Output Differential Voltage Change
IOUT 0 20 mA, Fig DC1
-0.4
0
0.4
V
VCM Common
Mode
Voltage
RL=100
, Fig DC1
1.5
2.0
V
DVCM
Common Mode Voltage Change
RL=100 , Fig DC1
-0.4
0
0.4
V
IOZH
Tristate Output Leakage (H)
VOUT = V+, disabled
-20
-1
uA
IOZL
Tristate Output Leakage (L)
VOUT = 0.0 V, disabled
1
20
uA
IOSC
Output Short Circuit Current
VOUT = 0.0 V, Enabled Q=H
-50
-70
-100
mA
IOFFH
Output Leakage Current (H)
VOUT=6.0V,V+ and all inputs
= 0.0V
1 100
uA
IOFFL
Output Leakage Current (L)
VOUT=-0.25V,V+ and all
inputs = 0.0V
AQ+, AQ-, BQ+, BQ-,
CQ+, CQ-, DQ+, DQ-
-100 -1
uA
VIH
Input threshold H
A, B, C, D, E+, E-
2.0
V
VIL
Input Threshold L
A, B, C, D, E+, E-
0.8
V
IIH
Input Lkg Current
A, B, C, D, E+, E-
-5
5
uA
IIL
Input Lkg Current
A, B, C, D, E+, E-
-5
5
uA
VIKL
Input Clamp Diode Voltage
IIN=-20 mA
A, B, C, D, E+, E-
-1.5
VIKH
Input Clamp Diode Voltage
IIN=20 mA
A, B, C, D, E+, E-
(V+) +
1.5 V
ICC
Supply Current
No load, Inputs = 0 V or V+
V+
50 uA
150 uA
Notes:
(1) "Line" pins refer to AQ-, AQ+, BQ-, BQ+, CQ-, CQ+, DQ-, DQ+, differential outputs
(2) "Digital Input" or "Enable" pins refer to E+, E-
(3) "Digital Input" pins refer to A, B, C, D
(4) Output Short Circuit not intended to imply continuous operation
PE26C31
Advance Information
PEREGRINE SEMICONDUCTOR CORP.
|
http://www.peregrine-semi.com
Copyright
Peregrine Semiconductor Corp. 2003
Page 5 of 8
Table 6. Pre-irradiation Electrical Specifications
-55 C < Tcase < 125 C, 3.0 V < V+ < 3.6 V, PreRad,
unless otherwise specified
Param Description
Conditions
Pin(s) Min Typ Max
Units
TPHL
Prop Delay H-L
3
9
25
nS
TPLH
Prop Delay H-L
3
9
25
nS
TSK1
Prop Delay Q+/Q-
-3
0
3
nS
TSK2
Prop Delay Skew Ch/Ch
-3
0
3
nS
TRISE
Rise Time 20%/80%
3
10
nS
TFALL
Fall Time 20%/80%
3
10
nS
TPHZ
Prop Delay H-Z
12
25
nS
TPZH
Prop Delay Z-H
12
25
nS
TPLZ
Prop Delay L-Z
10
25
nS
TPZL
Prop Delay Z-L
RL=100 CL=50 pF
AQ+,
AQ-,
BQ+,
BQ-,
CQ+,
CQ-,
DQ+,
DQ-
10
25
nS
Table 7. Post-irradiation Electrical Specifications
25 C, 3.0 V < V+ < 3.6 V, 300 KRad,
unless otherwise specified
Param Description
Conditions
Pin(s) Min Typ Max
Units
TPHL
Prop Delay H-L
3
9
25
nS
TPLH
Prop Delay H-L
3
9
25
nS
TSK1
Prop Delay Q+/Q-
-3
0
3
nS
TSK2
Prop Delay Skew Ch/Ch
-3
0
3
nS
TRISE
Rise Time 20%/80%
3
10
nS
TFALL
Fall Time 20%/80%
3
10
nS
TPHZ
Prop Delay H-Z
20
30
nS
TPZH
Prop Delay Z-H
20
30
nS
TPLZ
Prop Delay L-Z
10
30
nS
TPZL
Prop Delay Z-L
RL=100 CL=50 pF
AQ+,
AQ-,
BQ+,
BQ-,
CQ+,
CQ-,
DQ+,
DQ-
10
30
nS
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