1
PS8575A 06/27/04
Features
Low Voltage, SPST Switch
V
CC
from 2.3V to 3.6V
Low On-Resistance: 6 ohms at 3.0V
CMOS Technology for Bus and Analog Applications
Rail-to-Rail Signal Range
Low Power: 30W at 3.0V
High Speed: 4ns
High Off Isolation: 65dB at 1MHz
High Bandwidth: 250MHz
Extended Industrial Temperature Range: -40C to 85C
Improved, Direct Replacement for SN74CBTLV1G125
Packaging:
- 5-pin SC70 (C)
- 5-pin SOT-23 (T)
Applications
Cell Phones
Computer Peripherals
Bus Isolation
Servers/Routers
Data Communications
PDAs
Portable Instrumentation
Battery Powered Communications
PI3A125
SOT
INY
TM
Low Voltage SPST
Analog Switch/Bus Switch
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Description
The PI3A125 is a high-speed CMOS SPST switch that can be used
in analog or low-delay bus switch applications.
Specified over a wide operating power supply voltage range, 2.3V
to 3.6V, the PI3A125 has a low maximum ON resistance of 10-ohm
at 2.3V and 7 ohms at 3V. The CMOS device features rail-to-rail
signal range. The switch is turned off when the OE input is high.
Power requirements at 3V are a low 30W.
The PI3A125 is an improved, direct replacement for the
SN74CBTLV1G125. Pericom improvements include lower resis-
tance and detailed analog switch specifications.
E
O
n
o
i
t
c
n
u
F
0
N
O
1
F
F
O
Logic Function Table
r
e
b
m
u
N
n
i
P
e
m
a
N
n
o
i
t
p
i
r
c
s
e
D
1
E
O
t
u
p
n
I
c
i
g
o
L
e
l
b
a
n
E
2
A
t
r
o
P
)l
a
n
o
it
c
e
ri
d
i
B
(
t
u
p
t
u
O
/t
u
p
n
I
3
D
N
G
d
n
u
o
r
G
4
B
t
r
o
P
)l
a
n
o
it
c
e
ri
d
i
B
(
t
u
p
t
u
O
/t
u
p
n
I
5
V
C
C
y
l
p
p
u
S
r
e
w
o
P
e
v
it
i
s
o
P
Pin Description
Connection Diagram
PI3A125
OE
A
1
2
3
5
4
GND
V
CC
B
2
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PI3A125
SOT
INY
Low Voltage SPST
Analog Switch/Bus Switch
PS8575A 06/27/04
.
n
i
M
.
x
a
M
s
t
i
n
U
V
C
C
e
g
a
tl
o
V
y
l
p
p
u
S
3
.
2
6
.
3
V
V
H
I
e
g
a
tl
o
V
t
u
p
n
I
l
o
r
t
n
o
C
l
e
v
e
L
-
h
g
i
H
V
C
C
V
7
.
2
o
t
V
3
.
2
=
7
.
1
V
C
C
V
6
.
3
o
t
V
7
.
2
=
2
V
L
I
e
g
a
tl
o
V
t
u
p
n
I
l
o
r
t
n
o
C
l
e
v
e
L
-
w
o
L
V
C
C
V
7
.
2
o
t
V
3
.
2
=
7
.
0
V
C
C
V
6
.
3
o
t
V
7
.
2
=
8
.
0
T
A
e
r
u
t
a
r
e
p
m
e
T
ri
A
-
e
e
r
F
g
n
it
a
r
e
p
O
0
4
5
8
C
Recommended Operating Conditions
(1)
Note:
1. To ensure proper device operation, all unused control inputs of the device must be held at V
CC
or GND.
Absolute Maximum Ratings &
Thermal Information
(1)
Supply Voltage V
CC
............................................... 0.5V to 4.6V
Input Voltage Range, V
I
......................................... 0.5V to 4.6V
Continuous Channel Current ............................................ 128mA
Package Thermal Impedance,
JA
SOT23 package ....................................................... 206C/W
SC70 package .......................................................... 252C/W
Storage Temperature Range, T
stg
....................... 65C to 150C
Notes:
1. Stresses beyond those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any
other conditions beyond those indicated under "Recommended
Operating Conditions" is not implied. Exposure to absolute-maxi-
mum-rated conditions for extended periods may affect device
reliability.
r
e
t
e
m
a
r
a
P
n
o
i
t
p
i
r
c
s
e
D
s
n
o
i
t
i
d
n
o
C
t
s
e
T
e
g
a
t
l
o
V
y
l
p
p
u
S
.
n
i
M
p
y
T
.
x
a
M
s
t
i
n
U
V
C
C
e
g
n
a
R
e
g
a
tl
o
V
g
o
l
a
n
A
V
C
C
3
.
2
6
.
3
V
R
N
O
N
O
e
c
n
a
t
s
i
s
e
R
I
I
V
,
A
m
4
6
=
I
V
0
=
V
3
.
2
7
9
I
I
V
,
A
m
4
2
=
I
V
0
=
7
9
I
I
V
,
A
m
5
1
=
I
V
7
.
1
=
5
1
2
2
R
N
O
N
O
e
c
n
a
t
s
i
s
e
R
)
4
(
I
I
V
,
A
m
4
6
=
I
V
0
=
V
3
5
6
I
I
V
,
A
m
4
2
=
I
V
0
=
5
6
I
I
V
,
A
m
5
1
=
I
V
4
.
2
=
0
1
3
1
V
H
I
e
g
a
tl
o
V
c
i
g
o
L
h
g
i
H
t
u
p
n
I
V
C
C
V
7
.
2
o
t
V
3
.
2
=
7
.
1
V
V
C
C
V
6
.
3
o
t
V
7
.
2
=
2
V
L
I
e
g
a
tl
o
V
c
i
g
o
L
w
o
L
t
u
p
n
I
V
C
C
V
7
.
2
o
t
V
3
.
2
=
7
.
0
V
C
C
V
6
.
3
o
t
V
7
.
2
=
8
.
0
I
N
I
t
n
e
r
r
u
C
c
i
g
o
L
t
u
p
n
I
V
N
I
r
o
m
u
m
i
n
i
M
h
g
i
H
c
i
g
o
L
=
V
N
I
m
u
m
i
x
a
M
w
o
L
c
i
g
o
L
=
V
C
C
V
6
.
3
o
t
V
7
.
2
=
0
.
1
A
I
F
F
O
t
n
e
r
r
u
C
e
g
a
k
a
e
L
e
t
a
t
S
F
F
O
V
C
C
V
6
.
3
o
t
V
7
.
2
=
0
5
I
C
C
t
n
e
r
r
u
C
y
l
p
p
u
S
t
n
e
c
s
e
i
u
Q
I
O
V
,
A
m
0
=
I
V
=
C
C
D
N
G
r
o
V
C
C
V
6
.
3
=
0
1
C
N
I
e
c
n
a
ti
c
a
p
a
C
t
u
p
n
I
l
o
r
t
n
o
C
V
I
0
r
o
V
3
=
V
C
C
V
6
.
3
=
5
.
2
F
p
C
)
F
F
O
(
O
I
h
c
ti
w
S
F
F
O
f
o
e
c
n
a
ti
c
a
p
a
C
V
O
D
N
G
r
o
V
3
=
V
C
C
V
6
.
3
=
7
C
)
N
O
(
O
I
h
c
ti
w
S
N
O
f
o
e
c
n
a
ti
c
a
p
a
C
z
H
M
1
=
f
V
C
C
V
6
.
3
=
6
1
DC Electrical Characteristics
(Over the Operating temperature range, T
A
= 40C to 85C)
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
3
PS8575A 06/27/04
PI3A125
SOT
INY
Low Voltage SPST
Analog Switch/Bus Switch
Notes:
2. All typical values are at T
A
= 25
C and V
CC
= 3.3V.
3. Propagation delay is the calculated RC time constant of the typical On-resistance of the switch and a total load capacitance of 50pF, when
driven by an ideal voltage source with zero source impedance.
r
e
t
e
m
a
r
a
P
n
o
i
t
p
i
r
c
s
e
D
s
n
o
i
t
i
d
n
o
C
t
s
e
T
e
g
a
t
l
o
V
y
l
p
p
u
S
.
n
i
M
p
y
T
.
x
a
M
s
t
i
n
U
t
D
P
y
a
l
e
D
n
o
it
a
g
a
p
o
r
P
3
e
t
o
N
V
C
C
V
2
.
0
V
5
.
2
=
5
3
.
0
s
n
V
C
C
V
3
.
0
V
3
.
3
=
5
2
.
0
t
N
E
e
m
i
T
N
O
n
r
u
T
e
l
b
a
n
E
V
C
C
V
2
.
0
V
5
.
2
=
1
5
V
C
C
V
3
.
0
V
3
.
3
=
1
5
.
4
t
S
I
D
F
F
O
n
r
u
T
e
l
b
a
s
i
D
t
u
p
t
u
O
e
m
i
T
V
C
C
V
2
.
0
V
5
.
2
=
1
5
V
C
C
V
3
.
0
V
3
.
3
=
1
1
.
4
Q
n
o
it
c
e
j
n
I
e
g
r
a
h
C
V
C
C
V
3
.
3
=
7
C
p
R
R
I
O
n
o
it
a
l
o
s
I
f
f
O
z
H
M
1
=
f
V
C
C
V
3
.
3
=
5
6
B
d
f
B
d
3
h
t
d
i
w
d
n
a
B
B
d
3
V
C
C
V
3
.
3
=
D
B
T
z
H
M
Switch and AC Characteristics
4
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PI3A125
SOT
INY
Low Voltage SPST
Analog Switch/Bus Switch
PS8575A 06/27/04
Load Circuit
V
CC
= 2.5V 0.2V
500
500
2 x V
CC
Open
GND
S1
From Output
Under Test
C
L
= 30pF
(See Note 1)
Input
t
PLH
t
PHL
V
CC
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
0 V
Output
V
OH
V
OL
Voltage Waveforms
Propagation Delay Times
t
PZL
Output
Control
(Low Level
Enabling)
0V
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
t
PLZ
t
PHZ
V
OL
V
CC
0V
t
PZH
+0.15V
0.15V
Output
Waveform 1
S1 at 2 x V
CC
(see Note 2)
Output
Waveform 2
S1 at GND
(see Note 2)
V
OH
V
OH
V
OL
V
CC
Voltage Waveforms
Propagation Delay Times
t
s
e
T
1
S
t
d
p
t
Z
L
P
t/
L
Z
P
t
Z
H
P
t/
H
Z
P
n
e
p
O
V
x
2
C
C
D
N
G
Notes:
1. C
L
includes probe and jig capacitance.
2. Waveform 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is HIGH except when disabled by the output control.
3. All input pulses are supplied by generators having the following characteristics: PRR <10 MHz, Z
O
= 50
, t
r
2ns, t
f
2ns.
4. The outputs are measured one at a time with one transition per measurement.
5. t
PLZ
and t
PHZ
are the same as t
dis
.
6. t
PZL
and t
PZH
are the same as t
en
.
7. t
PLH
and t
PHL
are the same as t
pd
.
Figure 1. Test Circuit and Voltage Waveforms for V
CC
= 2.5V
Test Circuits and Timing Diagrams
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
5
PS8575A 06/27/04
PI3A125
SOT
INY
Low Voltage SPST
Analog Switch/Bus Switch
Load Circuit
V
CC
= 3.3V 0.3V
500
500
2 x V
CC
Open
GND
S1
From Output
Under Test
C
L
= 50pF
(See Note 1)
Input
t
PLH
t
PHL
V
CC
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
0 V
Output
V
OH
V
OL
Voltage Waveforms
Propagation Delay Times
t
PZL
Output
Control
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
t
PLZ
t
PHZ
V
OL
V
CC
0V
t
PZH
+0.3V
0.3V
Output
Waveform 1
S1 at 2 x V
CC
(see Note 2)
Output
Waveform 2
S1 at GND
(see Note 2)
V
OH
V
OH
V
OL
0V
V
CC
Voltage Waveforms
Propagation Delay Times
t
s
e
T
1
S
t
d
p
t
Z
L
P
t/
L
Z
P
t
Z
H
P
t/
H
Z
P
n
e
p
O
V
x
2
C
C
D
N
G
Notes:
1. C
L
includes probe and jig capacitance.
2. Waveform 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is HIGH except when disabled by the output control.
3. All input pulses are supplied by generators having the following characteristics: PRR <10 MHz, Z
O
= 50
, t
r
2ns, t
f
2ns.
4. The outputs are measured one at a time with one transition per measurement.
5. t
PLZ
and t
PHZ
are the same as t
dis
.
6. t
PZL
and t
PZH
are the same as t
en
.
7. t
PLH
and t
PHL
are the same as t
pd
.
Figure 2. Test Circuit and Voltage Waveforms for V
CC
= 3.3V
Test Circuits and Timing Diagrams
(continued)
PDF 
ZIP