Philips
Semiconductors
74ABT273A
Octal D-type flip-flop
Product specification
1995 Sep 06
INTEGRATED CIRCUITS
IC23 Data Handbook
Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
2
1995 Sep 06
853-1774 15704
FEATURES
Eight edge-triggered D-type flip-flops
Buffered common clock
Buffered asynchronous Master Reset
Power-up reset
See 74ABT377 for clock enable version
See 74ABT373 for transparent latch version
See 74ABT374 for 3-State version
ESD protection exceeds 2000 V per Mil Std 833 Method 3015 and
200 V per machine model.
DESCRIPTION
The 74ABT273A has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered Clock (CP)
and Master Reset (MR) inputs load and reset (clear) all flip-flops
simultaneously.
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop's Q output.
All outputs will be forced Low independent of Clock or Data inputs
by a Low voltage level on the MR input. The device is useful for
applications where the true output only is required and the CP and
MR are common elements.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
CP to Qn
C
L
= 50pF; V
CC
= 5V
3.0
3.4
ns
C
IN
Input capacitance
V
I
= 0V or V
CC
3.5
pF
I
CCH
Total supply current
Outputs High; V
CC
=5.5V
150
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
20-Pin Plastic DIP
40
C to +85
C
74ABT273A N
74ABT273A N
SOT146-1
20-Pin plastic SO
40
C to +85
C
74ABT273A D
74ABT273A D
SOT163-1
20-Pin Plastic SSOP Type II
40
C to +85
C
74ABT273A DB
74ABT273A DB
SOT339-1
20-Pin Plastic TSSOP Type I
40
C to +85
C
74ABT273A PW
7ABT273APW DH
SOT360-1
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3
Q4
GND
D4
D5
Q5
Q6
D6
D7
Q7
VCC
CP
SA00052
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
11
CP
Clock pulse input (active rising edge)
3, 4, 7, 8, 13,
14, 17, 18
D0 - D7
Data inputs
2, 5, 6, 9, 12,
15, 16, 19
Q0 - Q7
Data outputs
1
MR
Master Reset input (active-Low)
10
GND
Ground (0V)
20
V
CC
Positive supply voltage
Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
1995 Sep 06
3
LOGIC SYMBOL (IEEE/IEC)
11
3
2
4
5
7
6
8
9
C1
13
12
14
15
17
16
18
19
1
R
1D
SA00054
LOGIC SYMBOL
3
4
7
8
13
14
18
17
D0 D1 D2 D3 D4 D5 D6 D7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
2
5
6
9
12 15 16
19
1
11
MR
CP
SA00053
LOGIC DIAGRAM
CP
Q
RD
D
3
D0
Q0
CP
Q
RD
D
4
D1
CP
Q
RD
D
7
D2
CP
Q
RD
D
8
D3
CP
Q
RD
D
13
D4
CP
Q
RD
D
14
D5
CP
Q
RD
D
17
D6
CP
Q
RD
D
18
D7
2
Q1
5
Q2
6
Q3
9
Q4
12
Q5
15
Q6
16
Q7
19
11
1
CP
MR
SA00055
FUNCTION TABLE
INPUTS
OUTPUTS
OPERATING MODE
MR
CP
Dn
Q0 - Q7
OPERATING MODE
L
X
X
L
Reset (clear)
H
h
H
Load "1"
H
l
L
Load "0"
H = High voltage level
h
= High voltage level one set-up time prior to the Low-to-High
clock transition
L
= Low voltage level
l
= Low voltage level one set-up time prior to the Low-to-High
clock transition
X = Don't care
= Low-to-High clock transition
Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
1995 Sep 06
4
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
-0.5 to +7.0
V
I
IK
DC input diode current
V
I
< 0
-18
mA
V
I
DC input voltage
3
-1.2 to +7.0
V
I
OK
DC output diode current
V
O
< 0
-50
mA
V
OUT
DC output voltage
3
output in Off or High state
-0.5 to +5.5
V
I
OUT
DC output current
output in Low state
128
mA
T
stg
Storage temperature range
-65 to 150
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
Min
Max
UNIT
V
CC
DC supply voltage
4.5
5.5
V
V
I
Input voltage
0
V
CC
V
V
IH
High-level input voltage
2.0
V
V
IL
Low-level input voltage
0.8
V
I
OH
High-level output current
-32
mA
I
OL
Low-level output current
64
mA
t/
v
Input transition rise or fall rate
0
10
ns/V
T
amb
Operating free-air temperature range
-40
+85
C
Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
1995 Sep 06
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
C
T
amb
= -40
C
to +85
C
UNIT
Min
Typ
Max
Min
Max
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= -18mA
-0.9
-1.2
-1.2
V
V
CC
= 4.5V; I
OH
= -3mA; V
I
= V
IL
or V
IH
2.5
2.9
2.5
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= -3mA; V
I
= V
IL
or V
IH
3.0
3.4
3.0
V
V
CC
= 4.5V; I
OH
= -32mA; V
I
= V
IL
or V
IH
2.0
2.4
2.0
V
OL
Low-level output voltage
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
0.42
0.55
0.55
V
V
RST
Power-up output low
voltage
3
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
0.13
0.55
0.55
V
I
I
Input leakage current
V
CC
= 5.5V; V
I
= GND or 5.5V
0.01
1.0
1.0
A
I
OFF
Power-off leakage current
V
CC
= 0.0V; V
O
or V
I
4.5V
5.0
100
100
A
I
CEX
Output High leakage current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
5.0
50
50
A
I
O
Output current
1
V
CC
= 5.5V; V
O
= 2.5V
-50
-70
-180
-50
-180
mA
I
CCH
Quiescent supply current
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
150
250
250
A
I
CCL
Quiescent supply current
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
24
30
30
mA
I
CC
Additional supply current per
input pin
2
V
CC
= 5.5V; One data input at 3.4V, other
inputs at V
CC
or GND
0.5
1.5
1.5
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
C
V
CC
= +5.0V
T
amb
= -40
C to +85
C
V
CC
= +5.0V
0.5V
UNIT
Min
Typ
Max
Min
Max
f
MAX
Maximum clock frequency
1
250
350
250
MHz
t
PLH
t
PHL
Propagation delay
CP to Qn
1
1.5
2.0
3.0
3.4
4.0
4.6
1.5
2.0
4.8
4.8
ns
t
PHL
Propagation delay
MR to Qn
2
2.5
4.5
6.0
2.5
6.6
ns
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