Philips
Semiconductors
74ABT377A
Octal D-type flip-flop with enable
Product specification
Replaces data sheet 74ABT377 of 1995 Sep 06
IC23 Data Handbook
1997 Feb 26
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74ABT377A
Octal D-type flip-flop with enable
2
1997 Feb 26
853-1457 17800
FEATURES
Ideal for addressable register applications
8-bit positive edge-triggered register
Enable for address and data synchronization applications
Output capability: +64mA/-32mA
Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
Power-up reset
DESCRIPTION
The 74ABT377A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT377A has 8 edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered clock (CP)
input loads all flip-flops simultaneously when the Enable (E) input is
Low.
The register is fully edge triggered. The state of each D input, one
set-up time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop's Q output.
The E input must be stable one setup time prior to the Low-to-High
clock transition for predictable operation.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
CP to Qn
C
L
= 50pF; V
CC
= 5V
3.1
3.6
ns
C
IN
Input capacitance
V
I
= 0V or V
CC
4
pF
I
CCH
Total current supply
Outputs High; V
CC
= 5.5V
500
nA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
20-Pin Plastic DIP
40
C to +85
C
74ABT377A N
74ABT377A N
SOT146-1
20-Pin plastic SO
40
C to +85
C
74ABT377A D
74ABT377A D
SOT163-1
20-Pin Plastic SSOP Type II
40
C to +85
C
74ABT377A DB
74ABT377A DB
SOT339-1
20-Pin Plastic TSSOP Type I
40
C to +85
C
74ABT377A PW
74ABT377PWA DH
SOT360-1
PIN CONFIGURATION
20
19
18
17
16
15
14
13
12
10
11
9
8
7
6
5
4
3
2
1
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
E
SA00155
LOGIC SYMBOL
5
2
Q0
Q1
Q2
9
6
Q3
3
4
7
8
D0
D1
D2
D3
11
1
15
12
Q4
Q5
Q6
19
16
Q7
13
14
17
18
D4
D5
D6
D7
CP
OE
SA00152
Philips Semiconductors
Product specification
74ABT377A
Octal D-type flip-flop with enable
1997 Feb 26
3
LOGIC SYMBOL (IEEE/IEC)
1
3
2
4
5
7
6
8
9
G1
11
IC2
13
12
14
15
17
16
18
19
2D
SA00157
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1
E
Enable input (activeLow)
3, 4, 7, 8, 13, 14,
17, 18
D0-D7
Data inputs
2, 5, 6, 9, 12, 15,
16, 19
Q0-Q7
Data outputs
11
CP
Clock Pulse input (active
rising edge)
10
GND
Ground (0V)
20
V
CC
Positive supply voltage
LOGIC DIAGRAM
D
Q
CP
D
CP
D
CP
D
Q
CP
Q
Q
3
4
7
8
11
Q0
Q1
Q2
Q3
CP
D0
D1
D2
D3
D
Q
CP
D
CP
D
CP
D
Q
CP
Q
Q
13
14
17
18
D4
D5
D6
D7
1
2
5
6
9
12
15
16
19
Q4
Q5
Q6
Q7
E
SA00158
Philips Semiconductors
Product specification
74ABT377A
Octal D-type flip-flop with enable
1997 Feb 26
4
FUNCTION TABLE
INPUTS
OUTPUTS
OPERATING MODE
E
CP
Dn
Qn
l
h
H
Load "1"
l
l
L
Load "0"
h
H
X
X
X
no change
no change
Hold (do nothing)
H = High voltage level
h
= High voltage level one set-up time prior to the Low-to-High clock transition
L
= Low voltage level
l
= Low voltage level one set-up time prior to the Low-to-High clock transition
X = Don't care
= Low-to-High clock transition
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +7.0
V
I
IK
DC input diode current
V
I
< 0
18
mA
V
I
DC input voltage
3
1.2 to +7.0
V
I
OK
DC output diode current
V
O
< 0
50
mA
V
OUT
DC output voltage
3
output in Off or High state
0.5 to +5.5
V
I
OUT
DC output current
output in Low state
128
mA
T
stg
Storage temperature range
65 to 150
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
MIN
MAX
V
CC
DC supply voltage
4.5
5.5
V
V
I
Input voltage
0
V
CC
V
V
IH
High-level input voltage
2.0
V
V
IL
Low-level input voltage
0.8
V
I
OH
High-level output current
32
mA
I
OL
Low-level output current
64
mA
t/
v
Input transition rise or fall rate
0
5
ns/V
T
amb
Operating free-air temperature range
40
+85
C
Philips Semiconductors
Product specification
74ABT377A
Octal D-type flip-flop with enable
1997 Feb 26
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
C
T
amb
= 40
C
to +85
C
UNIT
MIN
TYP
MAX
MIN
MAX
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= 18mA
0.9
1.2
1.2
V
V
CC
= 4.5V; I
OH
= 3mA; V
I
= V
IL
or V
IH
2.5
2.9
2.5
V
V
OH
Highlevel output voltage
V
CC
= 5.0V; I
OH
= 3mA; V
I
= V
IL
or V
IH
3.0
3.4
3.0
V
V
CC
= 4.5V; I
OH
= 32mA; V
I
= V
IL
or V
IH
2.0
2.4
2.0
V
V
OL
Low-level output voltage
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
0.42
0.55
0.55
V
V
RST
Power-up output low
voltage
3
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
0.13
0.55
0.55
V
I
I
Input leakage current
V
CC
= 5.5V; V
I
= GND or 5.5V
0.01
1.0
1.0
A
I
OFF
Power-off leakage current
V
CC
= 0.0V; V
O
or V
I
4.5V
5.0
100
100
A
I
CEX
Output High leakage current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
5.0
50
50
A
I
O
Output current
1
V
CC
= 5.5V; V
O
= 2.5V
50
100
180
50
180
mA
I
CCH
Quiescent supply current
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
0.5
250
250
A
I
CCL
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
24
30
30
mA
I
CC
Additional supply current per
input pin
2
V
CC
= 5.5V; one input at 3.4V,
other inputs at V
CC
or GND
0.5
1.5
1.5
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
AC CHARACTERISTICS
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500
LIMITS
1
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
o
C
V
CC
= +5.0V
T
amb
= -40 to
+85
o
C
V
CC
= +5.0V +0.5V
UNIT
MIN
TYP
MAX
MIN
MAX
f
MAX
Maximum clock frequency
1
150
250
150
MHz
t
PLH
t
PHL
Propagation delay
CP to Qn
1
1.8
2.2
3.1
3.6
4.0
4.7
1.8
2.2
4.8
4.9
ns
NOTE:
1. Limits may vary among suppliers.
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