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Philips
Semiconductors
74ABT648
Octal transceiver/register, inverting
(3-State)
Product specification
Supersedes data of 1995 Apr 17
IC23 Data Handbook
1998 Jun 08
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74ABT648
Octal bus transceiver/register, inverting (3-State)
2
1998 Jun 08
8531613 19516
FEATURES
Combines 74ABT245 and 74ABT374 type functions in one device
Independent registers for A and B buses
Multiplexed real-time and stored data
Output capability: +64mA/32mA
Power-up 3-state
Power-up reset
Live insertion/extraction permitted
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT648 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT648 transceiver/register consists of bus transceiver
circuits with inverting 3-State outputs, D-type flip-flops, and control
circuitry arranged for multiplexed transmission of data directly from
the input bus or the internal registers. Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes High.
Output Enable (OE) and DIR pins are provided to control the
transceiver function. In the transceiver mode, data present at the
high impedance port may be stored in either the A or B register or
both.
The Select (SAB, SBA) pins determine whether data is stored or
transferred through the device in realtime. The DIR determines
which bus will receive data when the OE is active (Low). In the
isolation mode (OE = High), data from Bus A may be stored in the B
register and/or data from Bus B may be stored in the A register.
Outputs from real-time, or stored registers will be inverted. When an
output function is disabled, the input function is still enabled and
may be used to store and transmit data. Only one of the two buses,
A or B may be driven at a time. The examples on the next page
demonstrate the four fundamental bus management functions that
can be performed with the 74ABT648.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
An to Bn or Bn to An
C
L
= 50pF; V
CC
= 5V
5.9
ns
C
IN
Input capacitance
CP, S, OE, DIR
V
I
= 0V or V
CC
4
pF
C
I/O
I/O capacitance
Outputs disabled;
V
O
= 0V or V
CC
7
pF
I
CCZ
Total supply current
Outputs disabled; V
CC
=5.5V
110
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
24-Pin Plastic DIP
40
C to +85
C
74ABT648 N
74ABT648 N
SOT222-1
24-Pin plastic SO
40
C to +85
C
74ABT648 D
74ABT648 D
SOT137-1
24-Pin Plastic SSOP Type II
40
C to +85
C
74ABT648 DB
74ABT648 DB
SOT340-1
24-Pin Plastic TSSOP Type I
40
C to +85
C
74ABT648 PW
74ABT648PW DH
SOT355-1
PIN CONFIGURATION
SA00082
CPAB
SAB
DIR
A0
A1
A2
A3
A4
A5
A6
A7
GND
1
2
3
4
5
6
7
8
9
10
11
12
V
CC
CPBA
SBA
OE
B0
B1
B2
B3
B4
B5
B6
B7
13
14
15
16
17
18
19
20
21
22
23
24
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1, 23
CPAB /
CPBA
A to B clock input / B to A clock
input
2, 22
SAB / SBA
A to B select input / B to A select
input
3
DIR
Direction control input
4, 5, 6, 7,
8, 9, 10, 11
A0 A7
Data inputs/outputs (A side)
20, 19, 18, 17,
16, 15, 14, 13
B0 B7
Data inputs/outputs (B side)
21
OE
Output enable input (active-Low)
12
GND
Ground (0V)
24
V
CC
Positive supply voltage
Philips Semiconductors
Product specification
74ABT648
Octal bus transceiver/register, inverting (3-State)
1998 Jun 08
3
LOGIC SYMBOL
3
23
DIR
CPBA
22
SBA
21
OE
CPAB
1
SAB
2
SA00083
B0
B1
B2
B3
B4
B5
B6
B7
20
19
18
17
16
15
14
13
4
5
6
7
8
9
10
11
A0
A1
A2
A3
A4
A5
A6
A7
LOGIC SYMBOL (IEEE/IEC)
1
1
G3
3EN1 [BA]
3EN2 [AB]
G6
G7
C4
C5
4
20
5D
7
1
7
6
4D
6 1
1
2
5
6
7
8
9
10
11
19
18
17
16
15
14
13
SA00156
21
3
22
2
23
1
}
REAL TIME BUS TRANSFER
BUS B TO BUS A
OE
DIR CPAB CPBA SAB SBA
L
L
X
X
X
L
}
REAL TIME BUS TRANSFER
BUS A TO BUS B
OE
DIR CPAB CPBA SAB SBA
L
H
X
X
L
X
}
STORAGE FROM
A, B, OR A AND B
OE
DIR CPAB CPBA SAB SBA
L
H
X
L
X
L
X
X
X
X
H
X
X
X
}
TRANSFER STORED DATA
TO A OR B
OE
DIR CPAB CPBA SAB SBA
L
L
H
H or L
X
H
L
H
H or L
X
H
X
SA00177
Philips Semiconductors
Product specification
74ABT648
Octal bus transceiver/register, inverting (3-State)
1998 Jun 08
4
FUNCTION TABLE
INPUTS
DATA I/O
OPERATING MODE
OE
DIR
CPAB
CPBA
SAB
SBA
An
Bn
X
X
X
X
X
Input
Unspecified
output*
Store A, B unspecified
X
X
X
X
X
Unspecified
output*
Input
Store B, A unspecified
H
H
X
X
H or L
H or L
X
X
X
X
Input
Input
Store A and B data
Isolation, hold storage
L
L
L
L
X
X
X
H or L
X
X
L
H
Output
Input
Real time B data to A bus
Stored B data to A bus
L
L
H
H
X
H or L
X
X
L
H
X
X
Input
Output
Real time A data to B bus
Stored A data to B bus
H = High voltage level
L
= Low voltage level
X = Don't care
= Low-to-High clock transition
*
The data output function may be enabled or disabled by various signals at the OE input. Data input functions are always enabled, i.e.,
data at the bus pins will be stored on every Low-to-High transition of the clock.
LOGIC DIAGRAM
1D
C1
Q
19
18
17
16
15
14
13
B1
B2
B3
B4
B5
B6
B7
A1
A2
A3
A4
A5
A6
A7
DETAIL A X 7
OE
DIR
CPBA
SBA
CPAB
SAB
20
B0
1D
C1
Q
4
A0
1of 8 Channels
SA00081
5
6
7
8
9
10
11
2
1
22
23
3
21
Philips Semiconductors
Product specification
74ABT648
Octal bus transceiver/register, inverting (3-State)
1998 Jun 08
5
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +7.0
V
I
IK
DC input diode current
V
I
< 0
18
mA
V
I
DC input voltage
3
1.2 to +7.0
V
I
OK
DC output diode current
V
O
< 0
50
mA
V
OUT
DC output voltage
3
output in Off or High state
0.5 to +5.5
V
I
OUT
DC output current
output in Low state
128
mA
T
stg
Storage temperature range
65 to 150
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
Min
Max
V
CC
DC supply voltage
4.5
5.5
V
V
I
Input voltage
0
V
CC
V
V
IH
High-level input voltage
2.0
V
V
IL
Low-level Input voltage
0.8
V
I
OH
High-level output current
32
mA
I
OL
Low-level output current
64
mA
t/
v
Input transition rise or fall rate
0
10
ns/V
T
amb
Operating free-air temperature range
40
+85
C