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Электронный компонент: 74ABTH16241A

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Philips
Semiconductors
74ABT16241A
74ABTH16241A
16-bit buffer/driver (3-State)
Product specification
Supersedes data of 1997 Jun 12
IC23 Data Handbook
1998 Feb 25
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74ABT16241A
74ABTH16241A
16-bit buffer/driver (3-State)
2
1998 Feb 25
853-1991 19019
FEATURES
16-bit bus interface
3-State buffers
Output capability: +64mA/-32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
Power-up 3-State
74ABTH16241A incorporates bus hold data inputs which eliminate
the need for external pull up resistors to hold unused inputs
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74ABT16241A is a high-performance BiCMOS device which
combines low static and dynamic power dissipation with high speed
and high output drive.
This device is a 16-bit buffer that is ideal for driving bus lines. The
device features four Output Enables (1OE, 2OE, 3OE, 4OE), each
controlling four of the 3-State outputs.
Two options are available, 74ABT16241A which does not have the
bus hold feature and 74ABTH16241A which incorporates the bus
hold feature.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
C
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
nAx to nYx
C
L
= 50pF;
V
CC
=
1.8
1.6
ns
C
IN
Input capacitance nOE
V
I
= 0V or 3.0V
4
pF
C
OUT
Output capacitance
Outputs disabled; V
O
= 0V or
6
pF
I
CCZ
Quiescent supply current
Outputs disabled; V
CC
=
500
A
I
CCL
Quiescent su
ly current
Outputs low; V
CC
= 5.5V
8
mA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
48-Pin Plastic SSOP Type III
40
C to +85
C
74ABT16241A DL
BT16241A DL
SOT370-1
48-Pin Plastic TSSOP Type II
40
C to +85
C
74ABT16241A DGG
BT16241A DGG
SOT362-1
48-Pin Plastic SSOP Type III
40
C to +85
C
74ABTH16241A DL
BH16241A DL
SOT370-1
48-Pin Plastic TSSOP Type II
40
C to +85
C
74ABTH16241A DGG
BH16241A DGG
SOT362-1
LOGIC SYMBOL
1OE
1
1A0
47
1A1
46
1A2
44
1A3
43
2OE
48
2A0
41
2A1
2
40
2A2
38
3
2A3
37
5
6
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
8
9
11
12
3OE
25
3A0
36
3A1
35
3A2
33
3A3
32
4OE
24
4A0
30
4A1
13
29
4A2
27
14
4A3
26
16
17
3Y0
3Y1
3Y2
3Y3
4Y0
4Y1
4Y2
4Y3
19
20
22
23
SA00432
Philips Semiconductors
Product specification
74ABT16241A
74ABTH16241A
16-bit buffer/driver (3-State)
1998 Feb 25
3
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Y0
1Y1
GND
1Y2
1Y3
2Y0
2Y1
GND
2Y2
2Y3
3Y0
3Y1
GND
3Y4
V
CC
4Y0
V
CC
3Y2
4Y1
GND
4Y3
4OE
4Y2
2OE
1A0
1A1
GND
1A2
1A3
2A0
2A1
GND
2A2
2A3
3A0
3A1
GND
3A3
V
CC
4A0
V
CC
3A2
4A1
GND
4A3
3OE
4A2
SA00434
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
47, 46, 44, 43,
41, 40, 38, 37,
36, 35, 33, 32,
30, 29, 27, 26
1A0-1A3
2A0-2A3
3A0-3A3
4A0-4A3
Data inputs
2, 3, 5, 6,
8, 9, 11, 12,
13, 14, 16, 17,
19, 20, 22, 23
1Y0-1Y3
2Y0-2Y3
3Y0-3Y3
4Y0-4Y3
Data outputs
1, 48, 25, 24
1OE, 2OE,
3OE, 4OE
Output enables
4, 10, 15, 21,
28, 34, 39, 45
GND
Ground (0V)
7, 18, 31, 42
V
CC
Positive supply voltage
LOGIC SYMBOL (IEEE/IEC)
48
EN1
1
46
44
43
41
40
38
37
36
EN2
EN3
EN4
1
2
1
3
1
4
1
1
25
24
47
35
33
32
30
29
27
26
3
2
5
6
8
9
11
12
13
14
16
17
19
20
22
23
1OE
2OE
3OE
4OE
1A1
1A2
1A3
1A4
2A1
2A2
2A3
3A1
3A2
3A3
3A4
4A1
4A2
4A3
4A4
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
3Y1
3Y2
3Y3
3Y4
4Y1
4Y4
2A4
4Y2
4Y3
SA00433
FUNCTION TABLE
Inputs
Outputs
1OE, 4OE
1An, 4An
1Yn, 4Yn
L
L
L
L
H
H
H
X
Z
2OE, 3OE
2An, 3An
2Yn, 3Yn
H
L
L
H
H
H
L
X
Z
H = High voltage level
L = Low voltage level
X = Don't care
Z = High Impedance "off " state
Philips Semiconductors
Product specification
74ABT16241A
74ABTH16241A
16-bit buffer/driver (3-State)
1998 Feb 25
4
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
-0.5 to +7.0
V
I
IK
DC input diode current
V
I
< 0
18
mA
V
I
DC input voltage
3
1.2 to +7.0
V
I
OK
DC output diode current
V
O
< 0
50
mA
V
OUT
DC output voltage
3
Output in Off or High state
0.5 to +5.5
V
I
O
DC output current
Output in Low state
128
mA
I
OUT
DC output current
Output in High state
-64
mA
T
stg
Storage temperature range
-65 to +150
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN
MAX
UNIT
V
CC
DC supply voltage
4.5
5.5
V
V
I
Input voltage
0
V
CC
V
V
IH
High-level input voltage
2.0
V
V
IL
Input voltage
0.8
V
I
OH
High-level output current
32
mA
I
OL
Low-level output current
32
mA
Low-level output current; current duty cycle
50%; f
1kHz
64
t/
v
Input transition rise or fall rate; Outputs enabled
0
10
ns/V
T
amb
Operating free-air temperature range
40
+85
C
Philips Semiconductors
Product specification
74ABT16241A
74ABTH16241A
16-bit buffer/driver (3-State)
1998 Feb 25
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
C
T
amb
= 40
C
to +85
C
UNIT
Min
Typ
Max
Min
Max
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= 18mA
0.9
1.2
1.2
V
V
CC
= 4.5V; I
OH
= 3mA; V
I
= V
IL
or V
IH
2.5
2.9
2.5
V
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= 3mA; V
I
= V
IL
or V
IH
3.0
3.4
3.0
V
V
CC
= 4.5V; I
OH
= 32mA; V
I
= V
IL
or V
IH
2.0
2.4
2.0
V
V
OL
Low-level output voltage
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
0.42
0.55
0.55
V
I
I
Input leakage current
V
CC
= 5.5V; V
I
= GND or 5.5V
0.01
1.0
1.0
A
I
Input leakage current
V
CC
= 5.5V; V
I
= V
CC
or GND
Control
pins
0.01
1
1
A
I
I
In ut leakage current
74ABTH16241A
V
CC
= 5.5V; V
I
= V
CC
Data pins
0.01
1
1
A
V
CC
= 5.5V; V
I
= 0
Data ins
2
3
5
A
Bus Hold current A inputs
3
V
CC
= 4.5V; V
I
= 0.8V
75
75
I
HOLD
Bus Hold current A inputs
3
74ABTH16241A
V
CC
= 4.5V; V
I
= 2.0V
75
75
A
74ABTH16241A
V
CC
= 5.5V; V
I
= 0 to 5.5V
500
I
OFF
Power-off leakage current
V
CC
= 0.0V; V
O
or V
I
4.5V
5.0
100
100
A
I
PU
/I
PD
Power-up/down 3-State
output current
V
CC
= 2.0V; V
O
= 0.5V; V
I
= GND or V
CC
;
V
OE
= V
CC
5.0
50
50
A
I
OZH
3-State output High current
V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
1.0
10
10
A
I
OZL
3-State output Low current
V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
1.0
10
10
A
I
CEX
Output high leakage current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
1.0
50
50
A
I
O
Output current
1
V
CC
= 5.5V; V
O
= 2.5V
50
70
180
50
180
mA
I
CCH
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
0.5
1.0
1.0
mA
I
CCL
Quiescent supply current
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
8
19
19
mA
I
CCZ
Quiescent su
ly current
V
CC
= 5.5V; Outputs 3-State;
V
I
= GND or V
CC
0.5
1.0
1.0
mA
I
CC
Additional supply current per
input pin
2
Outputs enabled, one input at 3.4V, other
inputs at V
CC
or GND; V
CC
= 5.5V
10
200
200
A
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500
; T
amb
= -40
C to +85
C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
C
V
CC
= +5.0V
T
amb
= 40
C to +85
C
V
CC
= +5.0V
0.5V
UNIT
Min
Typ
Max
Min
Max
t
PLH
t
PHL
Propagation delay
nAx to nYx
1
1.0
1.0
1.8
1.6
2.6
2.4
1.0
1.0
3.1
2.9
ns
t
PZH
t
PZL
Output enable time
to High and Low level
2
1.0
1.0
2.4
2.6
3.4
4.6
1.0
1.0
3.9
5.0
ns
t
PHZ
t
PLZ
Output disable time
from High and Low level
2
1.3
1.3
3.0
2.4
4.3
3.6
1.0
1.0
5.3
4.2
ns