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Электронный компонент: 74ABTH16273

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Philips
Semiconductors
74ABT16273
74ABTH16273
16-bit D-type flip-flop
Product specification
Supersedes data of 1995 Sep 28
IC23 Data Handbook
1998 Feb 27
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
2
1998 Feb 27
853-1793 19027
FEATURES
16-bit D-type edge triggered flip-flops
Output capability: +64mA/32mA
TTL input and output switching levels
Live insertion/extraction permitted
Power-up reset
74ABTH16273 incorporates bus-hold data inputs which eliminate
the need for external pull-up resistors to hold unused inputs
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74ABT16273 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
This part is a 16-bit edge triggered D-type flip-flop with non-inverting
high drive outputs. This device can be used as two 8-bit flip-flops or
one 16-bit flip-flop. When the clock (CP) goes High, the data on the
D inputs is stored and the Q outputs display the stored data.
This device also features a master reset (MR) that resets all
flip-flops to the Low state when MR is set to the Low state.
Two options are available, 74ABT16273 which does not have the
bus-hold feature and 74ABTH16273 which incorporates the
bus-hold feature.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
An to Bn or Bn to An
C
L
= 50pF;
V
CC
= 5.0V
2.5
2.0
ns
C
IN
Input capacitance
V
I
= 0V or V
CC
4
pF
I
CCH
Quiescent supply current
Outputs High; V
CC
= 5.5V
200
A
I
CCL
Quiescent su
ly current
Outputs low; V
CC
= 5.5V
8
mA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
48-Pin Plastic SSOP Type III
40
C to +85
C
74ABT16273 DL
BT16273 DL
SOT370-1
48-Pin Plastic TSSOP Type II
40
C to +85
C
74ABT16273 DGG
BT16273 DGG
SOT362-1
48-Pin Plastic SSOP Type III
40
C to +85
C
74ABTH16273 DL
BH16273 DL
SOT370-1
48-Pin Plastic TSSOP Type II
40
C to +85
C
74ABTH16273 DGG
BH16273 DGG
SOT362-1
LOGIC SYMBOL
3
2
1Q0 1Q1 1Q2
6
5
1Q3
47
46
44
43
1D0 1D1 1D2 1D3
48
1
9
8
1Q4 1Q5 1Q6
12
11
1Q7
41
40
38
37
1D4 1D5 1D6 1D7
CP
MR
14
13
17
16
36
35
33
32
25
24
20
19
23
22
30
29
27
26
2Q0 2Q1 2Q2 2Q3
2D0 2D21 2D2 2D3
2Q4 2Q5 2Q6 2Q7
2D4 2D5 2D6 2D7
CP
MR
SH00052
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND
FUNCTION
1, 24
1MR, 2MR
Master reset input
(active-Low)
2, 3, 5, 6, 8, 9, 11, 12,13,
14, 16, 17, 19, 20, 22, 23
1Q0-1Q7
2Q0-2Q7
Data outputs
47, 46, 44, 43, 41, 40, 38, 37,
36, 35, 33, 32, 30, 29, 27, 26
1D0-1D7
2D0-2D7
Data inputs
25, 48
1CP, 2CP
Clock pulse input
(active rising edge)
4, 10, 15, 21, 28, 34, 39, 45
GND
Ground (0V)
7, 18, 31, 42
V
CC
Positive supply
voltage
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
1998 Feb 27
3
LOGIC SYMBOL (IEEE/IEC)
1
1D
2
2D
SH00053
1
48
24
25
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
R1
C1
R2
C2
1MR
1Q0
!Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
2Q0
2Q1
2Q3
2Q4
2Q2
2Q5
2Q7
2MR
2Q6
CP
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
2D0
2D1
2D3
2D4
2D2
2D5
2D7
2CP
2D6
FUNCTION TABLE
Inputs
Output
operating
mode
nMR
nCP
nDX
nQ0-nQ7
mode
L
X
X
L
Reset (clear)
H
h
H
Load "1"
H
I
L
Load "0"
H
L
X
Q
0
Retain state
H = High voltage level
h
= high voltage level one set-up time prior to the Low-to-High
clock transition
L
= Low voltage level
I
= Low voltage level one set-up time prior to the Low-to-High
clock
transition
X = Don't care
= Low-to-High clock transition
Q
0 =
Output as it was
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1MR
1Q0
!Q1
GND
1Q2
1Q3
1Q4
1Q5
GND
1Q6
1Q7
2Q0
2Q1
GND
2Q3
VCC
2Q4
VCC
2Q2
2Q5
GND
2Q7
2MR
2Q6
CP
1D0
1D1
GND
1D2
1D3
1D4
1D5
GND
1D6
1D7
2D0
2D1
GND
2D3
VCC
2D4
VCC
2D2
2D5
GND
2D7
2CP
2D6
SH00054
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
1998 Feb 27
4
LOGIC DIAGRAM
CP
Q
RD
D
nD0
nQ0
CP
Q
RD
D
nD1
CP
Q
RD
D
nD2
CP
Q
RD
D
nD3
CP
Q
RD
D
nD4
CP
Q
RD
D
nD5
CP
Q
RD
D
nD6
CP
Q
RD
D
nD7
nQ1
nQ2
nQ3
nQ4
nQ5
nQ6
nQ7
nCP
nMR
SH00055
n = 1 or 2
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to 7.0
V
I
IK
DC input diode current
V
I
< 0
18
mA
V
I
DC input voltage
3
1.2 to +7.0
V
I
OK
DC output diode current
V
O
< 0
50
mA
V
OUT
DC output voltage
3
Output in Off or High state
0.5 to +5.5
V
I
O
DC output current
Output in Low state
128
mA
I
OUT
DC output current
Output in High state
64
mA
T
stg
Storage temperature range
65 to +150
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
MIN
MAX
V
CC
DC supply voltage
4.5
5.5
V
V
I
Input voltage
0
V
CC
V
V
IH
High-level input voltage
2.0
V
V
IL
Input voltage
0.8
V
I
OH
High-level output current
32
mA
I
OL
Low-level output current
64
mA
t/
v
Input transition rise or fall rate; Outputs enabled
0
10
ns/V
T
amb
Operating free-air temperature range
40
+85
C
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
1998 Feb 27
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = +25
C
Temp = -40
C
to +85
C
UNIT
MIN
TYP
MAX
MIN
MAX
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= 18mA
0.9
1.2
1.2
V
V
CC
= 4.5V; I
OH
= 3mA; V
I
= V
IL
or V
IH
2.5
2.9
2.5
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= 3mA; V
I
= V
IL
or V
IH
3.0
3.4
3.0
V
V
CC
= 4.5V; I
OH
= 32mA; V
IL
or V
IH
2.0
2.4
2.0
V
OL
Low-level output voltage
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
0.42
0.55
0.55
V
RST
Power-up output
voltage
3
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
0.13
0.55
0.55
V
Input leakage current
I
Input leakage current
V
CC
= 5 5V; V = V
CC
or GND
0 1
1
1
A
I
I
g
74ABT16273
V
CC
= 5.5V; V
I
= V
CC
or GND
0.1
1
1
A
I
74ABT16273
CC
I
CC
Input leakage current
V
CC
= 5.5V; V
I
= V
CC
or GND
Control
pins
0.01
1
1
A
I
I
In ut leakage current
74ABTH16273
V
CC
= 5.5V; V
I
= V
CC
Data pins
0.01
1
1
A
V
CC
= 5.5V; V
I
= 0
Data pins
2
3
5
A
B
H ld
t i
t
4
V
CC
= 4.5V; V
I
= 0.8V
35
35
I
HOLD
Bus Hold current inputs
4
74ABTH16273
V
CC
= 4.5V; V
I
= 2.0V
75
75
A
V
CC
= 5.5V; V
I
= 0 to 5.5V
800
I
OFF
Power-off leakage
current
V
CC
= 0.0V; V
O
or V
I
t
4.5V
5.0
100
100
A
I
O
output current
1
V
CC
= 5.5V; V
O
= 2.5V
50
70
180
50
180
mA
I
CEX
Output High leakage
current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
5.0
50
50
A
I
CCH
Quiescent supply current
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
0.2
1
1
mA
I
CCL
Quiescent supply current
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
8
19
19
mA
I
CC
Additional supply current
per input pin
2
74ABT16273
V
CC
= 5.5V; One input at 3.4V.
Other inputs at V
CC
or GND
5
100
100
A
I
CC
Additional supply current
per input pin
2
74ABTH16273
V
CC
= 5.5V; One input at 3.4V.
Other inputs at V
CC
or GND
0.2
1
1
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500
;
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
C
V
CC
= +5.0V
T
amb
= 40 to +85
C
V
CC
= +5.0V
0.5V
UNIT
MIN
TYP
MAX
MIN
MAX
t
PLH
t
PHL
Propagation delay
nCP to nQx
1
1.5
1.2
2.5
2.0
3.4
2.7
1.5
1.2
4.0
3.0
ns
t
PHL
Propagation delay
nMR to nQx
2
1.9
3.7
4.3
1.9
5.3
ns
f
MAX
Maximum clock frequency
1
150
240
150
MHz
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
1998 Feb 27
6
AC SETUP REQUIREMENTS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
C
V
CC
= +5.0V
T
amb
= 40 to +85
C
V
CC
= +5.0V
0.5V
UNIT
MIN
TYP
MIN
t
S
(H)
t
S
(L)
Setup time, High or Low
nDx to nCP
3
2.0
2.0
1.0
1.0
2.0
2.0
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
nDx to nCP
3
0
0
0.6
0.6
0
0
ns
t
W
(H)
t
W
(L)
Clock pulse width
High or Low
1
3.3
3.3
1.2
1.0
3.3
3.3
ns
t
W
(L)
Master Reset pulse width, Low
2
3.3
1.1
3.3
ns
t
REC
Recovery time
nMR + nCP
2
2.0
0.0
2.0
ns
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 2.7V
VM
tPLH
tPHL
VM
VM
VM
nCP
nQx
1/fMAX
tW(H)
tW(L)
SH00056
V
OL
V
OH
0V
VM
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
V
M
nMR
V
M
nQx
t
w
(L)
V
M
t
PHL
V
M
t
REC
nCP
SH00057
0V
0V
V
OH
V
OL
Waveform 2. Master Reset Pulse Width, Master Reset to Output
Delay and Master Reset to Clock Recovery Time
NOTE: The shaded areas indicate when the input is
permitted to change for predictable output performance.
V
M
nDx
V
M
V
M
V
M
V
M
nCP
t
s
(H)
t
h
(H)
t
s
(L)
t
h
(L)
SH00058
V
M
0V
0V
Waveform 3. Data Setup and Hold Times
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
1998 Feb 27
7
TEST CIRCUIT AND WAVEFORM
PULSE
GENERATOR
RT
VIN
D.U.T.
VOUT
CL
RL
VCC
Test Circuit for Outputs
VM
VM
tW
AMP (V)
NEGATIVE
PULSE
10%
10%
90%
90%
0V
VM
VM
tW
AMP (V)
POSITIVE
PULSE
90%
90%
10%
10%
0V
tTHL (tF)
tTLH (tR)
tTHL (tF)
tTLH (tR)
V
M
= 1.5V
Input Pulse Definition
DEFINITIONS
R
L
=
Load resistor; see AC CHARACTERISTICS for value.
C
L
=
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R
T
=
Termination resistance should be equal to Z
OUT
of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
74ABT16
SH00059
Amplitude
Rep. Rate
t
W
t
F
3.0V
1MHz
500ns
2.5ns
t
R
2.5ns
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
1998 Feb 27
8
SSOP48:
plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT370-1
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
1998 Feb 27
9
TSSOP48:
plastic thin shrink small outline package; 48 leads; body width 6.1mm
SOT362-1
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
yyyy mmm dd
10
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code
Date of release: 05-96
Document order number:
9397-750-03489
Philips
Semiconductors
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
[1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1]
Please consult the most recently issued datasheet before initiating or completing a design.