Philips
Semiconductors
74ALVT16601
18-bit universal bus transceiver (3-State)
Product specification
Supersedes data of 1996 Nov 14
IC23 Data Handbook
1998 Feb 13
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74ALVT16601
2.5V/3.3V 18-bit universal bus transceiver (3-State)
2
1998 Feb 13
853-1885 18958
FEATURES
18-bit bidirectional bus interface
5V I/O Compatible
3-State buffers
Output capability: +64mA/-32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
No bus current loading when output is tied to 5V bus
Positive edge triggered clock inputs
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74ALVT16601 is a high-performance BiCMOS product
designed for V
CC
operation at 2.5V and 3.3V with I/O compatibility
up to 5V.
This device is an 18-bit universal transceiver featuring non-inverting
3-State bus compatible outputs in both send and receive directions.
Data flow in each direction is controlled by output enable (OEAB and
OEBA), latch enable (LEAB and LEBA), and clock (CPAB and
CPBA) inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is High. When LEAB is Low, the A
data is latched if CPAB is held at a High or Low logic level. If LEAB
is Low, the A-bus data is stored in the latch/flip-flop on the
Low-to-High transition of CPAB. When OEAB is Low, the outputs are
active. When OEAB is High, the outputs are in the high-impedance
state. The clocks can be controlled with the clock-enable inputs
(CEBA/CEAB).
Data flow for B-to-A is similar to that of A-to-B but uses OEBA,
LEBA and CPBA.
Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
SYMBOL
PARAMETER
T
amb
= 25
C
2.5V
3.3V
UNIT
t
PLH
t
PHL
Propagation delay
An to Bn or Bn to An
C
L
= 50pF
1.9
2.5
1.5
1.9
ns
C
IN
Input capacitance (Control pins)
V
I
= 0V or V
CC
4
4
pF
C
I/O
I/O pin capacitance
Outputs disabled; V
I/O
= 0V or V
CC
8
8
pF
I
CCZ
Total supply current
Outputs disabled
40
60
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
56-Pin Plastic SSOP Type III
40
C to +85
C
74ALVT16601 DL
AV16601 DL
SOT371-1
56-Pin Plastic TSSOP Type II
40
C to +85
C
74ALVT16601 DGG
AV16601 DGG
SOT364-1
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1, 27
OEAB/OEBA
A-to-B/ B-to-A Output enable input
(active Low)
29, 56
CEBA/CEAB
B-to-A/A-to-B clock enable
2, 28
LEAB/LEBA
A-to-B/B-to-A Latch enable input
55,30
CPAB/CPBA
A-to-B/B-to-A Clock input (active rising edge)
3, 5, 6, 8, 9, 10, 12, 13, 14, 15,
16, 17, 19, 20, 21, 23, 24, 26
A0-A17
Data inputs/outputs (A side)
54, 52, 51, 49, 48, 47, 45, 44, 43,
42, 41, 40, 38, 37, 36, 34, 33, 31
B0-B17
Data inputs/outputs (B side)
4, 11, 18, 25, 32, 39, 46, 53
GND
Ground (0V)
7, 22, 35, 50
V
CC
Positive supply voltage
Philips Semiconductors
Product specification
74ALVT16601
2.5V/3.3V 18-bit universal bus transceiver (3-State)
1998 Feb 13
3
PIN CONFIGURATION
GND
GND
CEAB
GND
LEAB
OEAB
GND
VCC
VCC
GND
GND
VCC
VCC
GND
CEBA
GND
LEBA
OEBA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
CPAB
B0
B2
B1
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
CPBA
SW00192
A0
FUNCTION TABLE
INPUTS
OUTPUT
CEAB
OEAB
LEAB
CPAB
A
B
X
H
X
X
X
Z
X
L
H
X
L
L
X
L
H
X
H
H
H
L
L
X
X
B
O
L
L
L
L
L
L
L
L
H
H
L
L
L
H
X
B
O
L
L
L
L
X
B
O
X = Don't care
H = High voltage level
L = Low voltage level
= Low to High
Z = High impedance "off " state
= A-to-B data flow is shown: B-to-A flow is similar but uses
OEBA, LEBA, CPBA, and CEBA.
= Output level before the indicated steady-state input conditions
were established.
= Output level before the indicated steady-state input conditions
were established, provided that CPAB was Low before LEAB
went Low.
Philips Semiconductors
Product specification
74ALVT16601
2.5V/3.3V 18-bit universal bus transceiver (3-State)
1998 Feb 13
4
LOGIC SYMBOL (Positive Logic)
CE
ID
ID
CE
OEAB
CEAB
CPAB
LEAB
CPBA
LEBA
1
56
55
2
28
30
54
B0
To 17 other channels
SW00193
CEBA
A0
OEBA
29
27
3
C1
CLK
C1
CLK
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +4.6
V
I
IK
DC input diode current
V
I
< 0
50
mA
V
I
DC input voltage
3
0.5 to +7.0
V
I
OK
DC output diode current
V
O
< 0
50
mA
V
OUT
DC output voltage
3
Output in Off or High state
0.5 to +7.0
V
I
OUT
DC output current
Output in Low state
128
mA
I
OUT
DC out ut current
Output in High state
64
mA
T
stg
Storage temperature range
65 to +150
C
NOTES:
1.
Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2.
The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
C.
3.
The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
Philips Semiconductors
Product specification
74ALVT16601
2.5V/3.3V 18-bit universal bus transceiver (3-State)
1998 Feb 13
5
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
2.5V RANGE LIMITS
3.3V RANGE LIMITS
UNIT
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
UNIT
V
CC
DC supply voltage
2.3
2.7
3.0
3.6
V
V
I
Input voltage
0
5.5
0
5.5
V
V
IH
High-level input voltage
1.7
2.0
V
V
IL
Input voltage
0.7
0.8
V
I
OH
High-level output current
8
32
mA
I
OL
Low-level output current
8
32
mA
I
OL
Low-level output current; current duty cycle
50%; f
1kHz
24
64
mA
t/
v
Input transition rise or fall rate; Outputs enabled
10
10
ns/V
T
amb
Operating free-air temperature range
40
+85
40
+85
C
DC ELECTRICAL CHARACTERISTICS (3.3V
"
0.3V RANGE)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
C to +85
C
UNIT
MIN
TYP
1
MAX
V
IK
Input clamp voltage
V
CC
= 3.0V; I
IK
= 18mA
0.85
1.2
V
V
OH
High-level output voltage
V
CC
= 3.0 to 3.6V; I
OH
= 100
A
V
CC
0.2
V
CC
V
V
OH
High-level out ut voltage
V
CC
= 3.0V; I
OH
= 32mA
2.0
2.3
V
V
CC
= 3.0V; I
OL
= 100
A
0.07
0.2
V
OL
Lowlevel output voltage
V
CC
= 3.0V; I
OL
= 16mA
0.25
0.4
V
V
OL
Lowlevel out ut voltage
V
CC
= 3.0V; I
OL
= 32mA
0.3
0.5
V
V
CC
= 3.0V; I
OL
= 64mA
0.4
0.55
V
RST
Power-up output low voltage
6
V
CC
= 3.6V; I
O
= 1mA; V
I
= V
CC
or GND
0.55
V
V
CC
= 3.6V; V
I
= V
CC
or GND
Control pins
0.1
1
V
CC
= 0 or 3.6V; V
I
= 5.5V
0.1
10
I
I
Input leakage current
V
CC
= 3.6V; V
I
= 5.5V
4
0.1
20
A
V
CC
= 3.6V; V
I
= V
CC
Data pins
4
0.5
10
V
CC
= 3.6V; V
I
= 0V
0.1
-5
I
OFF
Off current
V
CC
= 0V; V
I
or V
O
= 0 to 4.5V
0.1
100
A
Bus Hold current
V
CC
= 3V; V
I
= 0.8V
75
130
I
HOLD
Bus Hold current
Data inputs
7
V
CC
= 3V; V
I
= 2.0V
75
140
A
Data inputs
7
V
CC
= 0V to 3.6V; V
CC
= 3.6V
500
I
EX
Current into an output in the
High state when V
O
> V
CC
V
O
= 5.5V; V
CC
= 3.0V
10
125
A
I
PU/PD
Power up/down 3-State output
current
3
V
CC
1.2V; V
O
= 0.5V to V
CC
; V
I
= GND or V
CC
OE = Don't care
1.0
100
A
I
CCH
V
CC
= 3.6V; Outputs High, V
I
= GND or V
CC,
I
O =
0
0.06
0.1
I
CCL
Quiescent supply current
V
CC
= 3.6V; Outputs Low, V
I
= GND or V
CC,
I
O =
0
3.5
5
mA
I
CCZ
V
CC
= 3.6V; Outputs Disabled; V
I
= GND or V
CC,
I
O =
0
5
0.06
0.1
I
CC
Additional supply current per
input pin
2
V
CC
= 3V to 3.6V; One input at V
CC
0.6V,
Other inputs at V
CC
or GND
0.04
0.4
mA
NOTES:
1.
All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
2.
This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND
3.
This parameter is valid for any V
CC
between 0V and 1.2V with a transition time of up to 10msec. From V
CC
= 1.2V to V
CC
= 3.3V
0.3V a
transition time of 100
sec is permitted. This parameter is valid for T
amb
= 25
C only.
4.
Unused pins at V
CC
or GND.
5.
I
CCZ
is measured with outputs pulled up to V
CC
or pulled down to ground.
6.
For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
7.
This is the bus hold overdrive current required to force the input to the opposite logic state.
Philips Semiconductors
Product specification
74ALVT16601
2.5V/3.3V 18-bit universal bus transceiver (3-State)
1998 Feb 13
6
AC CHARACTERISTICS (3.3V
"
0.3V RANGE)
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500
; T
amb
= 40
C to +85
C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3V
0.3V
UNIT
MIN
TYP
1
MAX
f
MAX
Maximum clock frequency
1
MHz
t
PLH
t
PHL
Propagation delay
An to Bn or Bn to An
2
1.0
1.0
1.5
1.9
2.3
2.9
ns
t
PLH
t
PHL
Propagation delay Clock Low or High
LEAB to Bn or LEBA to An
3
1.5
1.5
2.2
2.6
3.5
3.9
ns
t
PLH
t
PHL
Propagation delay
CPAB to Bn or CPBA to An
1
1.5
1.5
2.2
2.9
3.3
4.1
ns
t
PZH
t
PZL
Output enable time
to High and Low level
5
6
1.0
1.0
2.3
1.6
3.9
2.8
ns
t
PHZ
t
PLZ
Output disable time
from High and Low Level
5
6
1.5
1.5
2.9
2.4
4.1
3.6
ns
NOTE:
1.
All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
AC SETUP REQUIREMENTS (3.3V
"
0.3V RANGE)
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500
; T
amb
= 40
C to +85
C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3V
0.3V
UNIT
MIN
TYP
1
ts(H)
ts(L)
Setup time, High or Low
An to CPAB or Bn to CPBA
4
1.5
1.5
0.4
0.6
ns
th(H)
th(L)
Hold time, High or Low
An to CPAB or Bn to CPBA
4
1.0
1.0
0.5
0.3
ns
ts(H)
ts(L)
Setup time, High or Low Clock Low
An to LEAB or Bn to LEBA
4
1.0
1.0
0.5
0.1
ns
th(H)
th(L)
Hold time, High or Low Clock High
An to LEAB or Bn to LEBA
4
1.5
1.5
0.1
0.5
ns
ts(H)
ts(L)
Setup time
CEAB before CPAB or
CEBA before CPBA
4
1.5
1.0
0.3
0.4
ns
th(H)
th(L)
Hold time
CEAB after CPAB or
CEBA after CPBA
4
1.5
1.0
0.7
0.3
ns
tw(H)
tw(L)
Pulse width, High or Low
CPAB or CPBA
1
2.0
2.0
ns
tw(H)
LEAB or LEBA pulse width, High
3
1.5
ns
NOTE:
1.
All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
Philips Semiconductors
Product specification
74ALVT16601
2.5V/3.3V 18-bit universal bus transceiver (3-State)
1998 Feb 13
7
DC ELECTRICAL CHARACTERISTICS (2.5V
"
0.2V RANGE)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
C to +85
C
UNIT
MIN
TYP
1
MAX
V
IK
Input clamp voltage
V
CC
= 2.3V; I
IK
= 18mA
0.85
1.2
V
V
OH
High-level output voltage
V
CC
= 2.3 to 3.6V; I
OH
= 100
A
V
CC
0.2
V
V
OH
High-level out ut voltage
V
CC
= 2.3V; I
OH
= 8mA
1.8
V
V
CC
= 2.3V; I
OL
= 100
A
0.07
0.2
V
OL
Low-level output voltage
V
CC
= 2.3V; I
OL
= 24mA
0.3
0.5
V
V
CC
= 2.3V; I
OL
= 8mA
0.4
V
RST
Power-up output low voltage
7
V
CC
= 2.7V; I
O
= 1mA; V
I
= V
CC
or GND
0.55
V
V
CC
= 2.7V; V
I
= V
CC
or GND
Control pins
0.1
1
V
CC
= 0 or 2.7V; V
I
= 5.5V
0.1
10
I
I
Input leakage current
V
CC
= 2.7V; V
I
= 5.5V
4
0.1
20
A
V
CC
= 2.7V; V
I
= V
CC
Data pins
4
0.1
10
V
CC
= 2.7V; V
I
= 0
0.1
-5
I
OFF
Off current
V
CC
= 0V; V
I
or V
O
= 0 to 4.5V
0.1
"
100
A
I
HOLD
Bus Hold current
V
CC
= 2.3V; V
I
= 0.7V
90
A
HOLD
Data inputs
6
V
CC
= 2.3V; V
I
= 1.7V
75
A
I
EX
Current into an output in the
High state when V
O
> V
CC
V
O
= 5.5V; V
CC
= 2.3V
10
125
A
I
PU/PD
Power up/down 3-State output
current
3
V
CC
1.2V; V
O
= 0.5V to V
CC
; V
I
= GND or V
CC
;
OE = Don't care
1
100
A
I
CCH
V
CC
= 2.7V; Outputs High, V
I
= GND or V
CC,
I
O =
0
0.04
0.1
I
CCL
Quiescent supply current
V
CC
= 2.7V; Outputs Low, V
I
= GND or V
CC,
I
O =
0
2.5
4.5
mA
I
CCZ
V
CC
= 2.7V; Outputs Disabled; V
I
= GND or V
CC,
I
O
=
0
5
0.04
0.1
I
CC
Additional supply current per
input pin
2
V
CC
= 2.3V to 2.7V; One input at V
CC
0.6V,
Other inputs at V
CC
or GND
0.01
0.4
mA
NOTES:
1.
All typical values are at V
CC
= 2.5V and T
amb
= 25
C.
2.
This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND
3.
This parameter is valid for any V
CC
between 0V and 1.2V with a transition time of up to 10msec. From V
CC
= 1.2V to V
CC
= 2.5V
0.2V a
transition time of 100
sec is permitted. This parameter is valid for T
amb
= 25
C only.
4.
Unused pins at V
CC
or GND.
5.
I
CCZ
is measured with outputs pulled up to V
CC
or pulled down to ground.
6.
Not guaranteed.
7. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
Philips Semiconductors
Product specification
74ALVT16601
2.5V/3.3V 18-bit universal bus transceiver (3-State)
1998 Feb 13
8
AC CHARACTERISTICS (2.5V
"
0.2V RANGE)
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500
; T
amb
= 40
C to +85
C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 2.5V
0.2V
UNIT
MIN
TYP
1
MAX
f
MAX
Maximum clock frequency
1
MHz
t
PLH
t
PHL
Propagation delay
An to Bn or Bn to An
2
1.0
1.0
1.9
2.5
3.0
3.7
ns
t
PLH
t
PHL
Propagation delay Clock Low or High
LEAB to Bn or LEBA to An
3
2.0
2.0
3.1
3.5
4.6
5.2
ns
t
PLH
t
PHL
Propagation delay
CPAB to Bn or CPBA to An
1
2.0
2.0
3.4
4.0
5.0
5.9
ns
t
PZH
t
PZL
Output enable time
to High and Low level
5
6
2.0
1.0
3.3
2.1
4.8
3.2
ns
t
PHZ
t
PLZ
Output disable time
from High and Low Level
5
6
1.5
1.0
2.6
1.9
4.2
3.4
ns
NOTE:
1.
All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
AC SETUP REQUIREMENTS (2.5V
"
0.2V RANGE)
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500
; T
amb
= 40
C to +85
C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 2.5V
0.2V
UNIT
MIN
TYP
1
ts(H)
ts(L)
Setup time, High or Low
An to CPAB or Bn to CPBA
4
2.0
2.0
0.4
1.2
ns
th(H)
th(L)
Hold time, High or Low
An to CPAB or Bn to CPBA
4
0.0
0.0
1.1
0.3
ns
ts(H)
ts(L)
Setup time, High or Low Clock Low or High
An to LEAB or Bn to LEBA
4
0.0
1.5
1.0
0.4
ns
th(H)
th(L)
Hold time, High or Low Clock Low or High
An to LEAB or Bn to LEBA
4
1.5
1.9
0.4
1.0
ns
ts(H)
ts(L)
Setup time
CEAB before CPAB or
CEBA before CPBA
4
1.0
0.3
0.3
0.4
ns
th(H)
th(L)
Hold time
CEAB after CPAB or
CEBA after CPBA
4
2.0
0.5
0.4
0.1
ns
tw(H)
tw(L)
Pulse width, High or Low
CPAB or CPBA
1
3.0
3.0
ns
tw(H)
LEAB or LEBA pulse width, High
3
1.5
ns
NOTE:
1.
All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
Philips Semiconductors
Product specification
74ALVT16601
2.5V/3.3V 18-bit universal bus transceiver (3-State)
1998 Feb 13
9
AC WAVEFORMS
NOTES:
1. V
M
= 1.5V at V
CC
w
3.0V, V
M
= V
CC
/2 at V
CC
v
2.7V
2. V
X
= V
OL
+ 0.3V at V
CC
w
3.0V, V
X
= V
OL
+ 0.150V
.
V
CC
at V
CC
v
2.7V
3. V
Y
= V
OH
0.3V at V
CC
w
3.0V, V
Y
= V
OH
0.150V
.
V
CC
at V
CC
v
2.7V
t
PHL
t
PLH
VM
V
OH
t
W
(L)
1/f
MAX
CPBA or
CPAB
An or Bn
t
W
(H)
SW00181
VM
VM
VM
V
OL
3.0V or V
CC
,
whichever is
less
0V
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
V
OL
t
PLH
V
OH
0V
An or Bn
An or Bn
V
M
V
M
t
PHL
V
M
V
M
SW00176
3.0V or V
CC
,
whichever is
less
Waveform 2. Propagation Delay, Transparent Mode
t
PLH
t
PHL
t
W
(H)
V
M
V
M
V
M
V
M
V
M
LEAB or
LEBA
An or Bn
0V
V
OH
V
OL
SW00177
3.0V or V
CC
,
whichever is
less
Waveform 3. Propagation Delay, Enable to Output, and Enable
Pulse Width
V
M
V
M
V
M
V
M
V
M
V
M
3.0V or V
CC
whichever
is less
0V
nA
x
, nB
x
CEAB
CEBA
LEAB
or
LEBA
t
S
(H)
t
h
(H)
t
S
(L)
t
h
(L)
0V
3.0V or V
CC
whichever
is less
SW00272
CPAB
or
CPBA
Waveform 4. Data Setup and Hold Times
OEBA
or
OEAB
An or Bn
t
PZH
t
PHZ
V
OH
V
Y
V
M
V
M
V
M
3.0V or V
CC
,
whichever is
less
0V
0V
SW00273
Waveform 5. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
OEBA
or
OEAB
t
PZL
t
PLZ
An or Bn
V
X
V
M
V
M
V
M
3.0V or V
CC
,
whichever is
less
3.0V or V
CC
0V
V
OL
SW00274
Waveform 6. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
Philips Semiconductors
Product specification
74ALVT16601
2.5V/3.3V 18-bit universal bus transceiver (3-State)
1998 Feb 13
10
TEST CIRCUIT
PULSE
GENERATOR
VIN
VOUT
CL
VCC
RL
Test Circuit for 3-State Outputs
VM
VM
tW
NEGATIVE
PULSE
10%
10%
90%
90%
0V
VM
VM
tW
POSITIVE
PULSE
90%
90%
10%
10%
0V
tTHL (tF)
tTLH (tR)
tTHL (tF)
tTLH (tR)
DEFINITIONS
R
L
=
Load resistor; see AC CHARACTERISTICS for value.
C
L
=
Load capacitance includes jig and probe capacitance:
See AC CHARACTERISTICS for value.
R
T
=
Termination resistance should be equal to Z
OUT
of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
74ALVT16
SWITCH POSITION
TEST
SWITCH
t
PLZ/
t
PZL
6V or V
CC x 2
t
PLH/
t
PHL
Open
t
PHZ
/t
PZH
GND
6.0V or V
CC
x 2
R
T
RL
Open
GND
D.U.T.
Amplitude
Rep. Rate
t
W
t
R
t
F
3.0V or V
CC
whichever
is less
v
10MHz
500ns
v
2.5ns
v
2.5ns
VIN
VIN
SW00220
Philips Semiconductors
Product specification
74ALVT16601
18-bit universal bus transceiver (3-State)
1998 Feb 13
11
SSOP56:
plastic shrink small outline package; 56 leads; body width 7.5 mm
SOT371-1
Philips Semiconductors
Product specification
74ALVT16601
18-bit universal bus transceiver (3-State)
1998 Feb 13
12
TSSOP56:
plastic thin shrink small outline package; 56 leads; body width 6.1mm
SOT364-1
Philips Semiconductors
Product specification
74ALVT16601
18-bit universal bus transceiver (3-State)
1998 Feb 13
13
NOTES
Philips Semiconductors
Product specification
74ALVT16601
18-bit universal bus transceiver (3-State)
yyyy mmm dd
14
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code
Date of release: 05-96
Document order number:
9397-750-03571
Philips
Semiconductors
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
[1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1]
Please consult the most recently issued datasheet before initiating or completing a design.
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